mirror of https://github.com/acidanthera/audk.git
ArmPkg/ArmLib: Add ArmHasTrbe () helper function
Create a helper function to query whether ID_AA64MFR1_EL1 indicates presence of the Trace Buffer Extension (TRBE). This feature is only visible in AARCH64 state. Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Leif Lindholm <quic_llindhol@quicinc.com> Cc: Pierre Gondois <pierre.gondois@arm.com> Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Leif Lindholm <quic_llindhol@quicinc.com> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com>
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@ -31,6 +31,9 @@
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#define AARCH64_PFR0_FP (0xF << 16)
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#define AARCH64_PFR0_GIC (0xF << 24)
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// ID_AA64DFR0 - AArch64 Debug Feature Register 0 definitions
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#define AARCH64_DFR0_TRBE (0xFULL << 44)
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// SCR - Secure Configuration Register definitions
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#define SCR_NS (1 << 0)
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#define SCR_IRQ (1 << 1)
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@ -780,6 +780,19 @@ EFIAPI
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ArmHasVhe (
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VOID
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);
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/**
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Checks whether the CPU implements the Trace Buffer Extension.
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@retval TRUE FEAT_TRBE is implemented.
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@retval FALSE FEAT_TRBE is not mplemented.
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**/
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BOOLEAN
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EFIAPI
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ArmHasTrbe (
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VOID
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);
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#endif // MDE_CPU_AARCH64
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#ifdef MDE_CPU_ARM
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@ -119,3 +119,18 @@ ArmHasVhe (
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{
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return ((ArmReadIdAA64Mmfr1 () & AARCH64_MMFR1_VH) != 0);
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}
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/**
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Checks whether the CPU implements the Trace Buffer Extension.
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@retval TRUE FEAT_TRBE is implemented.
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@retval FALSE FEAT_TRBE is not mplemented.
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**/
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BOOLEAN
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EFIAPI
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ArmHasTrbe (
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VOID
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)
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{
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return ((ArmReadIdAA64Dfr0 () & AARCH64_DFR0_TRBE) != 0);
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}
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