mirror of https://github.com/acidanthera/audk.git
ArmPkg/ArmGicLib: Fix GICR_IPRIORITYR address wrong issue
The register address of GICR_IPRIORITYR is in SGI_base frame. Add IPRIORITY_ADDRESS macro for getting GICR_IPRIORITYR address. Otherwise GIC RAS error(Uncorrected software error) may report in ArmGicDxe. This resolves BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3236 Signed-off-by: Ming Huang <huangming@linux.alibaba.com> Reviewed-by: Leif Lindholm <leif@nuviainc.com> Tested-by: Ard Biesheuvel <ardb@kernel.org> # QEMU/kvm guest on ThunderX2 Tested-by: Quan Nguyen <quan@os.amperecomputing.com>
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@ -30,6 +30,9 @@
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#define ICENABLER_ADDRESS(base,offset) ((base) + \
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#define ICENABLER_ADDRESS(base,offset) ((base) + \
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ARM_GICR_CTLR_FRAME_SIZE + ARM_GICR_ICENABLER + 4 * (offset))
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ARM_GICR_CTLR_FRAME_SIZE + ARM_GICR_ICENABLER + 4 * (offset))
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#define IPRIORITY_ADDRESS(base,offset) ((base) + \
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ARM_GICR_CTLR_FRAME_SIZE + ARM_GIC_ICDIPR + 4 * (offset))
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/**
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/**
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*
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*
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* Return whether the Source interrupt index refers to a shared interrupt (SPI)
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* Return whether the Source interrupt index refers to a shared interrupt (SPI)
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@ -236,7 +239,7 @@ ArmGicSetInterruptPriority (
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}
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}
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MmioAndThenOr32 (
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MmioAndThenOr32 (
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GicCpuRedistributorBase + ARM_GIC_ICDIPR + (4 * RegOffset),
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IPRIORITY_ADDRESS (GicCpuRedistributorBase, RegOffset),
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~(0xff << RegShift),
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~(0xff << RegShift),
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Priority << RegShift
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Priority << RegShift
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);
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);
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