mirror of https://github.com/acidanthera/audk.git
DynamicTablesPkg: Add CM_ARM_CPC_INFO object
Introduce the CM_ARM_CPC_INFO CmObj in the ArmNameSpaceObjects. This allows to describe CPC information, as described in ACPI 6.4, s8.4.7.1 "_CPC (Continuous Performance Control)". Signed-off-by: Jeff Brasen <jbrasen@nvidia.com> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
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/** @file
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Copyright (c) 2022, NVIDIA CORPORATION & AFFILIATES. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef AML_CPC_INFO_H_
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#define AML_CPC_INFO_H_
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#include <IndustryStandard/Acpi.h>
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#pragma pack(1)
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/** A structure that describes the Cpc information.
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Continuous Performance Control is described in DSDT/SSDT and associated
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to cpus/clusters in the cpu topology.
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Unsupported Optional registers should be encoded with NULL resource
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Register {(SystemMemory, 0, 0, 0, 0)}
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For values that support Integer or Buffer, integer will be used
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if buffer is NULL resource.
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If resource is not NULL then Integer must be 0
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Cf. ACPI 6.4, s8.4.7.1 _CPC (Continuous Performance Control)
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**/
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typedef struct AmlCpcInfo {
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/// The revision number of the _CPC package format.
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UINT32 Revision;
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/// Indicates the highest level of performance the processor
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/// is theoretically capable of achieving.
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EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE HighestPerformanceBuffer;
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UINT32 HighestPerformanceInteger;
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/// Indicates the highest sustained performance level of the processor.
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EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE NominalPerformanceBuffer;
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UINT32 NominalPerformanceInteger;
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/// Indicates the lowest performance level of the processor with non-linear power savings.
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EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE LowestNonlinearPerformanceBuffer;
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UINT32 LowestNonlinearPerformanceInteger;
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/// Indicates the lowest performance level of the processor..
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EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE LowestPerformanceBuffer;
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UINT32 LowestPerformanceInteger;
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/// Guaranteed Performance Register Buffer.
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/// Optional
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EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE GuaranteedPerformanceRegister;
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/// Desired Performance Register Buffer.
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EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE DesiredPerformanceRegister;
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/// Minimum Performance Register Buffer.
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/// Optional
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EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE MinimumPerformanceRegister;
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/// Maximum Performance Register Buffer.
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/// Optional
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EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE MaximumPerformanceRegister;
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/// Performance Reduction Tolerance Register.
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/// Optional
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EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE PerformanceReductionToleranceRegister;
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/// Time Window Register.
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/// Optional
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EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE TimeWindowRegister;
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/// Counter Wraparound Time
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/// Optional
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EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE CounterWraparoundTimeBuffer;
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UINT32 CounterWraparoundTimeInteger;
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/// Reference Performance Counter Register
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EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE ReferencePerformanceCounterRegister;
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/// Delivered Performance Counter Register
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EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE DeliveredPerformanceCounterRegister;
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/// Performance Limited Register
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EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE PerformanceLimitedRegister;
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/// CPPC EnableRegister
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/// Optional
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EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE CPPCEnableRegister;
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/// Autonomous Selection Enable
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/// Optional
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EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE AutonomousSelectionEnableBuffer;
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UINT32 AutonomousSelectionEnableInteger;
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/// AutonomousActivity-WindowRegister
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/// Optional
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EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE AutonomousActivityWindowRegister;
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/// EnergyPerformance-PreferenceRegister
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/// Optional
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EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE EnergyPerformancePreferenceRegister;
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/// Reference Performance
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/// Optional
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EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE ReferencePerformanceBuffer;
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UINT32 ReferencePerformanceInteger;
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/// Lowest Frequency
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/// Optional
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EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE LowestFrequencyBuffer;
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UINT32 LowestFrequencyInteger;
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/// Nominal Frequency
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/// Optional
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EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE NominalFrequencyBuffer;
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UINT32 NominalFrequencyInteger;
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} AML_CPC_INFO;
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#pragma pack()
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#endif //AML_CPC_INFO_H_
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@ -13,6 +13,7 @@
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#ifndef ARM_NAMESPACE_OBJECTS_H_
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#ifndef ARM_NAMESPACE_OBJECTS_H_
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#define ARM_NAMESPACE_OBJECTS_H_
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#define ARM_NAMESPACE_OBJECTS_H_
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#include <AmlCpcInfo.h>
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#include <StandardNameSpaceObjects.h>
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#include <StandardNameSpaceObjects.h>
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#pragma pack(1)
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#pragma pack(1)
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@ -63,6 +64,7 @@ typedef enum ArmObjectID {
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EArmObjPciInterruptMapInfo, ///< 39 - Pci Interrupt Map Info
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EArmObjPciInterruptMapInfo, ///< 39 - Pci Interrupt Map Info
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EArmObjRmr, ///< 40 - Reserved Memory Range Node
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EArmObjRmr, ///< 40 - Reserved Memory Range Node
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EArmObjMemoryRangeDescriptor, ///< 41 - Memory Range Descriptor
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EArmObjMemoryRangeDescriptor, ///< 41 - Memory Range Descriptor
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EArmObjCpcInfo, ///< 42 - Continuous Performance Control Info
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EArmObjMax
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EArmObjMax
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} EARM_OBJECT_ID;
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} EARM_OBJECT_ID;
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@ -97,99 +99,104 @@ typedef struct CmArmPowerManagementProfileInfo {
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*/
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*/
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typedef struct CmArmGicCInfo {
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typedef struct CmArmGicCInfo {
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/// The GIC CPU Interface number.
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/// The GIC CPU Interface number.
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UINT32 CPUInterfaceNumber;
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UINT32 CPUInterfaceNumber;
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/** The ACPI Processor UID. This must match the
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/** The ACPI Processor UID. This must match the
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_UID of the CPU Device object information described
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_UID of the CPU Device object information described
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in the DSDT/SSDT for the CPU.
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in the DSDT/SSDT for the CPU.
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*/
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*/
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UINT32 AcpiProcessorUid;
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UINT32 AcpiProcessorUid;
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/** The flags field as described by the GICC structure
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/** The flags field as described by the GICC structure
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in the ACPI Specification.
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in the ACPI Specification.
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*/
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*/
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UINT32 Flags;
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UINT32 Flags;
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/** The parking protocol version field as described by
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/** The parking protocol version field as described by
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the GICC structure in the ACPI Specification.
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the GICC structure in the ACPI Specification.
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*/
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*/
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UINT32 ParkingProtocolVersion;
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UINT32 ParkingProtocolVersion;
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/** The Performance Interrupt field as described by
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/** The Performance Interrupt field as described by
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the GICC structure in the ACPI Specification.
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the GICC structure in the ACPI Specification.
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*/
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*/
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UINT32 PerformanceInterruptGsiv;
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UINT32 PerformanceInterruptGsiv;
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/** The CPU Parked address field as described by
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/** The CPU Parked address field as described by
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the GICC structure in the ACPI Specification.
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the GICC structure in the ACPI Specification.
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*/
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*/
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UINT64 ParkedAddress;
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UINT64 ParkedAddress;
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/** The base address for the GIC CPU Interface
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/** The base address for the GIC CPU Interface
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as described by the GICC structure in the
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as described by the GICC structure in the
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ACPI Specification.
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ACPI Specification.
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*/
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*/
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UINT64 PhysicalBaseAddress;
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UINT64 PhysicalBaseAddress;
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/** The base address for GICV interface
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/** The base address for GICV interface
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as described by the GICC structure in the
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as described by the GICC structure in the
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ACPI Specification.
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ACPI Specification.
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*/
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*/
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UINT64 GICV;
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UINT64 GICV;
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/** The base address for GICH interface
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/** The base address for GICH interface
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as described by the GICC structure in the
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as described by the GICC structure in the
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ACPI Specification.
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ACPI Specification.
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*/
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*/
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UINT64 GICH;
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UINT64 GICH;
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/** The GICV maintenance interrupt
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/** The GICV maintenance interrupt
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as described by the GICC structure in the
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as described by the GICC structure in the
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ACPI Specification.
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ACPI Specification.
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*/
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*/
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UINT32 VGICMaintenanceInterrupt;
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UINT32 VGICMaintenanceInterrupt;
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/** The base address for GICR interface
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/** The base address for GICR interface
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as described by the GICC structure in the
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as described by the GICC structure in the
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ACPI Specification.
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ACPI Specification.
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*/
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*/
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UINT64 GICRBaseAddress;
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UINT64 GICRBaseAddress;
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/** The MPIDR for the CPU
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/** The MPIDR for the CPU
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as described by the GICC structure in the
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as described by the GICC structure in the
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ACPI Specification.
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ACPI Specification.
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*/
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*/
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UINT64 MPIDR;
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UINT64 MPIDR;
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/** The Processor Power Efficiency class
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/** The Processor Power Efficiency class
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as described by the GICC structure in the
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as described by the GICC structure in the
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ACPI Specification.
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ACPI Specification.
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*/
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*/
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UINT8 ProcessorPowerEfficiencyClass;
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UINT8 ProcessorPowerEfficiencyClass;
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/** Statistical Profiling Extension buffer overflow GSIV. Zero if
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/** Statistical Profiling Extension buffer overflow GSIV. Zero if
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unsupported by this processor. This field was introduced in
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unsupported by this processor. This field was introduced in
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ACPI 6.3 (MADT revision 5) and is therefore ignored when
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ACPI 6.3 (MADT revision 5) and is therefore ignored when
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generating MADT revision 4 or lower.
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generating MADT revision 4 or lower.
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*/
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*/
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UINT16 SpeOverflowInterrupt;
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UINT16 SpeOverflowInterrupt;
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/** The proximity domain to which the logical processor belongs.
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/** The proximity domain to which the logical processor belongs.
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This field is used to populate the GICC affinity structure
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This field is used to populate the GICC affinity structure
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in the SRAT table.
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in the SRAT table.
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*/
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*/
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UINT32 ProximityDomain;
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UINT32 ProximityDomain;
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/** The clock domain to which the logical processor belongs.
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/** The clock domain to which the logical processor belongs.
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This field is used to populate the GICC affinity structure
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This field is used to populate the GICC affinity structure
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in the SRAT table.
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in the SRAT table.
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*/
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*/
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UINT32 ClockDomain;
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UINT32 ClockDomain;
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/** The GICC Affinity flags field as described by the GICC Affinity structure
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/** The GICC Affinity flags field as described by the GICC Affinity structure
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in the SRAT table.
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in the SRAT table.
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*/
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*/
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UINT32 AffinityFlags;
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UINT32 AffinityFlags;
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/** Optional field: Reference Token for the Cpc info of this processor.
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i.e. a token referencing a CM_ARM_CPC_INFO object.
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*/
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CM_OBJECT_TOKEN CpcToken;
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} CM_ARM_GICC_INFO;
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} CM_ARM_GICC_INFO;
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/** A structure that describes the
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/** A structure that describes the
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@ -1070,6 +1077,24 @@ typedef struct CmArmRmrDescriptor {
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UINT64 Length;
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UINT64 Length;
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} CM_ARM_MEMORY_RANGE_DESCRIPTOR;
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} CM_ARM_MEMORY_RANGE_DESCRIPTOR;
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/** A structure that describes the Cpc information.
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Continuous Performance Control is described in DSDT/SSDT and associated
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to cpus/clusters in the cpu topology.
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Unsupported Optional registers should be encoded with NULL resource
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Register {(SystemMemory, 0, 0, 0, 0)}
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For values that support Integer or Buffer, integer will be used
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if buffer is NULL resource.
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If resource is not NULL then Integer must be 0
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Cf. ACPI 6.4, s8.4.7.1 _CPC (Continuous Performance Control)
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ID: EArmObjCpcInfo
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*/
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typedef AML_CPC_INFO CM_ARM_CPC_INFO;
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#pragma pack()
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#pragma pack()
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#endif // ARM_NAMESPACE_OBJECTS_H_
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#endif // ARM_NAMESPACE_OBJECTS_H_
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@ -34,23 +34,24 @@ STATIC CONST CM_OBJ_PARSER CmArmPowerManagementProfileInfoParser[] = {
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/** A parser for EArmObjGicCInfo.
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/** A parser for EArmObjGicCInfo.
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*/
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*/
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STATIC CONST CM_OBJ_PARSER CmArmGicCInfoParser[] = {
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STATIC CONST CM_OBJ_PARSER CmArmGicCInfoParser[] = {
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{ "CPUInterfaceNumber", 4, "0x%x", NULL },
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{ "CPUInterfaceNumber", 4, "0x%x", NULL },
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{ "AcpiProcessorUid", 4, "0x%x", NULL },
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{ "AcpiProcessorUid", 4, "0x%x", NULL },
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{ "Flags", 4, "0x%x", NULL },
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{ "Flags", 4, "0x%x", NULL },
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{ "ParkingProtocolVersion", 4, "0x%x", NULL },
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{ "ParkingProtocolVersion", 4, "0x%x", NULL },
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{ "PerformanceInterruptGsiv", 4, "0x%x", NULL },
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{ "PerformanceInterruptGsiv", 4, "0x%x", NULL },
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{ "ParkedAddress", 8, "0x%llx", NULL },
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{ "ParkedAddress", 8, "0x%llx", NULL },
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{ "PhysicalBaseAddress", 8, "0x%llx", NULL },
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{ "PhysicalBaseAddress", 8, "0x%llx", NULL },
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{ "GICV", 8, "0x%llx", NULL },
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{ "GICV", 8, "0x%llx", NULL },
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{ "GICH", 8, "0x%llx", NULL },
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{ "GICH", 8, "0x%llx", NULL },
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{ "VGICMaintenanceInterrupt", 4, "0x%x", NULL },
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{ "VGICMaintenanceInterrupt", 4, "0x%x", NULL },
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{ "GICRBaseAddress", 8, "0x%llx", NULL },
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{ "GICRBaseAddress", 8, "0x%llx", NULL },
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{ "MPIDR", 8, "0x%llx", NULL },
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{ "MPIDR", 8, "0x%llx", NULL },
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{ "ProcessorPowerEfficiencyClass", 1, "0x%x", NULL },
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{ "ProcessorPowerEfficiencyClass", 1, "0x%x", NULL },
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{ "SpeOverflowInterrupt", 2, "0x%x", NULL },
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{ "SpeOverflowInterrupt", 2, "0x%x", NULL },
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{ "ProximityDomain", 4, "0x%x", NULL },
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{ "ProximityDomain", 4, "0x%x", NULL },
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{ "ClockDomain", 4, "0x%x", NULL },
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{ "ClockDomain", 4, "0x%x", NULL },
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{ "AffinityFlags", 4, "0x%x", NULL }
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{ "AffinityFlags", 4, "0x%x", NULL },
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{ "CpcToken", sizeof (CM_OBJECT_TOKEN), "0x%p", NULL }
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};
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};
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/** A parser for EArmObjGicDInfo.
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/** A parser for EArmObjGicDInfo.
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@ -423,6 +424,84 @@ STATIC CONST CM_OBJ_PARSER CmPciInterruptMapInfoParser[] = {
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ARRAY_SIZE (CmArmGenericInterruptParser) },
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ARRAY_SIZE (CmArmGenericInterruptParser) },
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};
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};
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/** A parser for EArmObjCpcInfo.
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*/
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STATIC CONST CM_OBJ_PARSER CmArmCpcInfoParser[] = {
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{ "Revision", 4, "0x%lx", NULL },
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{ "HighestPerformanceBuffer", sizeof (EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE),
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NULL, NULL, AcpiGenericAddressParser,
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ARRAY_SIZE (AcpiGenericAddressParser) },
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{ "HighestPerformanceInteger", 4, "0x%lx", NULL },
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{ "NominalPerformanceBuffer", sizeof (EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE),
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NULL, NULL, AcpiGenericAddressParser,
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ARRAY_SIZE (AcpiGenericAddressParser) },
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{ "NominalPerformanceInteger", 4, "0x%lx", NULL },
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{ "LowestNonlinearPerformanceBuffer", sizeof (EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE),
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NULL, NULL, AcpiGenericAddressParser,
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ARRAY_SIZE (AcpiGenericAddressParser) },
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{ "LowestNonlinearPerformanceInteger", 4, "0x%lx", NULL },
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{ "LowestPerformanceBuffer", sizeof (EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE),
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NULL, NULL, AcpiGenericAddressParser,
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||||||
|
ARRAY_SIZE (AcpiGenericAddressParser) },
|
||||||
|
{ "LowestPerformanceInteger", 4, "0x%lx", NULL },
|
||||||
|
{ "GuaranteedPerformanceRegister", sizeof (EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE),
|
||||||
|
NULL, NULL, AcpiGenericAddressParser,
|
||||||
|
ARRAY_SIZE (AcpiGenericAddressParser) },
|
||||||
|
{ "DesiredPerformanceRegister", sizeof (EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE),
|
||||||
|
NULL, NULL, AcpiGenericAddressParser,
|
||||||
|
ARRAY_SIZE (AcpiGenericAddressParser) },
|
||||||
|
{ "MinimumPerformanceRegister", sizeof (EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE),
|
||||||
|
NULL, NULL, AcpiGenericAddressParser,
|
||||||
|
ARRAY_SIZE (AcpiGenericAddressParser) },
|
||||||
|
{ "MaximumPerformanceRegister", sizeof (EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE),
|
||||||
|
NULL, NULL, AcpiGenericAddressParser,
|
||||||
|
ARRAY_SIZE (AcpiGenericAddressParser) },
|
||||||
|
{ "PerformanceReductionToleranceRegister", sizeof (EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE),
|
||||||
|
NULL, NULL, AcpiGenericAddressParser,
|
||||||
|
ARRAY_SIZE (AcpiGenericAddressParser) },
|
||||||
|
{ "TimeWindowRegister", sizeof (EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE),
|
||||||
|
NULL, NULL, AcpiGenericAddressParser,
|
||||||
|
ARRAY_SIZE (AcpiGenericAddressParser) },
|
||||||
|
{ "CounterWraparoundTimeBuffer", sizeof (EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE),
|
||||||
|
NULL, NULL, AcpiGenericAddressParser,
|
||||||
|
ARRAY_SIZE (AcpiGenericAddressParser) },
|
||||||
|
{ "CounterWraparoundTimeInteger", 4, "0x%lx", NULL },
|
||||||
|
{ "ReferencePerformanceCounterRegister", sizeof (EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE),
|
||||||
|
NULL, NULL, AcpiGenericAddressParser,
|
||||||
|
ARRAY_SIZE (AcpiGenericAddressParser) },
|
||||||
|
{ "DeliveredPerformanceCounterRegister", sizeof (EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE),
|
||||||
|
NULL, NULL, AcpiGenericAddressParser,
|
||||||
|
ARRAY_SIZE (AcpiGenericAddressParser) },
|
||||||
|
{ "PerformanceLimitedRegister", sizeof (EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE),
|
||||||
|
NULL, NULL, AcpiGenericAddressParser,
|
||||||
|
ARRAY_SIZE (AcpiGenericAddressParser) },
|
||||||
|
{ "CPPCEnableRegister", sizeof (EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE),
|
||||||
|
NULL, NULL, AcpiGenericAddressParser,
|
||||||
|
ARRAY_SIZE (AcpiGenericAddressParser) },
|
||||||
|
{ "AutonomousSelectionEnableBuffer", sizeof (EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE),
|
||||||
|
NULL, NULL, AcpiGenericAddressParser,
|
||||||
|
ARRAY_SIZE (AcpiGenericAddressParser) },
|
||||||
|
{ "AutonomousSelectionEnableInteger", 4, "0x%lx", NULL },
|
||||||
|
{ "AutonomousActivityWindowRegister", sizeof (EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE),
|
||||||
|
NULL, NULL, AcpiGenericAddressParser,
|
||||||
|
ARRAY_SIZE (AcpiGenericAddressParser) },
|
||||||
|
{ "EnergyPerformancePreferenceRegister", sizeof (EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE),
|
||||||
|
NULL, NULL, AcpiGenericAddressParser,
|
||||||
|
ARRAY_SIZE (AcpiGenericAddressParser) },
|
||||||
|
{ "ReferencePerformanceBuffer", sizeof (EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE),
|
||||||
|
NULL, NULL, AcpiGenericAddressParser,
|
||||||
|
ARRAY_SIZE (AcpiGenericAddressParser) },
|
||||||
|
{ "ReferencePerformanceInteger", 4, "0x%lx", NULL },
|
||||||
|
{ "LowestFrequencyBuffer", sizeof (EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE),
|
||||||
|
NULL, NULL, AcpiGenericAddressParser,
|
||||||
|
ARRAY_SIZE (AcpiGenericAddressParser) },
|
||||||
|
{ "LowestFrequencyInteger", 4, "0x%lx", NULL },
|
||||||
|
{ "NominalFrequencyBuffer", sizeof (EFI_ACPI_6_4_GENERIC_ADDRESS_STRUCTURE),
|
||||||
|
NULL, NULL, AcpiGenericAddressParser,
|
||||||
|
ARRAY_SIZE (AcpiGenericAddressParser) },
|
||||||
|
{ "NominalFrequencyInteger", 4, "0x%lx", NULL },
|
||||||
|
};
|
||||||
|
|
||||||
/** A parser for Arm namespace objects.
|
/** A parser for Arm namespace objects.
|
||||||
*/
|
*/
|
||||||
STATIC CONST CM_OBJ_PARSER_ARRAY ArmNamespaceObjectParser[] = {
|
STATIC CONST CM_OBJ_PARSER_ARRAY ArmNamespaceObjectParser[] = {
|
||||||
|
@ -501,6 +580,8 @@ STATIC CONST CM_OBJ_PARSER_ARRAY ArmNamespaceObjectParser[] = {
|
||||||
ARRAY_SIZE (CmArmPciAddressMapInfoParser) },
|
ARRAY_SIZE (CmArmPciAddressMapInfoParser) },
|
||||||
{ "EArmObjPciInterruptMapInfo", CmPciInterruptMapInfoParser,
|
{ "EArmObjPciInterruptMapInfo", CmPciInterruptMapInfoParser,
|
||||||
ARRAY_SIZE (CmPciInterruptMapInfoParser) },
|
ARRAY_SIZE (CmPciInterruptMapInfoParser) },
|
||||||
|
{ "EArmObjCpcInfo", CmArmCpcInfoParser,
|
||||||
|
ARRAY_SIZE (CmArmCpcInfoParser) },
|
||||||
{ "EArmObjMax", NULL, 0 },
|
{ "EArmObjMax", NULL, 0 },
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
Loading…
Reference in New Issue