diff --git a/UefiCpuPkg/UefiCpuPkg.uni b/UefiCpuPkg/UefiCpuPkg.uni
index a7e279c5cb..bfd696f48c 100644
--- a/UefiCpuPkg/UefiCpuPkg.uni
+++ b/UefiCpuPkg/UefiCpuPkg.uni
@@ -195,6 +195,22 @@
#string STR_gUefiCpuPkgTokenSpaceGuid_PcdIsPowerOnReset_HELP #language en-US "Indicates if the current boot is a power-on reset."
+#string STR_gUefiCpuPkgTokenSpaceGuid_PcdCpuSmmRestrictedMemoryAccess_PROMPT #language en-US "Access to non-SMRAM memory is restricted to reserved, runtime and ACPI NVS type after SmmReadyToLock."
+
+#string STR_gUefiCpuPkgTokenSpaceGuid_PcdCpuSmmRestrictedMemoryAccess_HELP #language en-US "Indicate access to non-SMRAM memory is restricted to reserved, runtime and ACPI NVS type after SmmReadyToLock.
\n"
+ "MMIO access is always allowed regardless of the value of this PCD.
\n"
+ "Loose of such restriction is only required by RAS components in X64 platforms.
\n"
+ "The PCD value is considered as constantly TRUE in IA32 platforms.
\n"
+ "When the PCD value is TRUE, page table is initialized to cover all memory spaces
\n"
+ "and the memory occupied by page table is protected by page table itself as read-only.
\n"
+ "In X64 build, it cannot be enabled at the same time with SMM profile feature (PcdCpuSmmProfileEnable).
\n"
+ "In X64 build, it could not be enabled also at the same time with heap guard feature for SMM
\n"
+ "(PcdHeapGuardPropertyMask in MdeModulePkg).
\n"
+ "In IA32 build, page table memory is not marked as read-only when either SMM profile feature (PcdCpuSmmProfileEnable)
\n"
+ "or heap guard feature for SMM (PcdHeapGuardPropertyMask in MdeModulePkg) is enabled.
\n"
+ "TRUE - Access to non-SMRAM memory is restricted to reserved, runtime and ACPI NVS type after SmmReadyToLock.
\n"
+ "FALSE - Access to any type of non-SMRAM memory after SmmReadyToLock is allowed.
"
+
#string STR_gUefiCpuPkgTokenSpaceGuid_PcdCpuFeaturesCapability_PROMPT #language en-US "Processor feature capabilities."
#string STR_gUefiCpuPkgTokenSpaceGuid_PcdCpuFeaturesCapability_HELP #language en-US "Indicates processor feature capabilities, each bit corresponding to a specific feature."