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ArmPkg/ArmSoftfloatLib: add missing entry points for RVCT 

The RVCT compiler may emit calls to the various __aeabi_c?cmp??
functions, which return their results via the CPU condition flags
C and Z. According to ARM doc IHI 0043D 'Run-time ABI for the ARM
architecture':

    The 3-way comparison functions c*cmple, c*cmpeq and c*rcmple return
    their results in the CPSR Z and C flags. C is clear only if the operands
    are ordered and the first operand is less than the second. Z is set only
    when the operands are ordered and equal.

Add implementations for the double and float variants of the above.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19327 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Ard Biesheuvel 2015-12-17 16:29:23 +00:00 committed by abiesheuvel
parent 44d1d2a828
commit 0b5d7b6e2e
4 changed files with 94 additions and 1 deletions
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47
ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_cdcmp.asm Normal file
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@ -0,0 +1,47 @@
//------------------------------------------------------------------------------
//
// Copyright (c) 2015, Linaro Limited. All rights reserved.
//
// This program and the accompanying materials
// are licensed and made available under the terms and conditions of the BSD License
// which accompanies this distribution. The full text of the license may be found at
// http://opensource.org/licenses/bsd-license.php
//
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
//
//------------------------------------------------------------------------------
EXPORT __aeabi_cdrcmple
EXPORT __aeabi_cdcmpeq
EXPORT __aeabi_cdcmple
IMPORT _softfloat_float64_eq
IMPORT _softfloat_float64_lt
AREA __aeabi_cdcmp, CODE, READONLY
PRESERVE8
__aeabi_cdrcmple
MOV IP, R0
MOV R0, R2
MOV R2, IP
MOV IP, R1
MOV R1, R3
MOV R3, IP
__aeabi_cdcmpeq
__aeabi_cdcmple
PUSH {R0 - R3, IP, LR}
BL _softfloat_float64_eq
SUB IP, R0, #1
CMP IP, #0 // sets C and Z if R0 == 1
POPEQ {R0 - R3, IP, PC}
LDM SP, {R0 - R3}
BL _softfloat_float64_lt
SUB IP, R0, #1
CMP IP, #1 // sets C if R0 == 0
POP {R0 - R3, IP, PC}
END

43
ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_cfcmp.asm Normal file
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@ -0,0 +1,43 @@
//------------------------------------------------------------------------------
//
// Copyright (c) 2015, Linaro Limited. All rights reserved.
//
// This program and the accompanying materials
// are licensed and made available under the terms and conditions of the BSD License
// which accompanies this distribution. The full text of the license may be found at
// http://opensource.org/licenses/bsd-license.php
//
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
//
//------------------------------------------------------------------------------
EXPORT __aeabi_cfrcmple
EXPORT __aeabi_cfcmpeq
EXPORT __aeabi_cfcmple
IMPORT _softfloat_float32_eq
IMPORT _softfloat_float32_lt
AREA __aeabi_cfcmp, CODE, READONLY
PRESERVE8
__aeabi_cfrcmple
MOV IP, R0
MOV R0, R1
MOV R1, IP
__aeabi_cfcmpeq
__aeabi_cfcmple
PUSH {R0 - R3, IP, LR}
BL _softfloat_float32_eq
SUB IP, R0, #1
CMP IP, #0 // sets C and Z if R0 == 1
POPEQ {R0 - R3, IP, PC}
LDM SP, {R0 - R1}
BL _softfloat_float32_lt
SUB IP, R0, #1
CMP IP, #1 // sets C if R0 == 0
POP {R0 - R3, IP, PC}
END

3
ArmPkg/Library/ArmSoftFloatLib/ArmSoftFloatLib.inf
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@ -41,6 +41,9 @@
Arm/__aeabi_dcmpun.c
Arm/__aeabi_fcmpun.c
Arm/__aeabi_cdcmp.asm | RVCT
Arm/__aeabi_cfcmp.asm | RVCT
[Packages]
MdePkg/MdePkg.dec

2
ArmPkg/Library/ArmSoftFloatLib/softfloat-for-gcc.h
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@ -196,7 +196,7 @@
#define float128_gt __gttf2
#endif
#ifdef __ARM_EABI__
#if defined (__ARM_EABI__) || defined (__CC_ARM)
#ifdef __ARM_PCS_VFP
#include <arm/aeabi.h>
#endif