From 0c4d6bb405351d1705fdbbddfd7ccde6f3fe0516 Mon Sep 17 00:00:00 2001 From: Linus Liu Date: Wed, 21 Aug 2024 02:06:00 -0700 Subject: [PATCH] UefiPayloadPkg: Update PayloadLoader to suport FDT. REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4786 Create FDT nodes (reserved-memory, serial, pci-rb, options) in FdtPpiNotifyCallback function right after gEfiEndOfPeiSignalPpiGuid. Signed-off-by: Linus Liu --- .../PayloadLoaderPeim/FitPayloadLoaderPeim.c | 248 ++++++++++- .../FitPayloadLoaderPeim.inf | 13 +- .../PayloadLoaderPeim/PayloadLoaderPeim.c | 71 ++- .../PayloadLoaderPeim/PayloadLoaderPeim.inf | 12 + .../UefiPayloadEntry/Ia32/DxeLoadFuncFit.c | 405 ++++++++++++++++++ .../UefiPayloadEntry/X64/DxeLoadFuncFit.c | 135 ++++++ 6 files changed, 855 insertions(+), 29 deletions(-) create mode 100644 UefiPayloadPkg/UefiPayloadEntry/Ia32/DxeLoadFuncFit.c create mode 100644 UefiPayloadPkg/UefiPayloadEntry/X64/DxeLoadFuncFit.c diff --git a/UefiPayloadPkg/PayloadLoaderPeim/FitPayloadLoaderPeim.c b/UefiPayloadPkg/PayloadLoaderPeim/FitPayloadLoaderPeim.c index 8566618511..d659b75474 100644 --- a/UefiPayloadPkg/PayloadLoaderPeim/FitPayloadLoaderPeim.c +++ b/UefiPayloadPkg/PayloadLoaderPeim/FitPayloadLoaderPeim.c @@ -6,18 +6,34 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include #include +#include #include #include - +#include #include - +#include +#include #include #include -#include #include #include - +#include +#include +#include #include "FitLib.h" +#define STACK_SIZE 0x20000 + +CONST EFI_PEI_PPI_DESCRIPTOR gReadyToPayloadSignalPpi = { + (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST), + &gUplReadyToPayloadPpiGuid, + NULL +}; + +EFI_PEI_PPI_DESCRIPTOR mEndOfPeiSignalPpi = { + (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST), + &gEfiEndOfPeiSignalPpiGuid, + NULL +}; /** The wrapper function of PeiLoadImageLoadImage(). @@ -50,6 +66,15 @@ PeiLoadFileLoadPayload ( UINTN Delta; UINTN Index; + #if (FixedPcdGetBool (PcdHandOffFdtEnable)) + VOID *BaseOfStack; + VOID *TopOfStack; + UNIVERSAL_PAYLOAD_DEVICE_TREE *Fdt; + VOID *Hob; + + Fdt = NULL; + #endif + Instance = 0; do { Status = PeiServicesFfsFindSectionData3 (EFI_SECTION_RAW, Instance++, FileHandle, &Binary, AuthenticationState); @@ -66,13 +91,15 @@ PeiLoadFileLoadPayload ( return Status; } - DEBUG (( - DEBUG_INFO, - "Before Rebase Payload File Base: 0x%08x, File Size: 0x%08X, EntryPoint: 0x%08x\n", - Context.PayloadBaseAddress, - Context.PayloadSize, - Context.PayloadEntryPoint - )); + DEBUG ( + ( + DEBUG_INFO, + "Before Rebase Payload File Base: 0x%08x, File Size: 0x%08X, EntryPoint: 0x%08x\n", + Context.PayloadBaseAddress, + Context.PayloadSize, + Context.PayloadEntryPoint + ) + ); Context.PayloadBaseAddress = (EFI_PHYSICAL_ADDRESS)AllocatePages (EFI_SIZE_TO_PAGES (Context.PayloadSize)); RelocateTable = (FIT_RELOCATE_ITEM *)(UINTN)(Context.PayloadBaseAddress + Context.RelocateTableOffset); @@ -96,13 +123,15 @@ PeiLoadFileLoadPayload ( } } - DEBUG (( - DEBUG_INFO, - "After Rebase Payload File Base: 0x%08x, File Size: 0x%08X, EntryPoint: 0x%08x\n", - Context.PayloadBaseAddress, - Context.PayloadSize, - Context.PayloadEntryPoint - )); + DEBUG ( + ( + DEBUG_INFO, + "After Rebase Payload File Base: 0x%08x, File Size: 0x%08X, EntryPoint: 0x%08x\n", + Context.PayloadBaseAddress, + Context.PayloadSize, + Context.PayloadEntryPoint + ) + ); Length = sizeof (UNIVERSAL_PAYLOAD_BASE); PayloadBase = BuildGuidHob ( @@ -115,6 +144,42 @@ PeiLoadFileLoadPayload ( *ImageSizeArg = Context.PayloadSize; *EntryPoint = Context.PayloadEntryPoint; + Status = PeiServicesInstallPpi (&mEndOfPeiSignalPpi); + ASSERT_EFI_ERROR (Status); + + Status = PeiServicesInstallPpi (&gReadyToPayloadSignalPpi); + ASSERT_EFI_ERROR (Status); + + #if (FixedPcdGetBool (PcdHandOffFdtEnable)) + Hob = GetFirstGuidHob (&gUniversalPayloadDeviceTreeGuid); + if (Hob != NULL) { + Fdt = (UNIVERSAL_PAYLOAD_DEVICE_TREE *)GET_GUID_HOB_DATA (Hob); + } + + // + // Allocate 128KB for the Stack + // + BaseOfStack = AllocatePages (EFI_SIZE_TO_PAGES (STACK_SIZE)); + ASSERT (BaseOfStack != NULL); + + // + // Compute the top of the stack we were allocated. Pre-allocate a UINTN + // for safety. + // + TopOfStack = (VOID *)((UINTN)BaseOfStack + EFI_SIZE_TO_PAGES (STACK_SIZE) * EFI_PAGE_SIZE - CPU_STACK_ALIGNMENT); + TopOfStack = ALIGN_POINTER (TopOfStack, CPU_STACK_ALIGNMENT); + + // + // Transfer the control to the entry point of UniveralPayloadEntry. + // + SwitchStack ( + (SWITCH_STACK_ENTRY_POINT)(UINTN)Context.PayloadEntryPoint, + (VOID *)(Fdt->DeviceTreeAddress), + NULL, + TopOfStack + ); + #endif + return EFI_SUCCESS; } @@ -128,11 +193,148 @@ EFI_PEI_PPI_DESCRIPTOR gPpiLoadFilePpiList = { &mPeiLoadFilePpi }; +#if (FixedPcdGetBool (PcdHandOffFdtEnable)) + +/** + Discover Hobs data and report data into a FDT. + @param[in] PeiServices An indirect pointer to the EFI_PEI_SERVICES table published by the PEI Foundation. + @param[in] NotifyDescriptor Address of the notification descriptor data structure. + @param[in] Ppi Address of the PPI that was installed. + @retval EFI_SUCCESS Hobs data is discovered. + @return Others No Hobs data is discovered. +**/ +EFI_STATUS +EFIAPI +FdtPpiNotifyCallback ( + IN EFI_PEI_SERVICES **PeiServices, + IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor, + IN VOID *Ppi + ); + +EFI_PEI_NOTIFY_DESCRIPTOR mReadyToPayloadNotifyList[] = { + { + (EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST), + &gUplReadyToPayloadPpiGuid, + FdtPpiNotifyCallback + } +}; +#endif + +/** + Print FDT data. + @param[in] FdtBase Address of the Fdt data. +**/ +VOID +PrintFdt ( + IN VOID *FdtBase + ) +{ + UINT8 *Fdt; + UINT32 i; + + Fdt = NULL; + i = 0; + + DEBUG ((DEBUG_ERROR, "FDT DTB data:")); + for (Fdt = FdtBase, i = 0; i < Fdt32ToCpu (((FDT_HEADER *)FdtBase)->TotalSize); i++, Fdt++) { + if (i % 16 == 0) { + DEBUG ((DEBUG_ERROR, "\n")); + } + + DEBUG ((DEBUG_ERROR, "%02x ", *Fdt)); + } + + DEBUG ((DEBUG_ERROR, "\n")); +} + +/** + It will build FDT for UPL consumed. + @param[in] FdtBase Address of the Fdt data. + @retval EFI_SUCCESS If it completed successfully. + @retval Others If it failed to build required FDT. +**/ +EFI_STATUS +BuildFdtForUPL ( + IN VOID *FdtBase + ); + +#if (FixedPcdGetBool (PcdHandOffFdtEnable)) + +/** + Discover Hobs data and report data into a FDT. + @param[in] PeiServices An indirect pointer to the EFI_PEI_SERVICES table published by the PEI Foundation. + @param[in] NotifyDescriptor Address of the notification descriptor data structure. + @param[in] Ppi Address of the PPI that was installed. + @retval EFI_SUCCESS Hobs data is discovered. + @return Others No Hobs data is discovered. +**/ +EFI_STATUS +EFIAPI +FdtPpiNotifyCallback ( + IN EFI_PEI_SERVICES **PeiServices, + IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor, + IN VOID *Ppi + ) +{ + EFI_STATUS Status; + UNIVERSAL_PAYLOAD_DEVICE_TREE *Fdt; + UINT32 FdtSize; + UINTN FdtPages; + VOID *FdtBase; + UINT32 Data32; + + Fdt = NULL; + FdtSize = PcdGet8 (PcdFDTPageSize) * EFI_PAGE_SIZE; + FdtPages = EFI_SIZE_TO_PAGES (FdtSize); + FdtBase = AllocatePages (FdtPages); + if (FdtBase == NULL) { + DEBUG ((DEBUG_ERROR, "%a: AllocatePages failed\n", __func__)); + return EFI_NOT_FOUND; + } + + Status = FdtCreateEmptyTree (FdtBase, (UINT32)FdtSize); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "%a: cannot create FDT\n", __func__)); + } + + // Set cell property of root node + Data32 = CpuToFdt32 (2); + Status = FdtSetProp (FdtBase, 0, "#address-cells", &Data32, sizeof (UINT32)); + Status = FdtSetProp (FdtBase, 0, "#size-cells", &Data32, sizeof (UINT32)); + + Status = BuildFdtForUPL (FdtBase); + ASSERT_EFI_ERROR (Status); + + PrintFdt (FdtBase); + + Fdt = BuildGuidHob (&gUniversalPayloadDeviceTreeGuid, sizeof (UNIVERSAL_PAYLOAD_DEVICE_TREE)); + if (Fdt == NULL) { + DEBUG ((DEBUG_ERROR, "%a: Build FDT Hob failed\n", __func__)); + return EFI_NOT_FOUND; + } + + DEBUG (( + DEBUG_ERROR, + "%a: fdt at 0x%x (size %d)\n", + __func__, + FdtBase, + Fdt32ToCpu (((FDT_HEADER *)FdtBase)->TotalSize) + )); + + Fdt->Header.Revision = UNIVERSAL_PAYLOAD_DEVICE_TREE_REVISION; + Fdt->Header.Length = sizeof (UNIVERSAL_PAYLOAD_DEVICE_TREE); + Fdt->DeviceTreeAddress = (UINT64)FdtBase; + + return Status; +} + +#endif + /** Install Pei Load File PPI. @param FileHandle Handle of the file being invoked. @param PeiServices Describes the list of possible PEI Services. - @retval EFI_SUCCESS The entry point executes successfully. + @retval EFI_SUCESS The entry point executes successfully. @retval Others Some error occurs during the execution of this function. **/ EFI_STATUS @@ -146,5 +348,13 @@ InitializeFitPayloadLoaderPeim ( Status = PeiServicesInstallPpi (&gPpiLoadFilePpiList); + #if (FixedPcdGetBool (PcdHandOffFdtEnable)) + + // + // Build FDT in end of PEI notify callback. + // + Status = PeiServicesNotifyPpi (&mReadyToPayloadNotifyList[0]); + ASSERT_EFI_ERROR (Status); + #endif return Status; } diff --git a/UefiPayloadPkg/PayloadLoaderPeim/FitPayloadLoaderPeim.inf b/UefiPayloadPkg/PayloadLoaderPeim/FitPayloadLoaderPeim.inf index cd0cb186e1..b891706b77 100644 --- a/UefiPayloadPkg/PayloadLoaderPeim/FitPayloadLoaderPeim.inf +++ b/UefiPayloadPkg/PayloadLoaderPeim/FitPayloadLoaderPeim.inf @@ -35,7 +35,6 @@ [LibraryClasses] PcdLib - MemoryAllocationLib BaseMemoryLib PeiServicesLib HobLib @@ -43,17 +42,27 @@ PeimEntryPoint DebugLib FdtLib +##for testing, remove this for HandOffFdtEnable == FALSE scenario: BuildFdtLib +##Hook this lib to FitPayloadLoaderPeim.inf in platform DSC when HandOffFdtEnable == TRUE. [Ppis] gEfiPeiLoadFilePpiGuid ## PRODUCES + gUplReadyToPayloadPpiGuid ## PRODUCES + gEfiEndOfPeiSignalPpiGuid ## CONSUMES [Pcd] gPcAtChipsetPkgTokenSpaceGuid.PcdRtcIndexRegister gPcAtChipsetPkgTokenSpaceGuid.PcdRtcTargetRegister + gUefiPayloadPkgTokenSpaceGuid.PcdHandOffFdtEnable + gUefiPayloadPkgTokenSpaceGuid.PcdFDTPageSize [Guids] - gUniversalPayloadExtraDataGuid ## PRODUCES gUniversalPayloadBaseGuid ## PRODUCES + gUniversalPayloadDeviceTreeGuid ## CONSUMES + gEfiGraphicsInfoHobGuid ## CONSUMES + gUniversalPayloadPciRootBridgeInfoGuid ## CONSUMES + gUniversalPayloadAcpiTableGuid ## CONSUMES + gUniversalPayloadSerialPortParentDeviceInfoGuid [Depex] TRUE diff --git a/UefiPayloadPkg/PayloadLoaderPeim/PayloadLoaderPeim.c b/UefiPayloadPkg/PayloadLoaderPeim/PayloadLoaderPeim.c index 219a86cfbc..cdb7c1abf2 100644 --- a/UefiPayloadPkg/PayloadLoaderPeim/PayloadLoaderPeim.c +++ b/UefiPayloadPkg/PayloadLoaderPeim/PayloadLoaderPeim.c @@ -17,9 +17,49 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include #include #include - +#include #include "ElfLib.h" +CONST EFI_PEI_PPI_DESCRIPTOR gReadyToPayloadSignalPpi = { + (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST), + &gUplReadyToPayloadPpiGuid, + NULL +}; + +/** + Notify ReadyToPayLoad signal. + @param[in] PeiServices An indirect pointer to the EFI_PEI_SERVICES table published by the PEI Foundation. + @param[in] NotifyDescriptor Address of the notification descriptor data structure. + @param[in] Ppi Address of the PPI that was installed. + @retval EFI_SUCCESS Hobs data is discovered. + @return Others No Hobs data is discovered. +**/ +EFI_STATUS +EFIAPI +EndOfPeiPpiNotifyCallback ( + IN EFI_PEI_SERVICES **PeiServices, + IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor, + IN VOID *Ppi + ) +{ + EFI_STATUS Status; + + // + // Ready to Payload phase signal + // + Status = PeiServicesInstallPpi (&gReadyToPayloadSignalPpi); + + return Status; +} + +EFI_PEI_NOTIFY_DESCRIPTOR mEndOfPeiNotifyList[] = { + { + (EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST), + &gEfiEndOfPeiSignalPpiGuid, + EndOfPeiPpiNotifyCallback + } +}; + /** The wrapper function of PeiLoadImageLoadImage(). @@ -47,6 +87,7 @@ PeiLoadFileLoadPayload ( EFI_STATUS Status; VOID *Elf; UNIVERSAL_PAYLOAD_EXTRA_DATA *ExtraData; + UNIVERSAL_PAYLOAD_BASE *PayloadBase; ELF_IMAGE_CONTEXT Context; UINT32 Index; UINT16 ExtraDataIndex; @@ -73,13 +114,22 @@ PeiLoadFileLoadPayload ( Status = ParseElfImage (Elf, &Context); } while (EFI_ERROR (Status)); - DEBUG (( - DEBUG_INFO, - "Payload File Size: 0x%08X, Mem Size: 0x%08x, Reload: %d\n", - Context.FileSize, - Context.ImageSize, - Context.ReloadRequired - )); + Length = sizeof (UNIVERSAL_PAYLOAD_BASE); + PayloadBase = BuildGuidHob ( + &gUniversalPayloadBaseGuid, + Length + ); + PayloadBase->Entry = (EFI_PHYSICAL_ADDRESS)Context.FileBase; + + DEBUG ( + ( + DEBUG_INFO, + "Payload File Size: 0x%08X, Mem Size: 0x%08x, Reload: %d\n", + Context.FileSize, + Context.ImageSize, + Context.ReloadRequired + ) + ); // // Get UNIVERSAL_PAYLOAD_INFO_HEADER and number of additional PLD sections. @@ -153,6 +203,11 @@ PeiLoadFileLoadPayload ( *ImageSizeArg = Context.ImageSize; } + DEBUG ((DEBUG_INFO, "LoadElfImage :%r, EntryPoint :%x\n", Status, (UINTN)Context.EntryPoint)); + + Status = PeiServicesNotifyPpi (&mEndOfPeiNotifyList[0]); + ASSERT_EFI_ERROR (Status); + return Status; } diff --git a/UefiPayloadPkg/PayloadLoaderPeim/PayloadLoaderPeim.inf b/UefiPayloadPkg/PayloadLoaderPeim/PayloadLoaderPeim.inf index 06e83dbadc..8db026eaa1 100644 --- a/UefiPayloadPkg/PayloadLoaderPeim/PayloadLoaderPeim.inf +++ b/UefiPayloadPkg/PayloadLoaderPeim/PayloadLoaderPeim.inf @@ -52,6 +52,8 @@ [Ppis] gEfiPeiLoadFilePpiGuid ## PRODUCES + gEfiEndOfPeiSignalPpiGuid ## CONSUMES + gUplReadyToPayloadPpiGuid ## PRODUCES [Pcd] gPcAtChipsetPkgTokenSpaceGuid.PcdRtcIndexRegister @@ -59,6 +61,16 @@ [Guids] gUniversalPayloadExtraDataGuid ## PRODUCES + gUniversalPayloadBaseGuid ## PRODUCES [Depex] TRUE + +[BuildOptions] + MSFT:*_*_*_CC_FLAGS = /wd4244 + GCC:*_*_IA32_CC_FLAGS = -Wno-error=pointer-to-int-cast -Wno-error=int-to-pointer-cast + GCC:*_*_X64_CC_FLAGS = -Wno-error=pointer-to-int-cast -Wno-error=int-to-pointer-cast + GCC:*_*_ARM_CC_FLAGS = -Wno-error=pointer-to-int-cast -Wno-error=int-to-pointer-cast + GCC:*_*_AARCH64_CC_FLAGS = -Wno-error=pointer-to-int-cast -Wno-error=int-to-pointer-cast + GCC:*_*_RISCV64_CC_FLAGS = -Wno-error=pointer-to-int-cast -Wno-error=int-to-pointer-cast + GCC:*_*_LOONGARCH64_CC_FLAGS = -Wno-error=pointer-to-int-cast -Wno-error=int-to-pointer-cast diff --git a/UefiPayloadPkg/UefiPayloadEntry/Ia32/DxeLoadFuncFit.c b/UefiPayloadPkg/UefiPayloadEntry/Ia32/DxeLoadFuncFit.c new file mode 100644 index 0000000000..439d5bee0b --- /dev/null +++ b/UefiPayloadPkg/UefiPayloadEntry/Ia32/DxeLoadFuncFit.c @@ -0,0 +1,405 @@ +/** @file + Ia32-specific functionality for DxeLoad. + + Copyright (c) 2024, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include "VirtualMemory.h" +#include "UefiPayloadEntry.h" + +#define STACK_SIZE 0x20000 +#define IDT_ENTRY_COUNT 32 + +extern VOID *mHobList; + +typedef struct _X64_IDT_TABLE { + // + // Reserved 4 bytes preceding PeiService and IdtTable, + // since IDT base address should be 8-byte alignment. + // + UINT32 Reserved; + CONST EFI_PEI_SERVICES **PeiService; + X64_IDT_GATE_DESCRIPTOR IdtTable[IDT_ENTRY_COUNT]; +} X64_IDT_TABLE; + +// +// Global Descriptor Table (GDT) +// +GLOBAL_REMOVE_IF_UNREFERENCED IA32_GDT gGdtEntries[] = { + /* selector { Global Segment Descriptor } */ + /* 0x00 */ { + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } + }, // null descriptor + /* 0x08 */ { + { 0xffff, 0, 0, 0x2, 1, 0, 1, 0xf, 0, 0, 1, 1, 0 } + }, // linear data segment descriptor + /* 0x10 */ { + { 0xffff, 0, 0, 0xf, 1, 0, 1, 0xf, 0, 0, 1, 1, 0 } + }, // linear code segment descriptor + /* 0x18 */ { + { 0xffff, 0, 0, 0x3, 1, 0, 1, 0xf, 0, 0, 1, 1, 0 } + }, // system data segment descriptor + /* 0x20 */ { + { 0xffff, 0, 0, 0xa, 1, 0, 1, 0xf, 0, 0, 1, 1, 0 } + }, // system code segment descriptor + /* 0x28 */ { + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } + }, // spare segment descriptor + /* 0x30 */ { + { 0xffff, 0, 0, 0x2, 1, 0, 1, 0xf, 0, 0, 1, 1, 0 } + }, // system data segment descriptor + /* 0x38 */ { + { 0xffff, 0, 0, 0xa, 1, 0, 1, 0xf, 0, 1, 0, 1, 0 } + }, // system code segment descriptor + /* 0x40 */ { + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } + }, // spare segment descriptor +}; + +// +// IA32 Gdt register +// +GLOBAL_REMOVE_IF_UNREFERENCED CONST IA32_DESCRIPTOR gGdt = { + sizeof (gGdtEntries) - 1, + (UINTN)gGdtEntries +}; + +GLOBAL_REMOVE_IF_UNREFERENCED IA32_DESCRIPTOR gLidtDescriptor = { + sizeof (X64_IDT_GATE_DESCRIPTOR) * IDT_ENTRY_COUNT - 1, + 0 +}; + +/** + Allocates and fills in the Page Directory and Page Table Entries to + establish a 4G page table. + + @param[in] StackBase Stack base address. + @param[in] StackSize Stack size. + + @return The address of page table. + +**/ +UINTN +Create4GPageTablesIa32Pae ( + IN EFI_PHYSICAL_ADDRESS StackBase, + IN UINTN StackSize + ) +{ + UINT8 PhysicalAddressBits; + EFI_PHYSICAL_ADDRESS PhysicalAddress; + UINTN IndexOfPdpEntries; + UINTN IndexOfPageDirectoryEntries; + UINT32 NumberOfPdpEntriesNeeded; + PAGE_MAP_AND_DIRECTORY_POINTER *PageMap; + PAGE_MAP_AND_DIRECTORY_POINTER *PageDirectoryPointerEntry; + PAGE_TABLE_ENTRY *PageDirectoryEntry; + UINTN TotalPagesNum; + UINTN PageAddress; + UINT64 AddressEncMask; + + // + // Make sure AddressEncMask is contained to smallest supported address field + // + AddressEncMask = PcdGet64 (PcdPteMemoryEncryptionAddressOrMask) & PAGING_1G_ADDRESS_MASK_64; + + PhysicalAddressBits = 32; + + // + // Calculate the table entries needed. + // + NumberOfPdpEntriesNeeded = (UINT32)LShiftU64 (1, (PhysicalAddressBits - 30)); + + TotalPagesNum = NumberOfPdpEntriesNeeded + 1; + PageAddress = (UINTN)AllocatePageTableMemory (TotalPagesNum); + ASSERT (PageAddress != 0); + + PageMap = (VOID *)PageAddress; + PageAddress += SIZE_4KB; + + PageDirectoryPointerEntry = PageMap; + PhysicalAddress = 0; + + for (IndexOfPdpEntries = 0; IndexOfPdpEntries < NumberOfPdpEntriesNeeded; IndexOfPdpEntries++, PageDirectoryPointerEntry++) { + // + // Each Directory Pointer entries points to a page of Page Directory entires. + // So allocate space for them and fill them in in the IndexOfPageDirectoryEntries loop. + // + PageDirectoryEntry = (VOID *)PageAddress; + PageAddress += SIZE_4KB; + + // + // Fill in a Page Directory Pointer Entries + // + PageDirectoryPointerEntry->Uint64 = (UINT64)(UINTN)PageDirectoryEntry | AddressEncMask; + PageDirectoryPointerEntry->Bits.Present = 1; + + for (IndexOfPageDirectoryEntries = 0; IndexOfPageDirectoryEntries < 512; IndexOfPageDirectoryEntries++, PageDirectoryEntry++, PhysicalAddress += SIZE_2MB) { + if ( (IsNullDetectionEnabled () && (PhysicalAddress == 0)) + || ( (PhysicalAddress < StackBase + StackSize) + && ((PhysicalAddress + SIZE_2MB) > StackBase))) + { + // + // Need to split this 2M page that covers stack range. + // + Split2MPageTo4K (PhysicalAddress, (UINT64 *)PageDirectoryEntry, StackBase, StackSize, 0, 0); + } else { + // + // Fill in the Page Directory entries + // + PageDirectoryEntry->Uint64 = (UINT64)PhysicalAddress | AddressEncMask; + PageDirectoryEntry->Bits.ReadWrite = 1; + PageDirectoryEntry->Bits.Present = 1; + PageDirectoryEntry->Bits.MustBe1 = 1; + } + } + } + + for ( ; IndexOfPdpEntries < 512; IndexOfPdpEntries++, PageDirectoryPointerEntry++) { + ZeroMem ( + PageDirectoryPointerEntry, + sizeof (PAGE_MAP_AND_DIRECTORY_POINTER) + ); + } + + // + // Protect the page table by marking the memory used for page table to be + // read-only. + // + EnablePageTableProtection ((UINTN)PageMap, FALSE); + + return (UINTN)PageMap; +} + +/** + The function will check if IA32 PAE is supported. + + @retval TRUE IA32 PAE is supported. + @retval FALSE IA32 PAE is not supported. + +**/ +BOOLEAN +IsIa32PaeSupport ( + VOID + ) +{ + UINT32 RegEax; + UINT32 RegEdx; + BOOLEAN Ia32PaeSupport; + + Ia32PaeSupport = FALSE; + AsmCpuid (0x0, &RegEax, NULL, NULL, NULL); + if (RegEax >= 0x1) { + AsmCpuid (0x1, NULL, NULL, NULL, &RegEdx); + if ((RegEdx & BIT6) != 0) { + Ia32PaeSupport = TRUE; + } + } + + return Ia32PaeSupport; +} + +/** + The function will check if page table should be setup or not. + + @retval TRUE Page table should be created. + @retval FALSE Page table should not be created. + +**/ +BOOLEAN +ToBuildPageTable ( + VOID + ) +{ + if (!IsIa32PaeSupport ()) { + return FALSE; + } + + if (IsNullDetectionEnabled ()) { + return TRUE; + } + + if (PcdGet8 (PcdHeapGuardPropertyMask) != 0) { + return TRUE; + } + + if (PcdGetBool (PcdCpuStackGuard)) { + return TRUE; + } + + if (IsEnableNonExecNeeded ()) { + return TRUE; + } + + return FALSE; +} + +/** + Transfers control to DxeCore. + + This function performs a CPU architecture specific operations to execute + the entry point of DxeCore with the parameters of HobList. + + @param DxeCoreEntryPoint The entry point of DxeCore. + @param HobList The start of HobList passed to DxeCore. + +**/ +VOID +HandOffToDxeCore ( + IN EFI_PHYSICAL_ADDRESS DxeCoreEntryPoint, + IN EFI_PEI_HOB_POINTERS HobList + ) +{ + EFI_PHYSICAL_ADDRESS BaseOfStack; + EFI_PHYSICAL_ADDRESS TopOfStack; + UINTN PageTables; + X64_IDT_GATE_DESCRIPTOR *IdtTable; + UINTN SizeOfTemplate; + VOID *TemplateBase; + EFI_PHYSICAL_ADDRESS VectorAddress; + UINT32 Index; + X64_IDT_TABLE *IdtTableForX64; + + // Initialize floating point operating environment to be compliant with UEFI spec. + InitializeFloatingPointUnits (); + + // + // Mask off all legacy 8259 interrupt sources + // + IoWrite8 (LEGACY_8259_MASK_REGISTER_MASTER, 0xFF); + IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, 0xFF); + + // + // Clear page 0 and mark it as allocated if NULL pointer detection is enabled. + // + if (IsNullDetectionEnabled ()) { + ClearFirst4KPage (HobList.Raw); + BuildMemoryAllocationHob (0, EFI_PAGES_TO_SIZE (1), EfiBootServicesData); + } + + BaseOfStack = (EFI_PHYSICAL_ADDRESS)(UINTN)AllocatePages (EFI_SIZE_TO_PAGES (STACK_SIZE)); + ASSERT (BaseOfStack != 0); + + if (FeaturePcdGet (PcdDxeIplSwitchToLongMode)) { + // + // Compute the top of the stack we were allocated, which is used to load X64 dxe core. + // Pre-allocate a 32 bytes which confroms to x64 calling convention. + // + // The first four parameters to a function are passed in rcx, rdx, r8 and r9. + // Any further parameters are pushed on the stack. Furthermore, space (4 * 8bytes) for the + // register parameters is reserved on the stack, in case the called function + // wants to spill them; this is important if the function is variadic. + // + TopOfStack = BaseOfStack + EFI_SIZE_TO_PAGES (STACK_SIZE) * EFI_PAGE_SIZE - 32; + + // + // x64 Calling Conventions requires that the stack must be aligned to 16 bytes + // + TopOfStack = (EFI_PHYSICAL_ADDRESS)(UINTN)ALIGN_POINTER (TopOfStack, 16); + + // + // Load the GDT of Go64. Since the GDT of 32-bit Tiano locates in the BS_DATA + // memory, it may be corrupted when copying FV to high-end memory + // + AsmWriteGdtr (&gGdt); + // + // Create page table and save PageMapLevel4 to CR3 + // + PageTables = CreateIdentityMappingPageTables (BaseOfStack, STACK_SIZE, 0, 0); + + // + // Paging might be already enabled. To avoid conflict configuration, + // disable paging first anyway. + // + AsmWriteCr0 (AsmReadCr0 () & (~BIT31)); + AsmWriteCr3 (PageTables); + + // + // Update the contents of BSP stack HOB to reflect the real stack info passed to DxeCore. + // + UpdateStackHob (BaseOfStack, STACK_SIZE); + + SizeOfTemplate = AsmGetVectorTemplatInfo (&TemplateBase); + + VectorAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)AllocatePages (EFI_SIZE_TO_PAGES (sizeof (X64_IDT_TABLE) + SizeOfTemplate * IDT_ENTRY_COUNT)); + ASSERT (VectorAddress != 0); + + // + // Store EFI_PEI_SERVICES** in the 4 bytes immediately preceding IDT to avoid that + // it may not be gotten correctly after IDT register is re-written. + // + IdtTableForX64 = (X64_IDT_TABLE *)(UINTN)VectorAddress; + IdtTableForX64->PeiService = NULL; + + VectorAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)(IdtTableForX64 + 1); + IdtTable = IdtTableForX64->IdtTable; + for (Index = 0; Index < IDT_ENTRY_COUNT; Index++) { + IdtTable[Index].Ia32IdtEntry.Bits.GateType = 0x8e; + IdtTable[Index].Ia32IdtEntry.Bits.Reserved_0 = 0; + IdtTable[Index].Ia32IdtEntry.Bits.Selector = SYS_CODE64_SEL; + + IdtTable[Index].Ia32IdtEntry.Bits.OffsetLow = (UINT16)VectorAddress; + IdtTable[Index].Ia32IdtEntry.Bits.OffsetHigh = (UINT16)(RShiftU64 (VectorAddress, 16)); + IdtTable[Index].Offset32To63 = (UINT32)(RShiftU64 (VectorAddress, 32)); + IdtTable[Index].Reserved = 0; + + CopyMem ((VOID *)(UINTN)VectorAddress, TemplateBase, SizeOfTemplate); + AsmVectorFixup ((VOID *)(UINTN)VectorAddress, (UINT8)Index); + + VectorAddress += SizeOfTemplate; + } + + gLidtDescriptor.Base = (UINTN)IdtTable; + + AsmWriteIdtr (&gLidtDescriptor); + + DEBUG (( + DEBUG_INFO, + "%a() Stack Base: 0x%lx, Stack Size: 0x%x\n", + __func__, + BaseOfStack, + STACK_SIZE + )); + + // + // Go to Long Mode and transfer control to DxeCore. + // Interrupts will not get turned on until the CPU AP is loaded. + // Call x64 drivers passing in single argument, a pointer to the HOBs. + // + AsmEnablePaging64 ( + SYS_CODE64_SEL, + DxeCoreEntryPoint, + (EFI_PHYSICAL_ADDRESS)(UINTN)(HobList.Raw), + 0, + TopOfStack + ); + } else { + // 32bit UEFI payload could be supported if required later. + DEBUG ((DEBUG_ERROR, "NOT support 32bit UEFI payload\n")); + ASSERT (FALSE); + CpuDeadLoop (); + } +} + +/** + Entry point to the C language phase of UEFI payload. + @param[in] BootloaderParameter The starting address of bootloader parameter block. + @retval It will not return if SUCCESS, and return error when passing bootloader parameter. +**/ +EFI_STATUS +EFIAPI +_ModuleEntryPoint ( + IN UINTN BootloaderParameter + ) +{ + return FitUplEntryPoint (BootloaderParameter); +} diff --git a/UefiPayloadPkg/UefiPayloadEntry/X64/DxeLoadFuncFit.c b/UefiPayloadPkg/UefiPayloadEntry/X64/DxeLoadFuncFit.c new file mode 100644 index 0000000000..35b52a911d --- /dev/null +++ b/UefiPayloadPkg/UefiPayloadEntry/X64/DxeLoadFuncFit.c @@ -0,0 +1,135 @@ +/** @file + x64-specifc functionality for DxeLoad. + + Copyright (c) 2024, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "X64/VirtualMemory.h" +#include "UefiPayloadEntry.h" +#define STACK_SIZE 0x20000 + +extern VOID *mHobList; + +/** + Transfers control to DxeCore. + + This function performs a CPU architecture specific operations to execute + the entry point of DxeCore with the parameters of HobList. + It also installs EFI_END_OF_PEI_PPI to signal the end of PEI phase. + + @param DxeCoreEntryPoint The entry point of DxeCore. + @param HobList The start of HobList passed to DxeCore. + +**/ +VOID +HandOffToDxeCore ( + IN EFI_PHYSICAL_ADDRESS DxeCoreEntryPoint, + IN EFI_PEI_HOB_POINTERS HobList + ) +{ + VOID *BaseOfStack; + VOID *TopOfStack; + UINTN PageTables; + VOID *GhcbBase; + UINTN GhcbSize; + + // Initialize floating point operating environment to be compliant with UEFI spec. + InitializeFloatingPointUnits (); + + // + // Mask off all legacy 8259 interrupt sources + // + IoWrite8 (LEGACY_8259_MASK_REGISTER_MASTER, 0xFF); + IoWrite8 (LEGACY_8259_MASK_REGISTER_SLAVE, 0xFF); + + // + // Clear page 0 and mark it as allocated if NULL pointer detection is enabled. + // + if (IsNullDetectionEnabled ()) { + ClearFirst4KPage (HobList.Raw); + BuildMemoryAllocationHob (0, EFI_PAGES_TO_SIZE (1), EfiBootServicesData); + } + + // + // Allocate 128KB for the Stack + // + BaseOfStack = AllocatePages (EFI_SIZE_TO_PAGES (STACK_SIZE)); + ASSERT (BaseOfStack != NULL); + + // + // Compute the top of the stack we were allocated. Pre-allocate a UINTN + // for safety. + // + TopOfStack = (VOID *)((UINTN)BaseOfStack + EFI_SIZE_TO_PAGES (STACK_SIZE) * EFI_PAGE_SIZE - CPU_STACK_ALIGNMENT); + TopOfStack = ALIGN_POINTER (TopOfStack, CPU_STACK_ALIGNMENT); + + // + // Get the address and size of the GHCB pages + // + GhcbBase = 0; + GhcbSize = 0; + + PageTables = 0; + if (FeaturePcdGet (PcdDxeIplBuildPageTables)) { + // + // Create page table and save PageMapLevel4 to CR3 + // + PageTables = CreateIdentityMappingPageTables ( + (EFI_PHYSICAL_ADDRESS)(UINTN)BaseOfStack, + STACK_SIZE, + (EFI_PHYSICAL_ADDRESS)(UINTN)GhcbBase, + GhcbSize + ); + } else { + // + // Set NX for stack feature also require PcdDxeIplBuildPageTables be TRUE + // for the DxeIpl and the DxeCore are both X64. + // + ASSERT (PcdGetBool (PcdSetNxForStack) == FALSE); + ASSERT (PcdGetBool (PcdCpuStackGuard) == FALSE); + } + + if (FeaturePcdGet (PcdDxeIplBuildPageTables)) { + AsmWriteCr3 (PageTables); + } + + // + // Update the contents of BSP stack HOB to reflect the real stack info passed to DxeCore. + // + UpdateStackHob ((EFI_PHYSICAL_ADDRESS)(UINTN)BaseOfStack, STACK_SIZE); + + // + // Transfer the control to the entry point of DxeCore. + // + SwitchStack ( + (SWITCH_STACK_ENTRY_POINT)(UINTN)DxeCoreEntryPoint, + HobList.Raw, + NULL, + TopOfStack + ); +} + +/** + Entry point to the C language phase of UEFI payload. + @param[in] BootloaderParameter The starting address of bootloader parameter block. + @retval It will not return if SUCCESS, and return error when passing bootloader parameter. +**/ +EFI_STATUS +EFIAPI +_ModuleEntryPoint ( + IN UINTN BootloaderParameter + ) +{ + return FitUplEntryPoint (BootloaderParameter); +}