mirror of https://github.com/acidanthera/audk.git
UefiCpuPkg: Rename AsmRelocateApLoopStart.
Rename AsmRelocateApLoopStart to AsmRelocateApLoopStartAmdSev Cc: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Sean Rhodes <sean@starlabs.systems> Cc: James Lu <james.lu@intel.com> Cc: Gua Guo <gua.guo@intel.com> Signed-off-by: Yuanhao Xie <yuanhao.xie@intel.com> Acked-by: Gerd Hoffmann <kraxel@redhat.com> Tested-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
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@ -547,8 +547,8 @@ InitMpGlobalData (
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// 64-bit AMD processors with SEV-ES
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//
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Address = BASE_4GB - 1;
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ApLoopFunc = AddressMap->RelocateApLoopFuncAddress;
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ApLoopFuncSize = AddressMap->RelocateApLoopFuncSize;
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ApLoopFunc = AddressMap->RelocateApLoopFuncAddressAmdSev;
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ApLoopFuncSize = AddressMap->RelocateApLoopFuncSizeAmdSev;
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} else {
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//
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// Intel processors (32-bit or 64-bit), 32-bit AMD processors, or 64-bit AMD processors without SEV-ES
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@ -26,8 +26,8 @@ struc MP_ASSEMBLY_ADDRESS_MAP
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.RendezvousFunnelSize CTYPE_UINTN 1
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.RelocateApLoopFuncAddressGeneric CTYPE_UINTN 1
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.RelocateApLoopFuncSizeGeneric CTYPE_UINTN 1
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.RelocateApLoopFuncAddress CTYPE_UINTN 1
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.RelocateApLoopFuncSize CTYPE_UINTN 1
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.RelocateApLoopFuncAddressAmdSev CTYPE_UINTN 1
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.RelocateApLoopFuncSizeAmdSev CTYPE_UINTN 1
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.ModeTransitionOffset CTYPE_UINTN 1
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.SwitchToRealNoNxOffset CTYPE_UINTN 1
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.SwitchToRealPM16ModeOffset CTYPE_UINTN 1
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@ -179,8 +179,8 @@ typedef struct {
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UINTN RendezvousFunnelSize;
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UINT8 *RelocateApLoopFuncAddressGeneric;
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UINTN RelocateApLoopFuncSizeGeneric;
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UINT8 *RelocateApLoopFuncAddress;
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UINTN RelocateApLoopFuncSize;
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UINT8 *RelocateApLoopFuncAddressAmdSev;
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UINTN RelocateApLoopFuncSizeAmdSev;
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UINTN ModeTransitionOffset;
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UINTN SwitchToRealNoNxOffset;
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UINTN SwitchToRealPM16ModeOffset;
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@ -388,7 +388,7 @@ typedef
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**/
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typedef
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VOID
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(EFIAPI *ASM_RELOCATE_AP_LOOP)(
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(EFIAPI *ASM_RELOCATE_AP_LOOP_AMDSEV)(
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IN BOOLEAN MwaitSupport,
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IN UINTN ApTargetCState,
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IN UINTN PmCodeSegment,
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@ -429,7 +429,7 @@ AsmExchangeRole (
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typedef union {
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VOID *Data;
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ASM_RELOCATE_AP_LOOP AmdSevEntry; // 64-bit AMD Sev processors
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ASM_RELOCATE_AP_LOOP_AMDSEV AmdSevEntry; // 64-bit AMD Sev processors
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ASM_RELOCATE_AP_LOOP_GENERIC GenericEntry; // Intel processors (32-bit or 64-bit), 32-bit AMD processors, or AMD non-Sev processors
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} RELOCATE_AP_LOOP_ENTRY;
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@ -277,14 +277,14 @@ CProcedureInvoke:
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%include "AmdSev.nasm"
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RendezvousFunnelProcEnd:
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;-------------------------------------------------------------------------------------
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; AsmRelocateApLoopAmdSev (MwaitSupport, ApTargetCState, PmCodeSegment, TopOfApStack, CountTofinish, Pm16CodeSegment, SevEsAPJumpTable, WakeupBuffer);
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;-------------------------------------------------------------------------------------
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;-------------------------------------------------------------------------------------
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; AsmRelocateApLoop (MwaitSupport, ApTargetCState, PmCodeSegment, TopOfApStack, CountTofinish, Pm16CodeSegment, SevEsAPJumpTable, WakeupBuffer);
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;-------------------------------------------------------------------------------------
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AsmRelocateApLoopStart:
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AsmRelocateApLoopAmdSevStart:
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BITS 64
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cmp qword [rsp + 56], 0 ; SevEsAPJumpTable
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je NoSevEs
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je NoSevEsAmdSev
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;
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; Perform some SEV-ES related setup before leaving 64-bit mode
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@ -329,7 +329,7 @@ BITS 64
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pop rdx
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pop rcx
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NoSevEs:
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NoSevEsAmdSev:
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cli ; Disable interrupt before switching to 32-bit mode
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mov rax, [rsp + 40] ; CountTofinish
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lock dec dword [rax] ; (*CountTofinish)--
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@ -345,7 +345,7 @@ NoSevEs:
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push rcx ; Save MwaitSupport
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push rdx ; Save ApTargetCState
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lea rax, [PmEntry] ; rax <- The start address of transition code
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lea rax, [PmEntryAmdSev] ; rax <- The start address of transition code
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push r8
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push rax
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@ -365,10 +365,10 @@ NoSevEs:
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;
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; Far return into 32-bit mode
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;
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retfq
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o64 retf
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BITS 32
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PmEntry:
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PmEntryAmdSev:
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mov eax, cr0
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btr eax, 31 ; Clear CR0.PG
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mov cr0, eax ; Disable paging and caches
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@ -386,11 +386,11 @@ PmEntry:
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pop ecx,
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add esp, 4
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MwaitCheck:
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MwaitCheckAmdSev:
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cmp cl, 1 ; Check mwait-monitor support
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jnz HltLoop
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jnz HltLoopAmdSev
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mov ebx, edx ; Save C-State to ebx
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MwaitLoop:
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MwaitLoopAmdSev:
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cli
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mov eax, esp ; Set Monitor Address
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xor ecx, ecx ; ecx = 0
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@ -399,9 +399,9 @@ MwaitLoop:
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mov eax, ebx ; Mwait Cx, Target C-State per eax[7:4]
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shl eax, 4
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mwait
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jmp MwaitLoop
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jmp MwaitLoopAmdSev
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HltLoop:
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HltLoopAmdSev:
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pop edx ; PM16CodeSegment
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add esp, 4
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pop ebx ; WakeupBuffer
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@ -409,7 +409,7 @@ HltLoop:
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pop eax ; SevEsAPJumpTable
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add esp, 4
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cmp eax, 0 ; Check for SEV-ES
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je DoHlt
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je DoHltAmdSev
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cli
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;
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@ -439,13 +439,13 @@ BITS 32
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retf
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DoHlt:
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DoHltAmdSev:
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cli
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hlt
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jmp DoHlt
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jmp DoHltAmdSev
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BITS 64
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AsmRelocateApLoopEnd:
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AsmRelocateApLoopAmdSevEnd:
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;-------------------------------------------------------------------------------------
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; AsmRelocateApLoop (MwaitSupport, ApTargetCState, TopOfApStack, CountTofinish, Cr3);
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@ -511,9 +511,9 @@ ASM_PFX(AsmGetAddressMap):
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lea rax, [AsmRelocateApLoopGenericStart]
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mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.RelocateApLoopFuncAddressGeneric], rax
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mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.RelocateApLoopFuncSizeGeneric], AsmRelocateApLoopGenericEnd - AsmRelocateApLoopGenericStart
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lea rax, [AsmRelocateApLoopStart]
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mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.RelocateApLoopFuncAddress], rax
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mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.RelocateApLoopFuncSize], AsmRelocateApLoopEnd - AsmRelocateApLoopStart
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lea rax, [AsmRelocateApLoopAmdSevStart]
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mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.RelocateApLoopFuncAddressAmdSev], rax
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mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.RelocateApLoopFuncSizeAmdSev], AsmRelocateApLoopAmdSevEnd - AsmRelocateApLoopAmdSevStart
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mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.ModeTransitionOffset], Flat32Start - RendezvousFunnelProcStart
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mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.SwitchToRealNoNxOffset], SwitchToRealProcStart - Flat32Start
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mov qword [rcx + MP_ASSEMBLY_ADDRESS_MAP.SwitchToRealPM16ModeOffset], PM16Mode - RendezvousFunnelProcStart
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