mirror of https://github.com/acidanthera/audk.git
UefiCpuPkg/ExceptionLib: Add CET support.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1521 Add information dump for Control Protection exception. Cc: Eric Dong <eric.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Yao Jiewen <jiewen.yao@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com> Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
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@ -1,7 +1,7 @@
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/** @file
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/** @file
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CPU Exception Handler Library common functions.
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CPU Exception Handler Library common functions.
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Copyright (c) 2012 - 2018, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2012 - 2019, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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which accompanies this distribution. The full text of the license may be found at
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@ -20,7 +20,7 @@
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//
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//
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// 1 means an error code will be pushed, otherwise 0
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// 1 means an error code will be pushed, otherwise 0
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//
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//
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CONST UINT32 mErrorCodeFlag = 0x00027d00;
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CONST UINT32 mErrorCodeFlag = 0x00227d00;
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//
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//
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// Define the maximum message length
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// Define the maximum message length
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@ -49,7 +49,8 @@ CONST CHAR8 *mExceptionNameStr[] = {
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"#AC - Alignment Check",
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"#AC - Alignment Check",
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"#MC - Machine-Check",
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"#MC - Machine-Check",
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"#XM - SIMD floating-point",
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"#XM - SIMD floating-point",
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"#VE - Virtualization"
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"#VE - Virtualization",
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"#CP - Control Protection"
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};
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};
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#define EXCEPTION_KNOWN_NAME_NUM (sizeof (mExceptionNameStr) / sizeof (CHAR8 *))
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#define EXCEPTION_KNOWN_NAME_NUM (sizeof (mExceptionNameStr) / sizeof (CHAR8 *))
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@ -1,7 +1,7 @@
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/** @file
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/** @file
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Common header file for CPU Exception Handler Library.
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Common header file for CPU Exception Handler Library.
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Copyright (c) 2012 - 2018, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2012 - 2019, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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which accompanies this distribution. The full text of the license may be found at
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@ -39,6 +39,7 @@
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#define IA32_PF_EC_RSVD BIT3
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#define IA32_PF_EC_RSVD BIT3
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#define IA32_PF_EC_ID BIT4
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#define IA32_PF_EC_ID BIT4
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#define IA32_PF_EC_PK BIT5
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#define IA32_PF_EC_PK BIT5
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#define IA32_PF_EC_SS BIT6
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#define IA32_PF_EC_SGX BIT15
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#define IA32_PF_EC_SGX BIT15
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#include "ArchInterruptDefs.h"
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#include "ArchInterruptDefs.h"
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@ -1,7 +1,7 @@
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/** @file
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/** @file
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IA32 CPU Exception Handler functons.
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IA32 CPU Exception Handler functons.
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Copyright (c) 2012 - 2018, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2012 - 2019, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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which accompanies this distribution. The full text of the license may be found at
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@ -326,13 +326,14 @@ DumpCpuContext (
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);
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);
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if (ExceptionType == EXCEPT_IA32_PAGE_FAULT) {
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if (ExceptionType == EXCEPT_IA32_PAGE_FAULT) {
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InternalPrintMessage (
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InternalPrintMessage (
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" I:%x R:%x U:%x W:%x P:%x PK:%x S:%x",
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" I:%x R:%x U:%x W:%x P:%x PK:%x SS:%x SGX:%x",
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(SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_ID) != 0,
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(SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_ID) != 0,
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(SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_RSVD) != 0,
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(SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_RSVD) != 0,
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(SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_US) != 0,
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(SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_US) != 0,
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(SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_WR) != 0,
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(SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_WR) != 0,
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(SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_P) != 0,
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(SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_P) != 0,
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(SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_PK) != 0,
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(SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_PK) != 0,
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(SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_SS) != 0,
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(SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_SGX) != 0
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(SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_SGX) != 0
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);
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);
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}
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}
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@ -1,7 +1,7 @@
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/** @file
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/** @file
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x64 CPU Exception Handler.
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x64 CPU Exception Handler.
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Copyright (c) 2012 - 2018, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2012 - 2019, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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which accompanies this distribution. The full text of the license may be found at
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@ -299,13 +299,14 @@ DumpCpuContext (
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);
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);
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if (ExceptionType == EXCEPT_IA32_PAGE_FAULT) {
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if (ExceptionType == EXCEPT_IA32_PAGE_FAULT) {
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InternalPrintMessage (
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InternalPrintMessage (
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" I:%x R:%x U:%x W:%x P:%x PK:%x S:%x",
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" I:%x R:%x U:%x W:%x P:%x PK:%x SS:%x SGX:%x",
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(SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_ID) != 0,
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(SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_ID) != 0,
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(SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_RSVD) != 0,
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(SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_RSVD) != 0,
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(SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_US) != 0,
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(SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_US) != 0,
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(SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_WR) != 0,
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(SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_WR) != 0,
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(SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_P) != 0,
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(SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_P) != 0,
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(SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_PK) != 0,
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(SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_PK) != 0,
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(SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_SS) != 0,
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(SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_SGX) != 0
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(SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_SGX) != 0
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);
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);
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}
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}
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