diff --git a/ArmPkg/Drivers/ArmGic/ArmGicLib.c b/ArmPkg/Drivers/ArmGic/ArmGicLib.c index 001e6b1431..8ef32b33a1 100644 --- a/ArmPkg/Drivers/ArmGic/ArmGicLib.c +++ b/ArmPkg/Drivers/ArmGic/ArmGicLib.c @@ -199,6 +199,50 @@ ArmGicEndOfInterrupt ( } } +VOID +EFIAPI +ArmGicSetInterruptPriority ( + IN UINTN GicDistributorBase, + IN UINTN GicRedistributorBase, + IN UINTN Source, + IN UINTN Priority + ) +{ + UINT32 RegOffset; + UINTN RegShift; + ARM_GIC_ARCH_REVISION Revision; + UINTN GicCpuRedistributorBase; + + // Calculate register offset and bit position + RegOffset = Source / 4; + RegShift = (Source % 4) * 8; + + Revision = ArmGicGetSupportedArchRevision (); + if ((Revision == ARM_GIC_ARCH_REVISION_2) || + FeaturePcdGet (PcdArmGicV3WithV2Legacy) || + SourceIsSpi (Source)) { + MmioAndThenOr32 ( + GicDistributorBase + ARM_GIC_ICDIPR + (4 * RegOffset), + ~(0xff << RegShift), + Priority << RegShift + ); + } else { + GicCpuRedistributorBase = GicGetCpuRedistributorBase ( + GicRedistributorBase, + Revision + ); + if (GicCpuRedistributorBase == 0) { + return; + } + + MmioAndThenOr32 ( + GicCpuRedistributorBase + ARM_GIC_ICDIPR + (4 * RegOffset), + ~(0xff << RegShift), + Priority << RegShift + ); + } +} + VOID EFIAPI ArmGicEnableInterrupt ( diff --git a/ArmPkg/Include/Library/ArmGicLib.h b/ArmPkg/Include/Library/ArmGicLib.h index 5509318963..7bcfc00111 100644 --- a/ArmPkg/Include/Library/ArmGicLib.h +++ b/ArmPkg/Include/Library/ArmGicLib.h @@ -208,6 +208,15 @@ ArmGicSetPriorityMask ( IN INTN PriorityMask ); +VOID +EFIAPI +ArmGicSetInterruptPriority ( + IN UINTN GicDistributorBase, + IN UINTN GicRedistributorBase, + IN UINTN Source, + IN UINTN Priority + ); + VOID EFIAPI ArmGicEnableInterrupt (