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MdePkg: Remove non-ASCII characters from header file
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4775 Signed-off-by: Neo Hsueh <Hong-Chih.Hsueh@amd.com> Reviewed-by: Liming Gao <gaoliming@byosoft.com.cn> Cc: Jiangang He <jiangang.he@amd.com>
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@ -46,9 +46,9 @@ CPUID Signature Information
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CPUID Extended Topology Enumeration
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@note
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Reference: AMD64 Architecture Programmer’s Manual Volume 3: General-Purpose and System Instructions,
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Reference: AMD64 Architecture Programmer's Manual Volume 3: General-Purpose and System Instructions,
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Revision 3.35 Appendix E,
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E.4.24 Function 8000_0026—Extended CPU Topology:
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E.4.24 Function 8000_0026-Extended CPU Topology:
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CPUID Fn8000_0026 reports extended topology information for logical processors, including
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asymmetric and heterogenous topology descriptions. Individual logical processors may report
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different values in systems with asynchronous and heterogeneous topologies.
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@ -5733,9 +5733,9 @@ typedef union {
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/// [Bit 7:4] TME Policy/Encryption Algorithm: Only algorithms enumerated in
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/// IA32_TME_CAPABILITY are allowed.
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/// For example:
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/// 0000 – AES-XTS-128.
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/// 0001 – AES-XTS-128 with integrity.
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/// 0010 – AES-XTS-256.
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/// 0000 - AES-XTS-128.
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/// 0001 - AES-XTS-128 with integrity.
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/// 0010 - AES-XTS-256.
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/// Other values are invalid.
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///
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UINT32 TmePolicy : 4;
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@ -5756,7 +5756,7 @@ typedef union {
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/// Similar to enumeration, this is an encoded value.
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/// Writing a value greater than MK_TME_MAX_KEYID_BITS will result in #GP.
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/// Writing a non-zero value to this field will #GP if bit 1 of EAX (Hardware
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/// Encryption Enable) is not also set to ‘1, as encryption hardware must be
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/// Encryption Enable) is not also set to 1, as encryption hardware must be
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/// enabled to use MKTME.
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/// Example: To support 255 keys, this field would be set to a value of 8.
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///
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