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MdePkg/BaseIoLibIntrinsic: IoLibNoIo for LoongArch architecture. 

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4053

LoongArch MMIO library instance, use the IoLibNoIo.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>

Signed-off-by: Chao Li <lichao@loongson.cn>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
This commit is contained in:
Chao Li 2021-11-11 19:09:24 +08:00 committed by mergify[bot]
parent 264e930de0
commit 10d291f746
2 changed files with 9 additions and 4 deletions
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10
MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
View File

@ -4,13 +4,14 @@
# I/O Library that uses compiler intrinsics to perform IN and OUT instructions
# for IA-32 and x64. On IPF, I/O port requests are translated into MMIO requests.
# MMIO requests are forwarded directly to memory. For EBC, I/O port requests
# ASSERT(). For ARM, AARCH64 and RISCV64, this I/O library only provides non I/O
# read and write.
# ASSERT(). For ARM, AARCH64, RISCV64 and LoongArch, this I/O library only provides
# non I/O read and write.
#
# Copyright (c) 2007 - 2021, Intel Corporation. All rights reserved.<BR>
# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
# Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
# Portions Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
# Portions Copyright (c) 2022, Loongson Technology Corporation Limited. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@ -27,7 +28,7 @@
#
# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64 RISCV64
# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64 RISCV64 LOONGARCH64
#
[Sources]
@ -62,6 +63,9 @@
[Sources.RISCV64]
IoLibNoIo.c
[Sources.LOONGARCH64]
IoLibNoIo.c
[Packages]
MdePkg/MdePkg.dec

3
MdePkg/Library/BaseIoLibIntrinsic/IoLibNoIo.c
View File

@ -1,11 +1,12 @@
/** @file
I/O library for non I/O read and write access (memory map I/O read and
write only) architecture, such as ARM and RISC-V processor.
write only) architecture, such as ARM, RISC-V and LoongArch processor.
Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.<BR>
Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>
Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
Copyright (c) 2022, Loongson Technology Corporation Limited. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent