mirror of https://github.com/acidanthera/audk.git
ArmPkg/ArmV7.h: Introduced ARM_ARCH_EXCEPTION_IRQ
This constant allows to reduce architecture difference in the position of the IRQ in the exception table. Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14099 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
parent
3eef284c2e
commit
111339d2a2
|
@ -2,7 +2,7 @@
|
|||
|
||||
Copyright (c) 2009, Hewlett-Packard Company. All rights reserved.<BR>
|
||||
Portions copyright (c) 2010, Apple Inc. All rights reserved.<BR>
|
||||
Portions copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
|
||||
Portions copyright (c) 2011-2013, ARM Ltd. All rights reserved.<BR>
|
||||
|
||||
This program and the accompanying materials
|
||||
are licensed and made available under the terms and conditions of the BSD License
|
||||
|
@ -24,6 +24,7 @@ Abstract:
|
|||
|
||||
#include <PiDxe.h>
|
||||
|
||||
#include <Library/ArmLib.h>
|
||||
#include <Library/BaseLib.h>
|
||||
#include <Library/DebugLib.h>
|
||||
#include <Library/BaseMemoryLib.h>
|
||||
|
@ -408,13 +409,13 @@ InterruptDxeInitialize (
|
|||
//
|
||||
// Unregister the default exception handler.
|
||||
//
|
||||
Status = Cpu->RegisterInterruptHandler(Cpu, EXCEPT_ARM_IRQ, NULL);
|
||||
Status = Cpu->RegisterInterruptHandler(Cpu, ARM_ARCH_EXCEPTION_IRQ, NULL);
|
||||
ASSERT_EFI_ERROR(Status);
|
||||
|
||||
//
|
||||
// Register to receive interrupts
|
||||
//
|
||||
Status = Cpu->RegisterInterruptHandler(Cpu, EXCEPT_ARM_IRQ, IrqInterruptHandler);
|
||||
Status = Cpu->RegisterInterruptHandler(Cpu, ARM_ARCH_EXCEPTION_IRQ, IrqInterruptHandler);
|
||||
ASSERT_EFI_ERROR(Status);
|
||||
|
||||
// Register for an ExitBootServicesEvent
|
||||
|
|
|
@ -19,6 +19,9 @@
|
|||
#include <Chipset/ArmV7Mmu.h>
|
||||
#include <Chipset/ArmV7ArchTimer.h>
|
||||
|
||||
// ARM Interrupt ID in Exception Table
|
||||
#define ARM_ARCH_EXCEPTION_IRQ EXCEPT_ARM_IRQ
|
||||
|
||||
// Domain Access Control Register
|
||||
#define DOMAIN_ACCESS_CONTROL_MASK(a) (3UL << (2 * (a)))
|
||||
#define DOMAIN_ACCESS_CONTROL_NONE(a) (0UL << (2 * (a)))
|
||||
|
|
Loading…
Reference in New Issue