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IntelFsp2Pkg: Apply uncrustify changes

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REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737

Apply uncrustify changes to .c/.h files in the IntelFsp2Pkg package

Cc: Andrew Fish <afish@apple.com>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
This commit is contained in:
Michael Kubacki 2021-12-05 14:53:59 -08:00 committed by mergify[bot]
parent 45ce0a67bb
commit 111f2228dd
33 changed files with 877 additions and 882 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
IntelFsp2Pkg/FspNotifyPhase/FspNotifyPhasePeim.c
View File

@ -33,7 +33,7 @@ CONST EFI_DXE_IPL_PPI mDxeIplPpi = {
CONST EFI_PEI_PPI_DESCRIPTOR mInstallDxeIplPpi = { CONST EFI_PEI_PPI_DESCRIPTOR mInstallDxeIplPpi = {
EFI_PEI_PPI_DESCRIPTOR_PPI, EFI_PEI_PPI_DESCRIPTOR_PPI,
&gEfiDxeIplPpiGuid, &gEfiDxeIplPpiGuid,
(VOID *) &mDxeIplPpi (VOID *)&mDxeIplPpi
}; };
CONST EFI_PEI_PPI_DESCRIPTOR gEndOfPeiSignalPpi = { CONST EFI_PEI_PPI_DESCRIPTOR gEndOfPeiSignalPpi = {

23
IntelFsp2Pkg/FspSecCore/SecFsp.c
View File

@ -17,7 +17,7 @@
**/ **/
UINT64 UINT64
FspGetExceptionHandler( FspGetExceptionHandler (
IN UINT64 IdtEntryTemplate IN UINT64 IdtEntryTemplate
) )
{ {
@ -26,7 +26,7 @@ FspGetExceptionHandler(
IA32_IDT_GATE_DESCRIPTOR *IdtGateDescriptor; IA32_IDT_GATE_DESCRIPTOR *IdtGateDescriptor;
FSP_INFO_HEADER *FspInfoHeader; FSP_INFO_HEADER *FspInfoHeader;
FspInfoHeader = (FSP_INFO_HEADER *)AsmGetFspInfoHeader(); FspInfoHeader = (FSP_INFO_HEADER *)AsmGetFspInfoHeader ();
ExceptionHandler = IdtEntryTemplate; ExceptionHandler = IdtEntryTemplate;
IdtGateDescriptor = (IA32_IDT_GATE_DESCRIPTOR *)&ExceptionHandler; IdtGateDescriptor = (IA32_IDT_GATE_DESCRIPTOR *)&ExceptionHandler;
Entry = (IdtGateDescriptor->Bits.OffsetHigh << 16) | IdtGateDescriptor->Bits.OffsetLow; Entry = (IdtGateDescriptor->Bits.OffsetHigh << 16) | IdtGateDescriptor->Bits.OffsetLow;
@ -70,7 +70,7 @@ SecGetPlatformData (
// //
// Pointer to the size field // Pointer to the size field
// //
TopOfCar = PcdGet32(PcdTemporaryRamBase) + PcdGet32(PcdTemporaryRamSize); TopOfCar = PcdGet32 (PcdTemporaryRamBase) + PcdGet32 (PcdTemporaryRamSize);
StackPtr = (UINT32 *)(TopOfCar - sizeof (UINT32)); StackPtr = (UINT32 *)(TopOfCar - sizeof (UINT32));
if (*(StackPtr - 1) == FSP_MCUD_SIGNATURE) { if (*(StackPtr - 1) == FSP_MCUD_SIGNATURE) {
@ -127,7 +127,7 @@ FspGlobalDataInit (
// Set FSP Global Data pointer // Set FSP Global Data pointer
// //
SetFspGlobalDataPointer (PeiFspData); SetFspGlobalDataPointer (PeiFspData);
ZeroMem ((VOID *)PeiFspData, sizeof(FSP_GLOBAL_DATA)); ZeroMem ((VOID *)PeiFspData, sizeof (FSP_GLOBAL_DATA));
PeiFspData->Signature = FSP_GLOBAL_DATA_SIGNATURE; PeiFspData->Signature = FSP_GLOBAL_DATA_SIGNATURE;
PeiFspData->Version = 0; PeiFspData->Version = 0;
@ -141,7 +141,7 @@ FspGlobalDataInit (
// Get FSP Header offset // Get FSP Header offset
// It may have multiple FVs, so look into the last one for FSP header // It may have multiple FVs, so look into the last one for FSP header
// //
PeiFspData->FspInfoHeader = (FSP_INFO_HEADER *)AsmGetFspInfoHeader(); PeiFspData->FspInfoHeader = (FSP_INFO_HEADER *)AsmGetFspInfoHeader ();
SecGetPlatformData (PeiFspData); SecGetPlatformData (PeiFspData);
// //
@ -152,10 +152,11 @@ FspGlobalDataInit (
// //
// Set UPD pointer // Set UPD pointer
// //
FspmUpdDataPtr = (VOID *) GetFspApiParameter (); FspmUpdDataPtr = (VOID *)GetFspApiParameter ();
if (FspmUpdDataPtr == NULL) { if (FspmUpdDataPtr == NULL) {
FspmUpdDataPtr = (VOID *)(PeiFspData->FspInfoHeader->ImageBase + PeiFspData->FspInfoHeader->CfgRegionOffset); FspmUpdDataPtr = (VOID *)(PeiFspData->FspInfoHeader->ImageBase + PeiFspData->FspInfoHeader->CfgRegionOffset);
} }
SetFspUpdDataPointer (FspmUpdDataPtr); SetFspUpdDataPointer (FspmUpdDataPtr);
SetFspMemoryInitUpdDataPointer (FspmUpdDataPtr); SetFspMemoryInitUpdDataPointer (FspmUpdDataPtr);
SetFspSiliconInitUpdDataPointer (NULL); SetFspSiliconInitUpdDataPointer (NULL);
@ -186,9 +187,12 @@ FspGlobalDataInit (
for (Idx = 0; Idx < 8; Idx++) { for (Idx = 0; Idx < 8; Idx++) {
ImageId[Idx] = PeiFspData->FspInfoHeader->ImageId[Idx]; ImageId[Idx] = PeiFspData->FspInfoHeader->ImageId[Idx];
} }
ImageId[Idx] = 0; ImageId[Idx] = 0;
DEBUG ((DEBUG_INFO | DEBUG_INIT, "\n============= FSP Spec v%d.%d Header Revision v%x (%a v%x.%x.%x.%x) =============\n", \ DEBUG ((
DEBUG_INFO | DEBUG_INIT,
"\n============= FSP Spec v%d.%d Header Revision v%x (%a v%x.%x.%x.%x) =============\n", \
(PeiFspData->FspInfoHeader->SpecVersion >> 4) & 0xF, \ (PeiFspData->FspInfoHeader->SpecVersion >> 4) & 0xF, \
PeiFspData->FspInfoHeader->SpecVersion & 0xF, \ PeiFspData->FspInfoHeader->SpecVersion & 0xF, \
PeiFspData->FspInfoHeader->HeaderRevision, \ PeiFspData->FspInfoHeader->HeaderRevision, \
@ -196,7 +200,8 @@ FspGlobalDataInit (
(PeiFspData->FspInfoHeader->ImageRevision >> 24) & 0xFF, \ (PeiFspData->FspInfoHeader->ImageRevision >> 24) & 0xFF, \
(PeiFspData->FspInfoHeader->ImageRevision >> 16) & 0xFF, \ (PeiFspData->FspInfoHeader->ImageRevision >> 16) & 0xFF, \
(PeiFspData->FspInfoHeader->ImageRevision >> 8) & 0xFF, \ (PeiFspData->FspInfoHeader->ImageRevision >> 8) & 0xFF, \
PeiFspData->FspInfoHeader->ImageRevision & 0xFF)); PeiFspData->FspInfoHeader->ImageRevision & 0xFF
));
} }
/** /**
@ -213,6 +218,6 @@ FspDataPointerFixUp (
{ {
FSP_GLOBAL_DATA *NewFspData; FSP_GLOBAL_DATA *NewFspData;
NewFspData = (FSP_GLOBAL_DATA *)((UINTN)GetFspGlobalDataPointer() + (UINTN)OffsetGap); NewFspData = (FSP_GLOBAL_DATA *)((UINTN)GetFspGlobalDataPointer () + (UINTN)OffsetGap);
SetFspGlobalDataPointer (NewFspData); SetFspGlobalDataPointer (NewFspData);
} }

4
IntelFsp2Pkg/FspSecCore/SecFsp.h
View File

@ -31,7 +31,7 @@
**/ **/
UINT64 UINT64
FspGetExceptionHandler( FspGetExceptionHandler (
IN UINT64 IdtEntryTemplate IN UINT64 IdtEntryTemplate
); );
@ -52,7 +52,6 @@ FspGlobalDataInit (
IN UINT8 ApiIdx IN UINT8 ApiIdx
); );
/** /**
Adjust the FSP data pointers after the stack is migrated to memory. Adjust the FSP data pointers after the stack is migrated to memory.
@ -65,7 +64,6 @@ FspDataPointerFixUp (
IN UINT32 OffsetGap IN UINT32 OffsetGap
); );
/** /**
This interface returns the base address of FSP binary. This interface returns the base address of FSP binary.

1
IntelFsp2Pkg/FspSecCore/SecFspApiChk.c
View File

@ -7,7 +7,6 @@
#include "SecFsp.h" #include "SecFsp.h"
/** /**
This function check the FSP API calling condition. This function check the FSP API calling condition.

61
IntelFsp2Pkg/FspSecCore/SecMain.c
View File

@ -117,10 +117,11 @@ SecStartup (
IdtTableInStack.PeiService = 0; IdtTableInStack.PeiService = 0;
AsmReadIdtr (&IdtDescriptor); AsmReadIdtr (&IdtDescriptor);
if (IdtDescriptor.Base == 0) { if (IdtDescriptor.Base == 0) {
ExceptionHandler = FspGetExceptionHandler(mIdtEntryTemplate); ExceptionHandler = FspGetExceptionHandler (mIdtEntryTemplate);
for (Index = 0; Index < FixedPcdGet8(PcdFspMaxInterruptSupported); Index ++) { for (Index = 0; Index < FixedPcdGet8 (PcdFspMaxInterruptSupported); Index++) {
CopyMem ((VOID*)&IdtTableInStack.IdtTable[Index], (VOID*)&ExceptionHandler, sizeof (UINT64)); CopyMem ((VOID *)&IdtTableInStack.IdtTable[Index], (VOID *)&ExceptionHandler, sizeof (UINT64));
} }
IdtSize = sizeof (IdtTableInStack.IdtTable); IdtSize = sizeof (IdtTableInStack.IdtTable);
} else { } else {
IdtSize = IdtDescriptor.Limit + 1; IdtSize = IdtDescriptor.Limit + 1;
@ -128,12 +129,13 @@ SecStartup (
// //
// ERROR: IDT table size from boot loader is larger than FSP can support, DeadLoop here! // ERROR: IDT table size from boot loader is larger than FSP can support, DeadLoop here!
// //
CpuDeadLoop(); CpuDeadLoop ();
} else { } else {
CopyMem ((VOID *) (UINTN) &IdtTableInStack.IdtTable, (VOID *) IdtDescriptor.Base, IdtSize); CopyMem ((VOID *)(UINTN)&IdtTableInStack.IdtTable, (VOID *)IdtDescriptor.Base, IdtSize);
} }
} }
IdtDescriptor.Base = (UINTN) &IdtTableInStack.IdtTable;
IdtDescriptor.Base = (UINTN)&IdtTableInStack.IdtTable;
IdtDescriptor.Limit = (UINT16)(IdtSize - 1); IdtDescriptor.Limit = (UINT16)(IdtSize - 1);
AsmWriteIdtr (&IdtDescriptor); AsmWriteIdtr (&IdtDescriptor);
@ -154,17 +156,17 @@ SecStartup (
// Support FSP reserved temporary memory from the whole temporary memory provided by bootloader. // Support FSP reserved temporary memory from the whole temporary memory provided by bootloader.
// FSP reserved temporary memory will not be given to PeiCore. // FSP reserved temporary memory will not be given to PeiCore.
// //
SecCoreData.TemporaryRamBase = (UINT8 *)(UINTN) TempRamBase + PcdGet32 (PcdFspPrivateTemporaryRamSize); SecCoreData.TemporaryRamBase = (UINT8 *)(UINTN)TempRamBase + PcdGet32 (PcdFspPrivateTemporaryRamSize);
SecCoreData.TemporaryRamSize = SizeOfRam - PcdGet32 (PcdFspPrivateTemporaryRamSize); SecCoreData.TemporaryRamSize = SizeOfRam - PcdGet32 (PcdFspPrivateTemporaryRamSize);
if (PcdGet8 (PcdFspHeapSizePercentage) == 0) { if (PcdGet8 (PcdFspHeapSizePercentage) == 0) {
SecCoreData.PeiTemporaryRamBase = SecCoreData.TemporaryRamBase; SecCoreData.PeiTemporaryRamBase = SecCoreData.TemporaryRamBase;
SecCoreData.PeiTemporaryRamSize = SecCoreData.TemporaryRamSize; SecCoreData.PeiTemporaryRamSize = SecCoreData.TemporaryRamSize;
SecCoreData.StackBase = (VOID *)GetFspEntryStack(); // Share the same boot loader stack SecCoreData.StackBase = (VOID *)GetFspEntryStack (); // Share the same boot loader stack
SecCoreData.StackSize = 0; SecCoreData.StackSize = 0;
} else { } else {
SecCoreData.PeiTemporaryRamBase = SecCoreData.TemporaryRamBase; SecCoreData.PeiTemporaryRamBase = SecCoreData.TemporaryRamBase;
SecCoreData.PeiTemporaryRamSize = SecCoreData.TemporaryRamSize * PcdGet8 (PcdFspHeapSizePercentage) / 100; SecCoreData.PeiTemporaryRamSize = SecCoreData.TemporaryRamSize * PcdGet8 (PcdFspHeapSizePercentage) / 100;
SecCoreData.StackBase = (VOID*)(UINTN)((UINTN)SecCoreData.TemporaryRamBase + SecCoreData.PeiTemporaryRamSize); SecCoreData.StackBase = (VOID *)(UINTN)((UINTN)SecCoreData.TemporaryRamBase + SecCoreData.PeiTemporaryRamSize);
SecCoreData.StackSize = SecCoreData.TemporaryRamSize - SecCoreData.PeiTemporaryRamSize; SecCoreData.StackSize = SecCoreData.TemporaryRamSize - SecCoreData.PeiTemporaryRamSize;
} }
@ -214,10 +216,10 @@ SecTemporaryRamSupport (
) )
{ {
IA32_DESCRIPTOR IdtDescriptor; IA32_DESCRIPTOR IdtDescriptor;
VOID* OldHeap; VOID *OldHeap;
VOID* NewHeap; VOID *NewHeap;
VOID* OldStack; VOID *OldStack;
VOID* NewStack; VOID *NewStack;
UINTN HeapSize; UINTN HeapSize;
UINTN StackSize; UINTN StackSize;
@ -231,33 +233,31 @@ SecTemporaryRamSupport (
GetFspGlobalDataPointer ()->OnSeparateStack = 1; GetFspGlobalDataPointer ()->OnSeparateStack = 1;
if (PcdGet8 (PcdFspHeapSizePercentage) == 0) { if (PcdGet8 (PcdFspHeapSizePercentage) == 0) {
CurrentStack = AsmReadEsp ();
CurrentStack = AsmReadEsp(); FspStackBase = (UINTN)GetFspEntryStack ();
FspStackBase = (UINTN)GetFspEntryStack();
StackSize = FspStackBase - CurrentStack; StackSize = FspStackBase - CurrentStack;
HeapSize = CopySize; HeapSize = CopySize;
OldHeap = (VOID*)(UINTN)TemporaryMemoryBase; OldHeap = (VOID *)(UINTN)TemporaryMemoryBase;
NewHeap = (VOID*)((UINTN)PermanentMemoryBase); NewHeap = (VOID *)((UINTN)PermanentMemoryBase);
OldStack = (VOID*)CurrentStack; OldStack = (VOID *)CurrentStack;
// //
//The old stack is copied at the end of the stack region because stack grows down. // The old stack is copied at the end of the stack region because stack grows down.
// //
NewStack = (VOID*)((UINTN)PermanentMemoryBase - StackSize); NewStack = (VOID *)((UINTN)PermanentMemoryBase - StackSize);
} else { } else {
HeapSize = CopySize * PcdGet8 (PcdFspHeapSizePercentage) / 100 ; HeapSize = CopySize * PcdGet8 (PcdFspHeapSizePercentage) / 100;
StackSize = CopySize - HeapSize; StackSize = CopySize - HeapSize;
OldHeap = (VOID*)(UINTN)TemporaryMemoryBase; OldHeap = (VOID *)(UINTN)TemporaryMemoryBase;
NewHeap = (VOID*)((UINTN)PermanentMemoryBase + StackSize); NewHeap = (VOID *)((UINTN)PermanentMemoryBase + StackSize);
OldStack = (VOID*)((UINTN)TemporaryMemoryBase + HeapSize);
NewStack = (VOID*)(UINTN)PermanentMemoryBase;
OldStack = (VOID *)((UINTN)TemporaryMemoryBase + HeapSize);
NewStack = (VOID *)(UINTN)PermanentMemoryBase;
} }
// //
// Migrate Heap // Migrate Heap
// //
@ -268,7 +268,6 @@ SecTemporaryRamSupport (
// //
CopyMem (NewStack, OldStack, StackSize); CopyMem (NewStack, OldStack, StackSize);
// //
// We need *not* fix the return address because currently, // We need *not* fix the return address because currently,
// The PeiCore is executed in flash. // The PeiCore is executed in flash.
@ -293,8 +292,8 @@ SecTemporaryRamSupport (
// permanent memory. // permanent memory.
// //
SecSwitchStack ( SecSwitchStack (
(UINT32) (UINTN) OldStack, (UINT32)(UINTN)OldStack,
(UINT32) (UINTN) NewStack (UINT32)(UINTN)NewStack
); );
return EFI_SUCCESS; return EFI_SUCCESS;

4
IntelFsp2Pkg/FspSecCore/SecMain.h
View File

@ -8,7 +8,6 @@
#ifndef _SEC_CORE_H_ #ifndef _SEC_CORE_H_
#define _SEC_CORE_H_ #define _SEC_CORE_H_
#include <PiPei.h> #include <PiPei.h>
#include <Ppi/TemporaryRamSupport.h> #include <Ppi/TemporaryRamSupport.h>
@ -27,7 +26,7 @@
typedef VOID (*PEI_CORE_ENTRY) ( \ typedef VOID (*PEI_CORE_ENTRY) ( \
IN CONST EFI_SEC_PEI_HAND_OFF *SecCoreData, \ IN CONST EFI_SEC_PEI_HAND_OFF *SecCoreData, \
IN CONST EFI_PEI_PPI_DESCRIPTOR *PpiList \ IN CONST EFI_PEI_PPI_DESCRIPTOR *PpiList \
); );
typedef struct _SEC_IDT_TABLE { typedef struct _SEC_IDT_TABLE {
// //
@ -81,7 +80,6 @@ SecTemporaryRamSupport (
IN UINTN CopySize IN UINTN CopySize
); );
/** /**
Entry point to the C language phase of SEC. After the SEC assembly Entry point to the C language phase of SEC. After the SEC assembly

22
IntelFsp2Pkg/Include/FspEas/FspApi.h
View File

@ -60,7 +60,7 @@
*/ */
typedef typedef
EFI_STATUS EFI_STATUS
(EFIAPI *FSP_EVENT_HANDLER) ( (EFIAPI *FSP_EVENT_HANDLER)(
IN EFI_STATUS_CODE_TYPE Type, IN EFI_STATUS_CODE_TYPE Type,
IN EFI_STATUS_CODE_VALUE Value, IN EFI_STATUS_CODE_VALUE Value,
IN UINT32 Instance, IN UINT32 Instance,
@ -80,8 +80,8 @@ EFI_STATUS
*/ */
typedef typedef
UINT32 UINT32
(EFIAPI *FSP_DEBUG_HANDLER) ( (EFIAPI *FSP_DEBUG_HANDLER)(
IN CHAR8* DebugMessage, IN CHAR8 *DebugMessage,
IN UINT32 MessageLength IN UINT32 MessageLength
); );
@ -359,7 +359,7 @@ typedef struct {
**/ **/
typedef typedef
EFI_STATUS EFI_STATUS
(EFIAPI *FSP_TEMP_RAM_INIT) ( (EFIAPI *FSP_TEMP_RAM_INIT)(
IN VOID *FsptUpdDataPtr IN VOID *FsptUpdDataPtr
); );
@ -379,7 +379,7 @@ EFI_STATUS
**/ **/
typedef typedef
EFI_STATUS EFI_STATUS
(EFIAPI *FSP_NOTIFY_PHASE) ( (EFIAPI *FSP_NOTIFY_PHASE)(
IN NOTIFY_PHASE_PARAMS *NotifyPhaseParamPtr IN NOTIFY_PHASE_PARAMS *NotifyPhaseParamPtr
); );
@ -407,12 +407,11 @@ EFI_STATUS
**/ **/
typedef typedef
EFI_STATUS EFI_STATUS
(EFIAPI *FSP_MEMORY_INIT) ( (EFIAPI *FSP_MEMORY_INIT)(
IN VOID *FspmUpdDataPtr, IN VOID *FspmUpdDataPtr,
OUT VOID **HobListPtr OUT VOID **HobListPtr
); );
/** /**
This FSP API is called after FspMemoryInit API. This FSP API tears down the temporary This FSP API is called after FspMemoryInit API. This FSP API tears down the temporary
memory setup by TempRamInit API. This FSP API accepts a pointer to a data structure memory setup by TempRamInit API. This FSP API accepts a pointer to a data structure
@ -433,11 +432,10 @@ EFI_STATUS
**/ **/
typedef typedef
EFI_STATUS EFI_STATUS
(EFIAPI *FSP_TEMP_RAM_EXIT) ( (EFIAPI *FSP_TEMP_RAM_EXIT)(
IN VOID *TempRamExitParamPtr IN VOID *TempRamExitParamPtr
); );
/** /**
This FSP API is called after TempRamExit API. This FSP API is called after TempRamExit API.
FspMemoryInit, TempRamExit and FspSiliconInit APIs provide an alternate method to complete the FspMemoryInit, TempRamExit and FspSiliconInit APIs provide an alternate method to complete the
@ -454,7 +452,7 @@ EFI_STATUS
**/ **/
typedef typedef
EFI_STATUS EFI_STATUS
(EFIAPI *FSP_SILICON_INIT) ( (EFIAPI *FSP_SILICON_INIT)(
IN VOID *FspsUpdDataPtr IN VOID *FspsUpdDataPtr
); );
@ -478,8 +476,8 @@ EFI_STATUS
**/ **/
typedef typedef
EFI_STATUS EFI_STATUS
(EFIAPI *FSP_MULTI_PHASE_SI_INIT) ( (EFIAPI *FSP_MULTI_PHASE_SI_INIT)(
IN FSP_MULTI_PHASE_PARAMS *MultiPhaseSiInitParamPtr IN FSP_MULTI_PHASE_PARAMS *MultiPhaseSiInitParamPtr
); );
#endif #endif

2
IntelFsp2Pkg/Include/Guid/FspHeaderFile.h
View File

@ -225,7 +225,7 @@ typedef struct {
/// ///
/// Byte 0x0C: Patch Data. /// Byte 0x0C: Patch Data.
/// ///
//UINT32 PatchData[]; // UINT32 PatchData[];
} FSP_PATCH_TABLE; } FSP_PATCH_TABLE;
#pragma pack() #pragma pack()

1
IntelFsp2Pkg/Include/Library/CacheAsRamLib.h
View File

@ -21,4 +21,3 @@ DisableCacheAsRam (
); );
#endif #endif

1
IntelFsp2Pkg/Include/Library/CacheLib.h
View File

@ -53,4 +53,3 @@ SetCacheAttributes (
); );
#endif #endif

4
IntelFsp2Pkg/Include/Library/FspCommonLib.h
View File

@ -60,7 +60,7 @@ GetFspApiParameter2 (
@retval FSP entry stack pointer. @retval FSP entry stack pointer.
**/ **/
VOID* VOID *
EFIAPI EFIAPI
GetFspEntryStack ( GetFspEntryStack (
VOID VOID
@ -282,7 +282,6 @@ GetPhaseStatusCode (
VOID VOID
); );
/** /**
This function sets FSP Phase StatusCode. This function sets FSP Phase StatusCode.
@ -305,4 +304,5 @@ EFIAPI
FspApiReturnStatusReset ( FspApiReturnStatusReset (
IN UINT32 FspResetType IN UINT32 FspResetType
); );
#endif #endif

1
IntelFsp2Pkg/Include/Library/FspPlatformLib.h
View File

@ -32,7 +32,6 @@ FspGetSystemMemorySize (
IN OUT UINT64 *HighMemoryLength IN OUT UINT64 *HighMemoryLength
); );
/** /**
Set a new stack frame for the continuation function. Set a new stack frame for the continuation function.

2
IntelFsp2Pkg/Include/Ppi/TempRamExitPpi.h
View File

@ -36,7 +36,7 @@ typedef struct _FSP_TEMP_RAM_EXIT_PPI FSP_TEMP_RAM_EXIT_PPI;
**/ **/
typedef typedef
EFI_STATUS EFI_STATUS
(EFIAPI *FSP_TEMP_RAM_EXIT) ( (EFIAPI *FSP_TEMP_RAM_EXIT)(
IN VOID *TempRamExitParamPtr IN VOID *TempRamExitParamPtr
); );

4
IntelFsp2Pkg/Library/BaseCacheAsRamLibNull/DisableCacheAsRamNull.c
View File

@ -28,8 +28,8 @@ DisableCacheAsRam (
if (DisableCar) { if (DisableCar) {
AsmInvd (); AsmInvd ();
} else { } else {
AsmWbinvd(); AsmWbinvd ();
} }
return ; return;
} }

108
IntelFsp2Pkg/Library/BaseCacheLib/CacheLib.c
View File

@ -69,17 +69,17 @@ typedef struct {
} EFI_FIXED_MTRR; } EFI_FIXED_MTRR;
EFI_FIXED_MTRR mFixedMtrrTable[] = { EFI_FIXED_MTRR mFixedMtrrTable[] = {
{ EFI_MSR_IA32_MTRR_FIX64K_00000, 0, 0x10000}, { EFI_MSR_IA32_MTRR_FIX64K_00000, 0, 0x10000 },
{ EFI_MSR_IA32_MTRR_FIX16K_80000, 0x80000, 0x4000}, { EFI_MSR_IA32_MTRR_FIX16K_80000, 0x80000, 0x4000 },
{ EFI_MSR_IA32_MTRR_FIX16K_A0000, 0xA0000, 0x4000}, { EFI_MSR_IA32_MTRR_FIX16K_A0000, 0xA0000, 0x4000 },
{ EFI_MSR_IA32_MTRR_FIX4K_C0000, 0xC0000, 0x1000}, { EFI_MSR_IA32_MTRR_FIX4K_C0000, 0xC0000, 0x1000 },
{ EFI_MSR_IA32_MTRR_FIX4K_C8000, 0xC8000, 0x1000}, { EFI_MSR_IA32_MTRR_FIX4K_C8000, 0xC8000, 0x1000 },
{ EFI_MSR_IA32_MTRR_FIX4K_D0000, 0xD0000, 0x1000}, { EFI_MSR_IA32_MTRR_FIX4K_D0000, 0xD0000, 0x1000 },
{ EFI_MSR_IA32_MTRR_FIX4K_D8000, 0xD8000, 0x1000}, { EFI_MSR_IA32_MTRR_FIX4K_D8000, 0xD8000, 0x1000 },
{ EFI_MSR_IA32_MTRR_FIX4K_E0000, 0xE0000, 0x1000}, { EFI_MSR_IA32_MTRR_FIX4K_E0000, 0xE0000, 0x1000 },
{ EFI_MSR_IA32_MTRR_FIX4K_E8000, 0xE8000, 0x1000}, { EFI_MSR_IA32_MTRR_FIX4K_E8000, 0xE8000, 0x1000 },
{ EFI_MSR_IA32_MTRR_FIX4K_F0000, 0xF0000, 0x1000}, { EFI_MSR_IA32_MTRR_FIX4K_F0000, 0xF0000, 0x1000 },
{ EFI_MSR_IA32_MTRR_FIX4K_F8000, 0xF8000, 0x1000} { EFI_MSR_IA32_MTRR_FIX4K_F8000, 0xF8000, 0x1000 }
}; };
/** /**
@ -116,9 +116,9 @@ EfiDisableCacheMtrr (
// //
// Disable Cache MTRR // Disable Cache MTRR
// //
*OldMtrr = AsmReadMsr64(EFI_MSR_CACHE_IA32_MTRR_DEF_TYPE); *OldMtrr = AsmReadMsr64 (EFI_MSR_CACHE_IA32_MTRR_DEF_TYPE);
TempQword = (*OldMtrr) & ~B_EFI_MSR_GLOBAL_MTRR_ENABLE & ~B_EFI_MSR_FIXED_MTRR_ENABLE; TempQword = (*OldMtrr) & ~B_EFI_MSR_GLOBAL_MTRR_ENABLE & ~B_EFI_MSR_FIXED_MTRR_ENABLE;
AsmWriteMsr64(EFI_MSR_CACHE_IA32_MTRR_DEF_TYPE, TempQword); AsmWriteMsr64 (EFI_MSR_CACHE_IA32_MTRR_DEF_TYPE, TempQword);
AsmDisableCache (); AsmDisableCache ();
} }
@ -141,7 +141,7 @@ EfiRecoverCacheMtrr (
// Enable Cache MTRR // Enable Cache MTRR
// //
if (EnableMtrr) { if (EnableMtrr) {
TempQword = AsmReadMsr64(EFI_MSR_CACHE_IA32_MTRR_DEF_TYPE); TempQword = AsmReadMsr64 (EFI_MSR_CACHE_IA32_MTRR_DEF_TYPE);
TempQword |= (UINT64)(B_EFI_MSR_GLOBAL_MTRR_ENABLE | B_EFI_MSR_FIXED_MTRR_ENABLE); TempQword |= (UINT64)(B_EFI_MSR_GLOBAL_MTRR_ENABLE | B_EFI_MSR_FIXED_MTRR_ENABLE);
} else { } else {
TempQword = OldMtrr; TempQword = OldMtrr;
@ -219,7 +219,7 @@ Power2MaxMemory (
// //
// Compute initial power of 2 size to return // Compute initial power of 2 size to return
// //
Result = GetPowerOfTwo64(MemoryLength); Result = GetPowerOfTwo64 (MemoryLength);
// //
// Special case base of 0 as all ranges are valid // Special case base of 0 as all ranges are valid
@ -265,8 +265,8 @@ CheckMtrrAlignment (
// MTRRs do not use the first 12 bits so this is safe for now. Only supports // MTRRs do not use the first 12 bits so this is safe for now. Only supports
// up to 52 bits of physical address space. // up to 52 bits of physical address space.
// //
ShiftedBase = (UINT32) RShiftU64 (BaseAddress, 12); ShiftedBase = (UINT32)RShiftU64 (BaseAddress, 12);
ShiftedSize = (UINT32) RShiftU64 (Size, 12); ShiftedSize = (UINT32)RShiftU64 (Size, 12);
// //
// Return the results to the caller of the MOD // Return the results to the caller of the MOD
@ -305,30 +305,36 @@ ProgramFixedMtrr (
for (MsrNum = 0; MsrNum < V_EFI_FIXED_MTRR_NUMBER; MsrNum++) { for (MsrNum = 0; MsrNum < V_EFI_FIXED_MTRR_NUMBER; MsrNum++) {
if ((*Base >= mFixedMtrrTable[MsrNum].BaseAddress) && if ((*Base >= mFixedMtrrTable[MsrNum].BaseAddress) &&
(*Base < (mFixedMtrrTable[MsrNum].BaseAddress + 8 * mFixedMtrrTable[MsrNum].Length))) { (*Base < (mFixedMtrrTable[MsrNum].BaseAddress + 8 * mFixedMtrrTable[MsrNum].Length)))
{
break; break;
} }
} }
if (MsrNum == V_EFI_FIXED_MTRR_NUMBER ) { if (MsrNum == V_EFI_FIXED_MTRR_NUMBER ) {
return EFI_DEVICE_ERROR; return EFI_DEVICE_ERROR;
} }
// //
// We found the fixed MTRR to be programmed // We found the fixed MTRR to be programmed
// //
for (ByteShift=0; ByteShift < 8; ByteShift++) { for (ByteShift = 0; ByteShift < 8; ByteShift++) {
if ( *Base == (mFixedMtrrTable[MsrNum].BaseAddress + ByteShift * mFixedMtrrTable[MsrNum].Length)) { if ( *Base == (mFixedMtrrTable[MsrNum].BaseAddress + ByteShift * mFixedMtrrTable[MsrNum].Length)) {
break; break;
} }
} }
if (ByteShift == 8 ) { if (ByteShift == 8 ) {
return EFI_DEVICE_ERROR; return EFI_DEVICE_ERROR;
} }
for (; ((ByteShift<8) && (*Len >= mFixedMtrrTable[MsrNum].Length));ByteShift++) {
OrMask |= LShiftU64((UINT64) MemoryCacheType, (UINT32) (ByteShift* 8)); for ( ; ((ByteShift < 8) && (*Len >= mFixedMtrrTable[MsrNum].Length)); ByteShift++) {
ClearMask |= LShiftU64((UINT64) 0xFF, (UINT32) (ByteShift * 8)); OrMask |= LShiftU64 ((UINT64)MemoryCacheType, (UINT32)(ByteShift* 8));
ClearMask |= LShiftU64 ((UINT64)0xFF, (UINT32)(ByteShift * 8));
*Len -= mFixedMtrrTable[MsrNum].Length; *Len -= mFixedMtrrTable[MsrNum].Length;
*Base += mFixedMtrrTable[MsrNum].Length; *Base += mFixedMtrrTable[MsrNum].Length;
} }
TempQword = (AsmReadMsr64 (mFixedMtrrTable[MsrNum].Msr) & (~ClearMask)) | OrMask; TempQword = (AsmReadMsr64 (mFixedMtrrTable[MsrNum].Msr) & (~ClearMask)) | OrMask;
AsmWriteMsr64 (mFixedMtrrTable[MsrNum].Msr, TempQword); AsmWriteMsr64 (mFixedMtrrTable[MsrNum].Msr, TempQword);
@ -387,15 +393,15 @@ SetCacheAttributes (
AsmCpuid (CPUID_EXTENDED_FUNCTION, &Cpuid_RegEax, NULL, NULL, NULL); AsmCpuid (CPUID_EXTENDED_FUNCTION, &Cpuid_RegEax, NULL, NULL, NULL);
if (Cpuid_RegEax >= CPUID_VIR_PHY_ADDRESS_SIZE) { if (Cpuid_RegEax >= CPUID_VIR_PHY_ADDRESS_SIZE) {
AsmCpuid (CPUID_VIR_PHY_ADDRESS_SIZE, &Cpuid_RegEax, NULL, NULL, NULL); AsmCpuid (CPUID_VIR_PHY_ADDRESS_SIZE, &Cpuid_RegEax, NULL, NULL, NULL);
ValidMtrrAddressMask = (LShiftU64((UINT64) 1, (Cpuid_RegEax & 0xFF)) - 1) & (~(UINT64)0x0FFF); ValidMtrrAddressMask = (LShiftU64 ((UINT64)1, (Cpuid_RegEax & 0xFF)) - 1) & (~(UINT64)0x0FFF);
} else { } else {
ValidMtrrAddressMask = (LShiftU64((UINT64) 1, 36) - 1) & (~(UINT64)0x0FFF); ValidMtrrAddressMask = (LShiftU64 ((UINT64)1, 36) - 1) & (~(UINT64)0x0FFF);
} }
// //
// Check for invalid parameter // Check for invalid parameter
// //
if ((MemoryAddress & ~ValidMtrrAddressMask) != 0 || (MemoryLength & ~ValidMtrrAddressMask) != 0) { if (((MemoryAddress & ~ValidMtrrAddressMask) != 0) || ((MemoryLength & ~ValidMtrrAddressMask) != 0)) {
return EFI_INVALID_PARAMETER; return EFI_INVALID_PARAMETER;
} }
@ -424,6 +430,7 @@ SetCacheAttributes (
while ((MemoryLength > 0) && (Status == EFI_SUCCESS)) { while ((MemoryLength > 0) && (Status == EFI_SUCCESS)) {
Status = ProgramFixedMtrr (MemoryCacheType, &MemoryAddress, &MemoryLength); Status = ProgramFixedMtrr (MemoryCacheType, &MemoryAddress, &MemoryLength);
} }
EfiRecoverCacheMtrr (TRUE, OldMtrr); EfiRecoverCacheMtrr (TRUE, OldMtrr);
return Status; return Status;
} }
@ -431,7 +438,7 @@ SetCacheAttributes (
// //
// Search if the range attribute has been set before // Search if the range attribute has been set before
// //
Status = SearchForExactMtrr( Status = SearchForExactMtrr (
MemoryAddress, MemoryAddress,
MemoryLength, MemoryLength,
ValidMtrrAddressMask, ValidMtrrAddressMask,
@ -439,7 +446,7 @@ SetCacheAttributes (
&UsedMemoryCacheType &UsedMemoryCacheType
); );
if (!EFI_ERROR(Status)) { if (!EFI_ERROR (Status)) {
// //
// Compare if it has the same type as current setting // Compare if it has the same type as current setting
// //
@ -453,19 +460,20 @@ SetCacheAttributes (
// //
// Check if the set type is the same as Default Type // Check if the set type is the same as Default Type
// //
if (IsDefaultType(MemoryCacheType)) { if (IsDefaultType (MemoryCacheType)) {
// //
// Clear the MTRR // Clear the MTRR
// //
AsmWriteMsr64(UsedMsrNum, 0); AsmWriteMsr64 (UsedMsrNum, 0);
AsmWriteMsr64(UsedMsrNum + 1, 0); AsmWriteMsr64 (UsedMsrNum + 1, 0);
return EFI_SUCCESS; return EFI_SUCCESS;
} else { } else {
// //
// Modify the MTRR type // Modify the MTRR type
// //
EfiProgramMtrr(UsedMsrNum, EfiProgramMtrr (
UsedMsrNum,
MemoryAddress, MemoryAddress,
MemoryLength, MemoryLength,
MemoryCacheType, MemoryCacheType,
@ -476,26 +484,27 @@ SetCacheAttributes (
} }
} }
#if 0 #if 0
// //
// @bug - Need to create memory map so that when checking for overlap we // @bug - Need to create memory map so that when checking for overlap we
// can determine if an overlap exists based on all caching requests. // can determine if an overlap exists based on all caching requests.
// //
// Don't waste a variable MTRR if the caching attrib is same as default in MTRR_DEF_TYPE // Don't waste a variable MTRR if the caching attrib is same as default in MTRR_DEF_TYPE
// //
if (MemoryCacheType == (AsmReadMsr64(EFI_MSR_CACHE_IA32_MTRR_DEF_TYPE) & B_EFI_MSR_CACHE_MEMORY_TYPE)) { if (MemoryCacheType == (AsmReadMsr64 (EFI_MSR_CACHE_IA32_MTRR_DEF_TYPE) & B_EFI_MSR_CACHE_MEMORY_TYPE)) {
if (!CheckMtrrOverlap (MemoryAddress, MemoryAddress+MemoryLength-1)) { if (!CheckMtrrOverlap (MemoryAddress, MemoryAddress+MemoryLength-1)) {
return EFI_SUCCESS; return EFI_SUCCESS;
} }
} }
#endif
#endif
// //
// Find first unused MTRR // Find first unused MTRR
// //
MsrNumEnd = EFI_MSR_CACHE_VARIABLE_MTRR_BASE + (2 * (UINT32)(AsmReadMsr64(EFI_MSR_IA32_MTRR_CAP) & B_EFI_MSR_IA32_MTRR_CAP_VARIABLE_SUPPORT)); MsrNumEnd = EFI_MSR_CACHE_VARIABLE_MTRR_BASE + (2 * (UINT32)(AsmReadMsr64 (EFI_MSR_IA32_MTRR_CAP) & B_EFI_MSR_IA32_MTRR_CAP_VARIABLE_SUPPORT));
for (MsrNum = EFI_MSR_CACHE_VARIABLE_MTRR_BASE; MsrNum < MsrNumEnd; MsrNum +=2) { for (MsrNum = EFI_MSR_CACHE_VARIABLE_MTRR_BASE; MsrNum < MsrNumEnd; MsrNum += 2) {
if ((AsmReadMsr64(MsrNum+1) & B_EFI_MSR_CACHE_MTRR_VALID) == 0 ) { if ((AsmReadMsr64 (MsrNum+1) & B_EFI_MSR_CACHE_MTRR_VALID) == 0 ) {
break; break;
} }
} }
@ -520,14 +529,14 @@ SetCacheAttributes (
// //
TempQword = MemoryLength; TempQword = MemoryLength;
if (TempQword == Power2MaxMemory(MemoryAddress, TempQword)) { if (TempQword == Power2MaxMemory (MemoryAddress, TempQword)) {
EfiProgramMtrr(MsrNum, EfiProgramMtrr (
MsrNum,
MemoryAddress, MemoryAddress,
MemoryLength, MemoryLength,
MemoryCacheType, MemoryCacheType,
ValidMtrrAddressMask ValidMtrrAddressMask
); );
} else { } else {
// //
// Fill in MTRRs with values. Direction can not be checked for this method // Fill in MTRRs with values. Direction can not be checked for this method
@ -545,8 +554,9 @@ SetCacheAttributes (
// //
// Set next power of 2 region // Set next power of 2 region
// //
MemoryLength = Power2MaxMemory(MemoryAddress, TempQword); MemoryLength = Power2MaxMemory (MemoryAddress, TempQword);
EfiProgramMtrr(MsrNum, EfiProgramMtrr (
MsrNum,
MemoryAddress, MemoryAddress,
MemoryLength, MemoryLength,
MemoryCacheType, MemoryCacheType,
@ -578,6 +588,7 @@ ResetCacheAttributes (
UINT64 OldMtrr; UINT64 OldMtrr;
UINT64 CacheType; UINT64 CacheType;
BOOLEAN DisableCar; BOOLEAN DisableCar;
Index = 0; Index = 0;
DisableCar = TRUE; DisableCar = TRUE;
@ -589,7 +600,7 @@ ResetCacheAttributes (
// //
// Set default cache type // Set default cache type
// //
AsmWriteMsr64(EFI_MSR_CACHE_IA32_MTRR_DEF_TYPE, CacheType); AsmWriteMsr64 (EFI_MSR_CACHE_IA32_MTRR_DEF_TYPE, CacheType);
// //
// Disable CAR // Disable CAR
@ -608,7 +619,7 @@ ResetCacheAttributes (
// //
// Reset Variable MTRRs // Reset Variable MTRRs
// //
MsrNumEnd = EFI_MSR_CACHE_VARIABLE_MTRR_BASE + (2 * (UINT32)(AsmReadMsr64(EFI_MSR_IA32_MTRR_CAP) & B_EFI_MSR_IA32_MTRR_CAP_VARIABLE_SUPPORT)); MsrNumEnd = EFI_MSR_CACHE_VARIABLE_MTRR_BASE + (2 * (UINT32)(AsmReadMsr64 (EFI_MSR_IA32_MTRR_CAP) & B_EFI_MSR_IA32_MTRR_CAP_VARIABLE_SUPPORT));
for (MsrNum = EFI_MSR_CACHE_VARIABLE_MTRR_BASE; MsrNum < MsrNumEnd; MsrNum++) { for (MsrNum = EFI_MSR_CACHE_VARIABLE_MTRR_BASE; MsrNum < MsrNumEnd; MsrNum++) {
AsmWriteMsr64 (MsrNum, 0); AsmWriteMsr64 (MsrNum, 0);
} }
@ -650,9 +661,9 @@ SearchForExactMtrr (
return EFI_INVALID_PARAMETER; return EFI_INVALID_PARAMETER;
} }
MsrNumEnd = EFI_MSR_CACHE_VARIABLE_MTRR_BASE + (2 * (UINT32)(AsmReadMsr64(EFI_MSR_IA32_MTRR_CAP) & B_EFI_MSR_IA32_MTRR_CAP_VARIABLE_SUPPORT)); MsrNumEnd = EFI_MSR_CACHE_VARIABLE_MTRR_BASE + (2 * (UINT32)(AsmReadMsr64 (EFI_MSR_IA32_MTRR_CAP) & B_EFI_MSR_IA32_MTRR_CAP_VARIABLE_SUPPORT));
for (MsrNum = EFI_MSR_CACHE_VARIABLE_MTRR_BASE; MsrNum < MsrNumEnd; MsrNum +=2) { for (MsrNum = EFI_MSR_CACHE_VARIABLE_MTRR_BASE; MsrNum < MsrNumEnd; MsrNum += 2) {
TempQword = AsmReadMsr64(MsrNum+1); TempQword = AsmReadMsr64 (MsrNum+1);
if ((TempQword & B_EFI_MSR_CACHE_MTRR_VALID) == 0) { if ((TempQword & B_EFI_MSR_CACHE_MTRR_VALID) == 0) {
continue; continue;
} }
@ -688,10 +699,9 @@ IsDefaultType (
IN EFI_MEMORY_CACHE_TYPE MemoryCacheType IN EFI_MEMORY_CACHE_TYPE MemoryCacheType
) )
{ {
if ((AsmReadMsr64(EFI_MSR_CACHE_IA32_MTRR_DEF_TYPE) & B_EFI_MSR_CACHE_MEMORY_TYPE) != MemoryCacheType) { if ((AsmReadMsr64 (EFI_MSR_CACHE_IA32_MTRR_DEF_TYPE) & B_EFI_MSR_CACHE_MEMORY_TYPE) != MemoryCacheType) {
return FALSE; return FALSE;
} }
return TRUE; return TRUE;
} }

3
IntelFsp2Pkg/Library/BaseCacheLib/CacheLibInternal.h
View File

@ -36,7 +36,7 @@
// Leave one MTRR pairs for OS use // Leave one MTRR pairs for OS use
#define EFI_CACHE_NUM_VAR_MTRR_PAIRS_FOR_OS 1 #define EFI_CACHE_NUM_VAR_MTRR_PAIRS_FOR_OS 1
#define EFI_CACHE_LAST_VARIABLE_MTRR_FOR_BIOS (EFI_MSR_CACHE_VARIABLE_MTRR_END) - \ #define EFI_CACHE_LAST_VARIABLE_MTRR_FOR_BIOS (EFI_MSR_CACHE_VARIABLE_MTRR_END) -\
(EFI_CACHE_NUM_VAR_MTRR_PAIRS_FOR_OS * 2) (EFI_CACHE_NUM_VAR_MTRR_PAIRS_FOR_OS * 2)
#define EFI_MSR_IA32_MTRR_CAP 0x000000FE #define EFI_MSR_IA32_MTRR_CAP 0x000000FE
@ -50,4 +50,3 @@
#define CPUID_EXTENDED_FUNCTION 0x80000000 #define CPUID_EXTENDED_FUNCTION 0x80000000
#endif #endif

37
IntelFsp2Pkg/Library/BaseFspCommonLib/FspCommonLib.c
View File

@ -61,7 +61,7 @@ SetFspGlobalDataPointer (
) )
{ {
ASSERT (FspData != NULL); ASSERT (FspData != NULL);
*((volatile UINT32 *)(UINTN)PcdGet32(PcdGlobalDataPointerAddress)) = (UINT32)(UINTN)FspData; *((volatile UINT32 *)(UINTN)PcdGet32 (PcdGlobalDataPointerAddress)) = (UINT32)(UINTN)FspData;
} }
/** /**
@ -76,7 +76,7 @@ GetFspGlobalDataPointer (
{ {
FSP_GLOBAL_DATA *FspData; FSP_GLOBAL_DATA *FspData;
FspData = *(FSP_GLOBAL_DATA **)(UINTN)PcdGet32(PcdGlobalDataPointerAddress); FspData = *(FSP_GLOBAL_DATA **)(UINTN)PcdGet32 (PcdGlobalDataPointerAddress);
return FspData; return FspData;
} }
@ -94,7 +94,7 @@ GetFspApiParameter (
FSP_GLOBAL_DATA *FspData; FSP_GLOBAL_DATA *FspData;
FspData = GetFspGlobalDataPointer (); FspData = GetFspGlobalDataPointer ();
return *(UINT32 *)(UINTN)(FspData->CoreStack + CONTEXT_STACK_OFFSET(ApiParam[0])); return *(UINT32 *)(UINTN)(FspData->CoreStack + CONTEXT_STACK_OFFSET (ApiParam[0]));
} }
/** /**
@ -102,7 +102,7 @@ GetFspApiParameter (
@retval FSP entry stack pointer. @retval FSP entry stack pointer.
**/ **/
VOID* VOID *
EFIAPI EFIAPI
GetFspEntryStack ( GetFspEntryStack (
VOID VOID
@ -111,7 +111,7 @@ GetFspEntryStack (
FSP_GLOBAL_DATA *FspData; FSP_GLOBAL_DATA *FspData;
FspData = GetFspGlobalDataPointer (); FspData = GetFspGlobalDataPointer ();
return (VOID*)(FspData->CoreStack + CONTEXT_STACK_OFFSET(ApiParam[0])); return (VOID *)(FspData->CoreStack + CONTEXT_STACK_OFFSET (ApiParam[0]));
} }
/** /**
@ -128,7 +128,7 @@ GetFspApiParameter2 (
FSP_GLOBAL_DATA *FspData; FSP_GLOBAL_DATA *FspData;
FspData = GetFspGlobalDataPointer (); FspData = GetFspGlobalDataPointer ();
return *(UINT32 *)(UINTN)(FspData->CoreStack + CONTEXT_STACK_OFFSET(ApiParam[1])); return *(UINT32 *)(UINTN)(FspData->CoreStack + CONTEXT_STACK_OFFSET (ApiParam[1]));
} }
/** /**
@ -146,7 +146,7 @@ SetFspApiParameter (
FSP_GLOBAL_DATA *FspData; FSP_GLOBAL_DATA *FspData;
FspData = GetFspGlobalDataPointer (); FspData = GetFspGlobalDataPointer ();
*(UINT32 *)(UINTN)(FspData->CoreStack + CONTEXT_STACK_OFFSET(ApiParam)) = Value; *(UINT32 *)(UINTN)(FspData->CoreStack + CONTEXT_STACK_OFFSET (ApiParam)) = Value;
} }
/** /**
@ -164,7 +164,7 @@ SetFspApiReturnStatus (
FSP_GLOBAL_DATA *FspData; FSP_GLOBAL_DATA *FspData;
FspData = GetFspGlobalDataPointer (); FspData = GetFspGlobalDataPointer ();
*(UINT32 *)(UINTN)(FspData->CoreStack + CONTEXT_STACK_OFFSET(Eax)) = ReturnStatus; *(UINT32 *)(UINTN)(FspData->CoreStack + CONTEXT_STACK_OFFSET (Eax)) = ReturnStatus;
} }
/** /**
@ -185,7 +185,7 @@ SetFspCoreStackPointer (
UINT32 StackContextLen; UINT32 StackContextLen;
FspData = GetFspGlobalDataPointer (); FspData = GetFspGlobalDataPointer ();
StackContextLen = sizeof(CONTEXT_STACK) / sizeof(UINT32); StackContextLen = sizeof (CONTEXT_STACK) / sizeof (UINT32);
// //
// Reserve space for the ContinuationFunc two parameters // Reserve space for the ContinuationFunc two parameters
@ -216,7 +216,6 @@ SetFspPlatformDataPointer (
FspData->PlatformData.DataPtr = PlatformData; FspData->PlatformData.DataPtr = PlatformData;
} }
/** /**
This function gets the platform specific data pointer. This function gets the platform specific data pointer.
@ -235,7 +234,6 @@ GetFspPlatformDataPointer (
return FspData->PlatformData.DataPtr; return FspData->PlatformData.DataPtr;
} }
/** /**
This function sets the UPD data pointer. This function sets the UPD data pointer.
@ -277,7 +275,6 @@ GetFspUpdDataPointer (
return FspData->UpdDataPtr; return FspData->UpdDataPtr;
} }
/** /**
This function sets the FspMemoryInit UPD data pointer. This function sets the FspMemoryInit UPD data pointer.
@ -319,7 +316,6 @@ GetFspMemoryInitUpdDataPointer (
return FspData->MemoryInitUpdPtr; return FspData->MemoryInitUpdPtr;
} }
/** /**
This function sets the FspSiliconInit UPD data pointer. This function sets the FspSiliconInit UPD data pointer.
@ -361,7 +357,6 @@ GetFspSiliconInitUpdDataPointer (
return FspData->SiliconInitUpdPtr; return FspData->SiliconInitUpdPtr;
} }
/** /**
Set FSP measurement point timestamp. Set FSP measurement point timestamp.
@ -382,7 +377,7 @@ SetFspMeasurePoint (
// Bit [63:56] will be the ID // Bit [63:56] will be the ID
// //
FspData = GetFspGlobalDataPointer (); FspData = GetFspGlobalDataPointer ();
if (FspData->PerfIdx < sizeof(FspData->PerfData) / sizeof(FspData->PerfData[0])) { if (FspData->PerfIdx < sizeof (FspData->PerfData) / sizeof (FspData->PerfData[0])) {
FspData->PerfData[FspData->PerfIdx] = AsmReadTsc (); FspData->PerfData[FspData->PerfIdx] = AsmReadTsc ();
((UINT8 *)(&FspData->PerfData[FspData->PerfIdx]))[7] = Id; ((UINT8 *)(&FspData->PerfData[FspData->PerfIdx]))[7] = Id;
} }
@ -401,7 +396,7 @@ GetFspInfoHeader (
VOID VOID
) )
{ {
return GetFspGlobalDataPointer()->FspInfoHeader; return GetFspGlobalDataPointer ()->FspInfoHeader;
} }
/** /**
@ -415,7 +410,7 @@ SetFspInfoHeader (
FSP_INFO_HEADER *FspInfoHeader FSP_INFO_HEADER *FspInfoHeader
) )
{ {
GetFspGlobalDataPointer()->FspInfoHeader = FspInfoHeader; GetFspGlobalDataPointer ()->FspInfoHeader = FspInfoHeader;
} }
/** /**
@ -432,7 +427,7 @@ GetFspInfoHeaderFromApiContext (
FSP_GLOBAL_DATA *FspData; FSP_GLOBAL_DATA *FspData;
FspData = GetFspGlobalDataPointer (); FspData = GetFspGlobalDataPointer ();
return (FSP_INFO_HEADER *)(*(UINT32 *)(UINTN)(FspData->CoreStack + CONTEXT_STACK_OFFSET(FspInfoHeader))); return (FSP_INFO_HEADER *)(*(UINT32 *)(UINTN)(FspData->CoreStack + CONTEXT_STACK_OFFSET (FspInfoHeader)));
} }
/** /**
@ -463,7 +458,7 @@ GetFspApiCallingIndex (
VOID VOID
) )
{ {
return GetFspGlobalDataPointer()->ApiIdx; return GetFspGlobalDataPointer ()->ApiIdx;
} }
/** /**
@ -494,7 +489,7 @@ GetPhaseStatusCode (
VOID VOID
) )
{ {
return GetFspGlobalDataPointer()->StatusCode; return GetFspGlobalDataPointer ()->StatusCode;
} }
/** /**
@ -529,7 +524,7 @@ FspApiReturnStatusReset (
volatile BOOLEAN LoopUntilReset; volatile BOOLEAN LoopUntilReset;
LoopUntilReset = TRUE; LoopUntilReset = TRUE;
DEBUG ((DEBUG_INFO, "FSP returning control to Bootloader with reset required return status %x\n",FspResetType)); DEBUG ((DEBUG_INFO, "FSP returning control to Bootloader with reset required return status %x\n", FspResetType));
if (GetFspGlobalDataPointer ()->FspMode == FSP_IN_API_MODE) { if (GetFspGlobalDataPointer ()->FspMode == FSP_IN_API_MODE) {
/// ///
/// Below code is not an infinite loop.The control will go back to API calling function in BootLoader each time BootLoader /// Below code is not an infinite loop.The control will go back to API calling function in BootLoader each time BootLoader

20
IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/DebugLib.c
View File

@ -39,7 +39,6 @@ GetStackFramePointer (
VOID VOID
); );
/** /**
Prints a debug message to the debug output device if the specified error level is enabled. Prints a debug message to the debug output device if the specified error level is enabled.
@ -199,6 +198,7 @@ FillHex (
) )
{ {
INTN Idx; INTN Idx;
for (Idx = 7; Idx >= 0; Idx--) { for (Idx = 7; Idx >= 0; Idx--) {
Buffer[Idx] = mHexTable[Value & 0x0F]; Buffer[Idx] = mHexTable[Value & 0x0F];
Value >>= 4; Value >>= 4;
@ -237,9 +237,9 @@ DebugAssertInternal (
// //
AsciiStrnCpyS ( AsciiStrnCpyS (
Buffer, Buffer,
sizeof(Buffer) / sizeof(CHAR8), sizeof (Buffer) / sizeof (CHAR8),
"-> EBP:0x00000000 EIP:0x00000000\n", "-> EBP:0x00000000 EIP:0x00000000\n",
sizeof(Buffer) / sizeof(CHAR8) - 1 sizeof (Buffer) / sizeof (CHAR8) - 1
); );
SerialPortWrite ((UINT8 *)"ASSERT DUMP:\n", 13); SerialPortWrite ((UINT8 *)"ASSERT DUMP:\n", 13);
while (Frame != NULL) { while (Frame != NULL) {
@ -291,7 +291,6 @@ DebugAssert (
DebugAssertInternal (); DebugAssertInternal ();
} }
/** /**
Fills a target buffer with PcdDebugClearMemoryValue, and returns the target buffer. Fills a target buffer with PcdDebugClearMemoryValue, and returns the target buffer.
@ -317,7 +316,6 @@ DebugClearMemory (
return Buffer; return Buffer;
} }
/** /**
Returns TRUE if ASSERT() macros are enabled. Returns TRUE if ASSERT() macros are enabled.
@ -334,10 +332,9 @@ DebugAssertEnabled (
VOID VOID
) )
{ {
return (BOOLEAN) ((PcdGet8(PcdDebugPropertyMask) & DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED) != 0); return (BOOLEAN)((PcdGet8 (PcdDebugPropertyMask) & DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED) != 0);
} }
/** /**
Returns TRUE if DEBUG() macros are enabled. Returns TRUE if DEBUG() macros are enabled.
@ -354,7 +351,7 @@ DebugPrintEnabled (
VOID VOID
) )
{ {
return (BOOLEAN) ((PcdGet8(PcdDebugPropertyMask) & DEBUG_PROPERTY_DEBUG_PRINT_ENABLED) != 0); return (BOOLEAN)((PcdGet8 (PcdDebugPropertyMask) & DEBUG_PROPERTY_DEBUG_PRINT_ENABLED) != 0);
} }
/** /**
@ -373,10 +370,9 @@ DebugCodeEnabled (
VOID VOID
) )
{ {
return (BOOLEAN) ((PcdGet8(PcdDebugPropertyMask) & DEBUG_PROPERTY_DEBUG_CODE_ENABLED) != 0); return (BOOLEAN)((PcdGet8 (PcdDebugPropertyMask) & DEBUG_PROPERTY_DEBUG_CODE_ENABLED) != 0);
} }
/** /**
Returns TRUE if DEBUG_CLEAR_MEMORY() macro is enabled. Returns TRUE if DEBUG_CLEAR_MEMORY() macro is enabled.
@ -393,7 +389,7 @@ DebugClearMemoryEnabled (
VOID VOID
) )
{ {
return (BOOLEAN) ((PcdGet8(PcdDebugPropertyMask) & DEBUG_PROPERTY_CLEAR_MEMORY_ENABLED) != 0); return (BOOLEAN)((PcdGet8 (PcdDebugPropertyMask) & DEBUG_PROPERTY_CLEAR_MEMORY_ENABLED) != 0);
} }
/** /**
@ -411,5 +407,5 @@ DebugPrintLevelEnabled (
IN CONST UINTN ErrorLevel IN CONST UINTN ErrorLevel
) )
{ {
return (BOOLEAN) ((ErrorLevel & PcdGet32(PcdFixedDebugPrintErrorLevel)) != 0); return (BOOLEAN)((ErrorLevel & PcdGet32 (PcdFixedDebugPrintErrorLevel)) != 0);
} }

19
IntelFsp2Pkg/Library/BaseFspPlatformLib/FspPlatformMemory.c
View File

@ -41,10 +41,12 @@ FspGetResourceDescriptorByOwner (
while (!END_OF_HOB_LIST (Hob)) { while (!END_OF_HOB_LIST (Hob)) {
if (Hob.Header->HobType == EFI_HOB_TYPE_RESOURCE_DESCRIPTOR) { if (Hob.Header->HobType == EFI_HOB_TYPE_RESOURCE_DESCRIPTOR) {
if ((Hob.ResourceDescriptor->ResourceType == EFI_RESOURCE_MEMORY_RESERVED) && \ if ((Hob.ResourceDescriptor->ResourceType == EFI_RESOURCE_MEMORY_RESERVED) && \
(CompareGuid (&Hob.ResourceDescriptor->Owner, OwnerGuid))) { (CompareGuid (&Hob.ResourceDescriptor->Owner, OwnerGuid)))
{
return Hob.ResourceDescriptor; return Hob.ResourceDescriptor;
} }
} }
Hob.Raw = GET_NEXT_HOB (Hob); Hob.Raw = GET_NEXT_HOB (Hob);
} }
@ -99,18 +101,21 @@ FspGetSystemMemorySize (
if (Hob.Header->HobType == EFI_HOB_TYPE_RESOURCE_DESCRIPTOR) { if (Hob.Header->HobType == EFI_HOB_TYPE_RESOURCE_DESCRIPTOR) {
if ((Hob.ResourceDescriptor->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY) || if ((Hob.ResourceDescriptor->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY) ||
((Hob.ResourceDescriptor->ResourceType == EFI_RESOURCE_MEMORY_RESERVED) && ((Hob.ResourceDescriptor->ResourceType == EFI_RESOURCE_MEMORY_RESERVED) &&
(Hob.ResourceDescriptor->ResourceAttribute == ResourceAttribute))) { (Hob.ResourceDescriptor->ResourceAttribute == ResourceAttribute)))
{
// //
// Need memory above 1MB to be collected here // Need memory above 1MB to be collected here
// //
if (Hob.ResourceDescriptor->PhysicalStart >= BASE_1MB && if ((Hob.ResourceDescriptor->PhysicalStart >= BASE_1MB) &&
Hob.ResourceDescriptor->PhysicalStart < (EFI_PHYSICAL_ADDRESS) BASE_4GB) { (Hob.ResourceDescriptor->PhysicalStart < (EFI_PHYSICAL_ADDRESS)BASE_4GB))
*LowMemoryLength += (UINT64) (Hob.ResourceDescriptor->ResourceLength); {
} else if (Hob.ResourceDescriptor->PhysicalStart >= (EFI_PHYSICAL_ADDRESS) BASE_4GB) { *LowMemoryLength += (UINT64)(Hob.ResourceDescriptor->ResourceLength);
*HighMemoryLength += (UINT64) (Hob.ResourceDescriptor->ResourceLength); } else if (Hob.ResourceDescriptor->PhysicalStart >= (EFI_PHYSICAL_ADDRESS)BASE_4GB) {
*HighMemoryLength += (UINT64)(Hob.ResourceDescriptor->ResourceLength);
} }
} }
} }
Hob.Raw = GET_NEXT_HOB (Hob); Hob.Raw = GET_NEXT_HOB (Hob);
} }
} }

43
IntelFsp2Pkg/Library/BaseFspPlatformLib/FspPlatformNotify.c
View File

@ -128,6 +128,7 @@ FspSiliconInitDone2 (
Status = EFI_DEVICE_ERROR; // Force to known error. Status = EFI_DEVICE_ERROR; // Force to known error.
break; break;
} }
// //
// This is the end of the FspSiliconInit API // This is the end of the FspSiliconInit API
// Give control back to the boot loader // Give control back to the boot loader
@ -171,9 +172,11 @@ FspMemoryInitDone2 (
if (HobListPtr == NULL) { if (HobListPtr == NULL) {
HobListPtr = (VOID **)GetFspApiParameter2 (); HobListPtr = (VOID **)GetFspApiParameter2 ();
} }
if (HobListPtr != NULL) { if (HobListPtr != NULL) {
*HobListPtr = (VOID *) GetHobList (); *HobListPtr = (VOID *)GetHobList ();
} }
// //
// Convert to FSP EAS defined API return codes // Convert to FSP EAS defined API return codes
// //
@ -189,6 +192,7 @@ FspMemoryInitDone2 (
Status = EFI_DEVICE_ERROR; // Force to known error. Status = EFI_DEVICE_ERROR; // Force to known error.
break; break;
} }
// //
// This is the end of the FspMemoryInit API // This is the end of the FspMemoryInit API
// Give control back to the boot loader // Give control back to the boot loader
@ -196,10 +200,10 @@ FspMemoryInitDone2 (
DEBUG ((DEBUG_INFO | DEBUG_INIT, "FspMemoryInitApi() - [Status: 0x%08X] - End\n", Status)); DEBUG ((DEBUG_INFO | DEBUG_INIT, "FspMemoryInitApi() - [Status: 0x%08X] - End\n", Status));
SetFspMeasurePoint (FSP_PERF_ID_API_FSP_MEMORY_INIT_EXIT); SetFspMeasurePoint (FSP_PERF_ID_API_FSP_MEMORY_INIT_EXIT);
FspData = GetFspGlobalDataPointer (); FspData = GetFspGlobalDataPointer ();
PERF_START_EX(&gFspPerformanceDataGuid, "EventRec", NULL, (FspData->PerfData[0] & FSP_PERFORMANCE_DATA_TIMER_MASK), FSP_STATUS_CODE_TEMP_RAM_INIT | FSP_STATUS_CODE_COMMON_CODE| FSP_STATUS_CODE_API_ENTRY); PERF_START_EX (&gFspPerformanceDataGuid, "EventRec", NULL, (FspData->PerfData[0] & FSP_PERFORMANCE_DATA_TIMER_MASK), FSP_STATUS_CODE_TEMP_RAM_INIT | FSP_STATUS_CODE_COMMON_CODE| FSP_STATUS_CODE_API_ENTRY);
PERF_END_EX(&gFspPerformanceDataGuid, "EventRec", NULL, (FspData->PerfData[1] & FSP_PERFORMANCE_DATA_TIMER_MASK), FSP_STATUS_CODE_TEMP_RAM_INIT | FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_EXIT); PERF_END_EX (&gFspPerformanceDataGuid, "EventRec", NULL, (FspData->PerfData[1] & FSP_PERFORMANCE_DATA_TIMER_MASK), FSP_STATUS_CODE_TEMP_RAM_INIT | FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_EXIT);
PERF_START_EX(&gFspPerformanceDataGuid, "EventRec", NULL, (FspData->PerfData[2] & FSP_PERFORMANCE_DATA_TIMER_MASK), FSP_STATUS_CODE_MEMORY_INIT | FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_ENTRY); PERF_START_EX (&gFspPerformanceDataGuid, "EventRec", NULL, (FspData->PerfData[2] & FSP_PERFORMANCE_DATA_TIMER_MASK), FSP_STATUS_CODE_MEMORY_INIT | FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_ENTRY);
PERF_END_EX(&gFspPerformanceDataGuid, "EventRec", NULL, 0, FSP_STATUS_CODE_MEMORY_INIT | FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_EXIT); PERF_END_EX (&gFspPerformanceDataGuid, "EventRec", NULL, 0, FSP_STATUS_CODE_MEMORY_INIT | FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_EXIT);
REPORT_STATUS_CODE (EFI_PROGRESS_CODE, FSP_STATUS_CODE_MEMORY_INIT | FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_EXIT); REPORT_STATUS_CODE (EFI_PROGRESS_CODE, FSP_STATUS_CODE_MEMORY_INIT | FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_EXIT);
if (GetFspGlobalDataPointer ()->FspMode == FSP_IN_API_MODE) { if (GetFspGlobalDataPointer ()->FspMode == FSP_IN_API_MODE) {
do { do {
@ -217,13 +221,13 @@ FspMemoryInitDone2 (
if (GetFspApiCallingIndex () == TempRamExitApiIndex) { if (GetFspApiCallingIndex () == TempRamExitApiIndex) {
SetPhaseStatusCode (FSP_STATUS_CODE_TEMP_RAM_EXIT); SetPhaseStatusCode (FSP_STATUS_CODE_TEMP_RAM_EXIT);
SetFspMeasurePoint (FSP_PERF_ID_API_TEMP_RAM_EXIT_ENTRY); SetFspMeasurePoint (FSP_PERF_ID_API_TEMP_RAM_EXIT_ENTRY);
PERF_START_EX(&gFspPerformanceDataGuid, "EventRec", NULL, 0, FSP_STATUS_CODE_TEMP_RAM_EXIT | FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_ENTRY); PERF_START_EX (&gFspPerformanceDataGuid, "EventRec", NULL, 0, FSP_STATUS_CODE_TEMP_RAM_EXIT | FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_ENTRY);
REPORT_STATUS_CODE (EFI_PROGRESS_CODE, FSP_STATUS_CODE_TEMP_RAM_EXIT | FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_ENTRY); REPORT_STATUS_CODE (EFI_PROGRESS_CODE, FSP_STATUS_CODE_TEMP_RAM_EXIT | FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_ENTRY);
DEBUG ((DEBUG_INFO | DEBUG_INIT, "TempRamExitApi() - Begin\n")); DEBUG ((DEBUG_INFO | DEBUG_INIT, "TempRamExitApi() - Begin\n"));
} else { } else {
SetPhaseStatusCode (FSP_STATUS_CODE_SILICON_INIT); SetPhaseStatusCode (FSP_STATUS_CODE_SILICON_INIT);
SetFspMeasurePoint (FSP_PERF_ID_API_FSP_SILICON_INIT_ENTRY); SetFspMeasurePoint (FSP_PERF_ID_API_FSP_SILICON_INIT_ENTRY);
PERF_START_EX(&gFspPerformanceDataGuid, "EventRec", NULL, 0, FSP_STATUS_CODE_SILICON_INIT | FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_ENTRY); PERF_START_EX (&gFspPerformanceDataGuid, "EventRec", NULL, 0, FSP_STATUS_CODE_SILICON_INIT | FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_ENTRY);
REPORT_STATUS_CODE (EFI_PROGRESS_CODE, FSP_STATUS_CODE_SILICON_INIT | FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_ENTRY); REPORT_STATUS_CODE (EFI_PROGRESS_CODE, FSP_STATUS_CODE_SILICON_INIT | FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_ENTRY);
DEBUG ((DEBUG_INFO | DEBUG_INIT, "FspSiliconInitApi() - Begin\n")); DEBUG ((DEBUG_INFO | DEBUG_INIT, "FspSiliconInitApi() - Begin\n"));
} }
@ -258,13 +262,14 @@ FspTempRamExitDone2 (
Status = EFI_DEVICE_ERROR; // Force to known error. Status = EFI_DEVICE_ERROR; // Force to known error.
break; break;
} }
// //
// This is the end of the TempRamExit API // This is the end of the TempRamExit API
// Give control back to the boot loader // Give control back to the boot loader
// //
DEBUG ((DEBUG_INFO | DEBUG_INIT, "TempRamExitApi() - [Status: 0x%08X] - End\n", Status)); DEBUG ((DEBUG_INFO | DEBUG_INIT, "TempRamExitApi() - [Status: 0x%08X] - End\n", Status));
SetFspMeasurePoint (FSP_PERF_ID_API_TEMP_RAM_EXIT_EXIT); SetFspMeasurePoint (FSP_PERF_ID_API_TEMP_RAM_EXIT_EXIT);
PERF_END_EX(&gFspPerformanceDataGuid, "EventRec", NULL, 0, FSP_STATUS_CODE_TEMP_RAM_EXIT | FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_EXIT); PERF_END_EX (&gFspPerformanceDataGuid, "EventRec", NULL, 0, FSP_STATUS_CODE_TEMP_RAM_EXIT | FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_EXIT);
REPORT_STATUS_CODE (EFI_PROGRESS_CODE, FSP_STATUS_CODE_TEMP_RAM_EXIT | FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_EXIT); REPORT_STATUS_CODE (EFI_PROGRESS_CODE, FSP_STATUS_CODE_TEMP_RAM_EXIT | FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_EXIT);
if (GetFspGlobalDataPointer ()->FspMode == FSP_IN_API_MODE) { if (GetFspGlobalDataPointer ()->FspMode == FSP_IN_API_MODE) {
do { do {
@ -275,9 +280,10 @@ FspTempRamExitDone2 (
} }
} while (FspStatus != EFI_SUCCESS); } while (FspStatus != EFI_SUCCESS);
} }
SetPhaseStatusCode (FSP_STATUS_CODE_SILICON_INIT); SetPhaseStatusCode (FSP_STATUS_CODE_SILICON_INIT);
SetFspMeasurePoint (FSP_PERF_ID_API_FSP_SILICON_INIT_ENTRY); SetFspMeasurePoint (FSP_PERF_ID_API_FSP_SILICON_INIT_ENTRY);
PERF_START_EX(&gFspPerformanceDataGuid, "EventRec", NULL, 0, FSP_STATUS_CODE_SILICON_INIT | FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_ENTRY); PERF_START_EX (&gFspPerformanceDataGuid, "EventRec", NULL, 0, FSP_STATUS_CODE_SILICON_INIT | FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_ENTRY);
REPORT_STATUS_CODE (EFI_PROGRESS_CODE, FSP_STATUS_CODE_SILICON_INIT | FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_ENTRY); REPORT_STATUS_CODE (EFI_PROGRESS_CODE, FSP_STATUS_CODE_SILICON_INIT | FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_ENTRY);
DEBUG ((DEBUG_INFO | DEBUG_INIT, "SiliconInitApi() - Begin\n")); DEBUG ((DEBUG_INFO | DEBUG_INIT, "SiliconInitApi() - Begin\n"));
} }
@ -301,8 +307,7 @@ FspWaitForNotify (
volatile EFI_STATUS FspStatus; volatile EFI_STATUS FspStatus;
NotificationCount = 0; NotificationCount = 0;
while (NotificationCount < sizeof(mFspNotifySequence) / sizeof(UINT32)) { while (NotificationCount < sizeof (mFspNotifySequence) / sizeof (UINT32)) {
Count = (UINT8)((NotificationCount << 1) & 0x07); Count = (UINT8)((NotificationCount << 1) & 0x07);
SetFspMeasurePoint (FSP_PERF_ID_API_NOTIFY_POST_PCI_ENTRY + Count); SetFspMeasurePoint (FSP_PERF_ID_API_NOTIFY_POST_PCI_ENTRY + Count);
@ -312,7 +317,7 @@ FspWaitForNotify (
REPORT_STATUS_CODE (EFI_PROGRESS_CODE, FSP_STATUS_CODE_POST_PCIE_ENUM_NOTIFICATION | FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_ENTRY); REPORT_STATUS_CODE (EFI_PROGRESS_CODE, FSP_STATUS_CODE_POST_PCIE_ENUM_NOTIFICATION | FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_ENTRY);
} else if (NotificationCount == 1) { } else if (NotificationCount == 1) {
SetPhaseStatusCode (FSP_STATUS_CODE_READY_TO_BOOT_NOTIFICATION); SetPhaseStatusCode (FSP_STATUS_CODE_READY_TO_BOOT_NOTIFICATION);
PERF_START_EX(&gFspPerformanceDataGuid, "EventRec", NULL, 0, FSP_STATUS_CODE_READY_TO_BOOT_NOTIFICATION | FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_ENTRY); PERF_START_EX (&gFspPerformanceDataGuid, "EventRec", NULL, 0, FSP_STATUS_CODE_READY_TO_BOOT_NOTIFICATION | FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_ENTRY);
REPORT_STATUS_CODE (EFI_PROGRESS_CODE, FSP_STATUS_CODE_READY_TO_BOOT_NOTIFICATION | FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_ENTRY); REPORT_STATUS_CODE (EFI_PROGRESS_CODE, FSP_STATUS_CODE_READY_TO_BOOT_NOTIFICATION | FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_ENTRY);
} else if (NotificationCount == 2) { } else if (NotificationCount == 2) {
SetPhaseStatusCode (FSP_STATUS_CODE_END_OF_FIRMWARE_NOTIFICATION); SetPhaseStatusCode (FSP_STATUS_CODE_END_OF_FIRMWARE_NOTIFICATION);
@ -333,7 +338,7 @@ FspWaitForNotify (
// Process Notification and Give control back to the boot loader framework caller // Process Notification and Give control back to the boot loader framework caller
// //
Status = FspNotificationHandler (NotificationValue); Status = FspNotificationHandler (NotificationValue);
if (!EFI_ERROR(Status)) { if (!EFI_ERROR (Status)) {
NotificationCount++; NotificationCount++;
} }
} }
@ -342,26 +347,28 @@ FspWaitForNotify (
SetFspMeasurePoint (FSP_PERF_ID_API_NOTIFY_POST_PCI_EXIT + Count); SetFspMeasurePoint (FSP_PERF_ID_API_NOTIFY_POST_PCI_EXIT + Count);
if ((NotificationCount - 1) == 0) { if ((NotificationCount - 1) == 0) {
PERF_END_EX(&gFspPerformanceDataGuid, "EventRec", NULL, 0, FSP_STATUS_CODE_POST_PCIE_ENUM_NOTIFICATION | FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_EXIT); PERF_END_EX (&gFspPerformanceDataGuid, "EventRec", NULL, 0, FSP_STATUS_CODE_POST_PCIE_ENUM_NOTIFICATION | FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_EXIT);
REPORT_STATUS_CODE (EFI_PROGRESS_CODE, FSP_STATUS_CODE_POST_PCIE_ENUM_NOTIFICATION | FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_EXIT); REPORT_STATUS_CODE (EFI_PROGRESS_CODE, FSP_STATUS_CODE_POST_PCIE_ENUM_NOTIFICATION | FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_EXIT);
} else if ((NotificationCount - 1) == 1) { } else if ((NotificationCount - 1) == 1) {
PERF_END_EX(&gFspPerformanceDataGuid, "EventRec", NULL, 0, FSP_STATUS_CODE_READY_TO_BOOT_NOTIFICATION | FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_EXIT); PERF_END_EX (&gFspPerformanceDataGuid, "EventRec", NULL, 0, FSP_STATUS_CODE_READY_TO_BOOT_NOTIFICATION | FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_EXIT);
REPORT_STATUS_CODE (EFI_PROGRESS_CODE, FSP_STATUS_CODE_READY_TO_BOOT_NOTIFICATION | FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_EXIT); REPORT_STATUS_CODE (EFI_PROGRESS_CODE, FSP_STATUS_CODE_READY_TO_BOOT_NOTIFICATION | FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_EXIT);
} else if ((NotificationCount - 1) == 2) { } else if ((NotificationCount - 1) == 2) {
PERF_END_EX(&gFspPerformanceDataGuid, "EventRec", NULL, 0, FSP_STATUS_CODE_END_OF_FIRMWARE_NOTIFICATION | FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_EXIT); PERF_END_EX (&gFspPerformanceDataGuid, "EventRec", NULL, 0, FSP_STATUS_CODE_END_OF_FIRMWARE_NOTIFICATION | FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_EXIT);
REPORT_STATUS_CODE (EFI_PROGRESS_CODE, FSP_STATUS_CODE_END_OF_FIRMWARE_NOTIFICATION | FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_EXIT); REPORT_STATUS_CODE (EFI_PROGRESS_CODE, FSP_STATUS_CODE_END_OF_FIRMWARE_NOTIFICATION | FSP_STATUS_CODE_COMMON_CODE | FSP_STATUS_CODE_API_EXIT);
} }
if (GetFspGlobalDataPointer ()->FspMode == FSP_IN_API_MODE) { if (GetFspGlobalDataPointer ()->FspMode == FSP_IN_API_MODE) {
FspStatus = Status; FspStatus = Status;
do { do {
SetFspApiReturnStatus(Status); SetFspApiReturnStatus (Status);
Pei2LoaderSwitchStack(); Pei2LoaderSwitchStack ();
if (Status != EFI_SUCCESS) { if (Status != EFI_SUCCESS) {
DEBUG ((DEBUG_ERROR, "!!!ERROR: NotifyPhaseApi() [Phase: %08X] - Failed - [Status: 0x%08X]\n", NotificationValue, Status)); DEBUG ((DEBUG_ERROR, "!!!ERROR: NotifyPhaseApi() [Phase: %08X] - Failed - [Status: 0x%08X]\n", NotificationValue, Status));
} }
} while (FspStatus != EFI_SUCCESS); } while (FspStatus != EFI_SUCCESS);
} }
} }
// //
// Control goes back to the PEI Core and it dispatches further PEIMs. // Control goes back to the PEI Core and it dispatches further PEIMs.
// DXEIPL is the final one to transfer control back to the boot loader. // DXEIPL is the final one to transfer control back to the boot loader.

1
IntelFsp2Pkg/Library/BaseFspSwitchStackLib/FspSwitchStackLib.c
View File

@ -33,4 +33,3 @@ SwapStack (
FspData->CoreStack = NewStack; FspData->CoreStack = NewStack;
return OldStack; return OldStack;
} }

47
IntelFsp2Pkg/Tools/Tests/ExpectedFspmUpd.h
View File

@ -5,68 +5,65 @@
#pragma pack(1) #pragma pack(1)
/** Fsp M Configuration /** Fsp M Configuration
**/ **/
typedef struct { typedef struct {
/** Offset 0x00C8 - Debug Serial Port Base address
/** Offset 0x00C8 - Debug Serial Port Base address
Debug serial port base address. This option will be used only when the 'Serial Port Debug serial port base address. This option will be used only when the 'Serial Port
Debug Device' option is set to 'External Device'. 0x00000000(Default). Debug Device' option is set to 'External Device'. 0x00000000(Default).
**/ **/
UINT32 SerialDebugPortAddress; UINT32 SerialDebugPortAddress;
/** Offset 0x00CC - Debug Serial Port Type /** Offset 0x00CC - Debug Serial Port Type
16550 compatible debug serial port resource type. NONE means no serial port support. 16550 compatible debug serial port resource type. NONE means no serial port support.
0x02:MMIO(Default). 0x02:MMIO(Default).
0:NONE, 1:I/O, 2:MMIO 0:NONE, 1:I/O, 2:MMIO
**/ **/
UINT8 SerialDebugPortType; UINT8 SerialDebugPortType;
/** Offset 0x00CD - Serial Port Debug Device /** Offset 0x00CD - Serial Port Debug Device
Select active serial port device for debug.For SOC UART devices,'Debug Serial Port Select active serial port device for debug.For SOC UART devices,'Debug Serial Port
Base' options will be ignored. 0x02:SOC UART2(Default). Base' options will be ignored. 0x02:SOC UART2(Default).
0:SOC UART0, 1:SOC UART1, 2:SOC UART2, 3:External Device 0:SOC UART0, 1:SOC UART1, 2:SOC UART2, 3:External Device
**/ **/
UINT8 SerialDebugPortDevice; UINT8 SerialDebugPortDevice;
/** Offset 0x00CE - Debug Serial Port Stride Size /** Offset 0x00CE - Debug Serial Port Stride Size
Debug serial port register map stride size in bytes. 0x00:1, 0x02:4(Default). Debug serial port register map stride size in bytes. 0x00:1, 0x02:4(Default).
0:1, 2:4 0:1, 2:4
**/ **/
UINT8 SerialDebugPortStrideSize; UINT8 SerialDebugPortStrideSize;
/** Offset 0x00CF /** Offset 0x00CF
**/ **/
UINT8 UnusedUpdSpace2[1]; UINT8 UnusedUpdSpace2[1];
/** Offset 0x00D0 /** Offset 0x00D0
**/ **/
UINT8 ReservedFspmUpd[4]; UINT8 ReservedFspmUpd[4];
} FSP_M_CONFIG; } FSP_M_CONFIG;
/** Fsp M UPD Configuration /** Fsp M UPD Configuration
**/ **/
typedef struct { typedef struct {
/** Offset 0x0000
/** Offset 0x0000 **/
**/
FSP_UPD_HEADER FspUpdHeader; FSP_UPD_HEADER FspUpdHeader;
/** Offset 0x00A8 /** Offset 0x00A8
**/ **/
FSPM_ARCH_UPD FspmArchUpd; FSPM_ARCH_UPD FspmArchUpd;
/** Offset 0x00C8 /** Offset 0x00C8
**/ **/
FSP_M_CONFIG FspmConfig; FSP_M_CONFIG FspmConfig;
/** Offset 0x00D4 /** Offset 0x00D4
**/ **/
UINT8 UnusedUpdSpace3[2]; UINT8 UnusedUpdSpace3[2];
/** Offset 0x00D6 /** Offset 0x00D6
**/ **/
UINT16 UpdTerminator; UINT16 UpdTerminator;
} FSPM_UPD; } FSPM_UPD;

47
IntelFsp2Pkg/Tools/Tests/ExpectedFspsUpd.h
View File

@ -5,62 +5,59 @@
#pragma pack(1) #pragma pack(1)
/** Fsp S Configuration /** Fsp S Configuration
**/ **/
typedef struct { typedef struct {
/** Offset 0x0118 - BMP Logo Data Size
/** Offset 0x0118 - BMP Logo Data Size
BMP logo data buffer size. 0x00000000(Default). BMP logo data buffer size. 0x00000000(Default).
**/ **/
UINT32 LogoSize; UINT32 LogoSize;
/** Offset 0x011C - BMP Logo Data Pointer /** Offset 0x011C - BMP Logo Data Pointer
BMP logo data pointer to a BMP format buffer. 0x00000000(Default). BMP logo data pointer to a BMP format buffer. 0x00000000(Default).
**/ **/
UINT32 LogoPtr; UINT32 LogoPtr;
/** Offset 0x0120 - Graphics Configuration Data Pointer /** Offset 0x0120 - Graphics Configuration Data Pointer
Graphics configuration data used for initialization. 0x00000000(Default). Graphics configuration data used for initialization. 0x00000000(Default).
**/ **/
UINT32 GraphicsConfigPtr; UINT32 GraphicsConfigPtr;
/** Offset 0x0124 - PCI GFX Temporary MMIO Base /** Offset 0x0124 - PCI GFX Temporary MMIO Base
PCI Temporary PCI GFX Base used before full PCI enumeration. 0x80000000(Default). PCI Temporary PCI GFX Base used before full PCI enumeration. 0x80000000(Default).
**/ **/
UINT32 PciTempResourceBase; UINT32 PciTempResourceBase;
/** Offset 0x0128 /** Offset 0x0128
**/ **/
UINT8 UnusedUpdSpace1[3]; UINT8 UnusedUpdSpace1[3];
/** Offset 0x012B /** Offset 0x012B
**/ **/
UINT8 ReservedFspsUpd; UINT8 ReservedFspsUpd;
} FSP_S_CONFIG; } FSP_S_CONFIG;
/** Fsp S UPD Configuration /** Fsp S UPD Configuration
**/ **/
typedef struct { typedef struct {
/** Offset 0x0000
/** Offset 0x0000 **/
**/
FSP_UPD_HEADER FspUpdHeader; FSP_UPD_HEADER FspUpdHeader;
/** Offset 0x00F8 /** Offset 0x00F8
**/ **/
FSPS_ARCH_UPD FspsArchUpd; FSPS_ARCH_UPD FspsArchUpd;
/** Offset 0x0118 /** Offset 0x0118
**/ **/
FSP_S_CONFIG FspsConfig; FSP_S_CONFIG FspsConfig;
/** Offset 0x012C /** Offset 0x012C
**/ **/
UINT8 UnusedUpdSpace2[2]; UINT8 UnusedUpdSpace2[2];
/** Offset 0x012E /** Offset 0x012E
**/ **/
UINT16 UpdTerminator; UINT16 UpdTerminator;
} FSPS_UPD; } FSPS_UPD;

64
IntelFsp2Pkg/Tools/Tests/ExpectedFsptUpd.h
View File

@ -5,80 +5,76 @@
#pragma pack(1) #pragma pack(1)
/** Fsp T Common UPD /** Fsp T Common UPD
**/ **/
typedef struct { typedef struct {
/** Offset 0x0040
/** Offset 0x0040 **/
**/
UINT8 Revision; UINT8 Revision;
/** Offset 0x0041 /** Offset 0x0041
**/ **/
UINT8 Reserved[3]; UINT8 Reserved[3];
/** Offset 0x0044 /** Offset 0x0044
**/ **/
UINT32 MicrocodeRegionBase; UINT32 MicrocodeRegionBase;
/** Offset 0x0048 /** Offset 0x0048
**/ **/
UINT32 MicrocodeRegionLength; UINT32 MicrocodeRegionLength;
/** Offset 0x004C /** Offset 0x004C
**/ **/
UINT32 CodeRegionBase; UINT32 CodeRegionBase;
/** Offset 0x0050 /** Offset 0x0050
**/ **/
UINT32 CodeRegionLength; UINT32 CodeRegionLength;
/** Offset 0x0054 /** Offset 0x0054
**/ **/
UINT8 Reserved1[12]; UINT8 Reserved1[12];
} FSPT_COMMON_UPD; } FSPT_COMMON_UPD;
/** Fsp T Configuration /** Fsp T Configuration
**/ **/
typedef struct { typedef struct {
/** Offset 0x0060 - Chicken bytes to test Hex config
/** Offset 0x0060 - Chicken bytes to test Hex config
This option shows how to present option for 4 bytes data This option shows how to present option for 4 bytes data
**/ **/
UINT32 ChickenBytes; UINT32 ChickenBytes;
/** Offset 0x0064 /** Offset 0x0064
**/ **/
UINT8 ReservedFsptUpd1[28]; UINT8 ReservedFsptUpd1[28];
} FSP_T_CONFIG; } FSP_T_CONFIG;
/** Fsp T UPD Configuration /** Fsp T UPD Configuration
**/ **/
typedef struct { typedef struct {
/** Offset 0x0000
/** Offset 0x0000 **/
**/
FSP_UPD_HEADER FspUpdHeader; FSP_UPD_HEADER FspUpdHeader;
/** Offset 0x0020 /** Offset 0x0020
**/ **/
FSPT_ARCH_UPD FsptArchUpd; FSPT_ARCH_UPD FsptArchUpd;
/** Offset 0x0040 /** Offset 0x0040
**/ **/
FSPT_COMMON_UPD FsptCommonUpd; FSPT_COMMON_UPD FsptCommonUpd;
/** Offset 0x0060 /** Offset 0x0060
**/ **/
FSP_T_CONFIG FsptConfig; FSP_T_CONFIG FsptConfig;
/** Offset 0x0080 /** Offset 0x0080
**/ **/
UINT8 UnusedUpdSpace0[6]; UINT8 UnusedUpdSpace0[6];
/** Offset 0x0086 /** Offset 0x0086
**/ **/
UINT16 UpdTerminator; UINT16 UpdTerminator;
} FSPT_UPD; } FSPT_UPD;