mirror of https://github.com/acidanthera/audk.git
OvmfPkg/CpuS3DataDxe: enable S3 resume after CPU hotplug
During normal boot, CpuS3DataDxe allocates - an empty CPU_REGISTER_TABLE entry in the "ACPI_CPU_DATA.PreSmmInitRegisterTable" array, and - an empty CPU_REGISTER_TABLE entry in the "ACPI_CPU_DATA.RegisterTable" array, for every CPU whose APIC ID CpuS3DataDxe can learn. Currently EFI_MP_SERVICES_PROTOCOL is used for both determining the number of CPUs -- the protocol reports the present-at-boot CPU count --, and for retrieving the APIC IDs of those CPUs. Consequently, if a CPU is hot-plugged at OS runtime, then S3 resume breaks. That's because PiSmmCpuDxeSmm will not find the hot-added CPU's APIC ID associated with any CPU_REGISTER_TABLE object, in the SMRAM copies of either of the "RegisterTable" and "PreSmmInitRegisterTable" arrays. The failure to match the hot-added CPU's APIC ID trips the ASSERT() in SetRegister() [UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c]. If "PcdQ35SmramAtDefaultSmbase" is TRUE, then: - prepare CPU_REGISTER_TABLE objects for all possible CPUs, not just the present-at-boot CPUs (PlatformPei stored the possible CPU count to "PcdCpuMaxLogicalProcessorNumber"); - use QEMU_CPUHP_CMD_GET_ARCH_ID for filling in the "InitialApicId" fields of the CPU_REGISTER_TABLE objects. This provides full APIC ID coverage for PiSmmCpuDxeSmm during S3 resume, accommodating CPUs hot-added at OS runtime. This patch is best reviewed with $ git show -b Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Igor Mammedov <imammedo@redhat.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Philippe Mathieu-Daudé <philmd@redhat.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1512 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Message-Id: <20200226221156.29589-17-lersek@redhat.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Tested-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
This commit is contained in:
Laszlo Ersek
mergify[bot]
parent
8f3ed1bc4d
commit
1158fc8e2c
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@ -23,6 +23,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
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#include <Library/BaseLib.h>
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#include <Library/BaseMemoryLib.h>
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#include <Library/DebugLib.h>
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#include <Library/IoLib.h>
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#include <Library/MemoryAllocationLib.h>
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#include <Library/MtrrLib.h>
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#include <Library/UefiBootServicesTableLib.h>
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@ -30,6 +31,9 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
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#include <Protocol/MpService.h>
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#include <Guid/EventGroup.h>
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#include <IndustryStandard/Q35MchIch9.h>
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#include <IndustryStandard/QemuCpuHotplug.h>
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//
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// Data structure used to allocate ACPI_CPU_DATA and its supporting structures
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//
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@ -163,7 +167,6 @@ CpuS3DataInitialize (
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ACPI_CPU_DATA *AcpiCpuData;
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EFI_MP_SERVICES_PROTOCOL *MpServices;
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UINTN NumberOfCpus;
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UINTN NumberOfEnabledProcessors;
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VOID *Stack;
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UINTN TableSize;
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CPU_REGISTER_TABLE *RegisterTable;
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@ -175,6 +178,7 @@ CpuS3DataInitialize (
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VOID *Idt;
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EFI_EVENT Event;
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ACPI_CPU_DATA *OldAcpiCpuData;
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BOOLEAN FetchPossibleApicIds;
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if (!PcdGetBool (PcdAcpiS3Enable)) {
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return EFI_UNSUPPORTED;
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@ -190,24 +194,36 @@ CpuS3DataInitialize (
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AcpiCpuData = &AcpiCpuDataEx->AcpiCpuData;
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//
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// Get MP Services Protocol
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// The "SMRAM at default SMBASE" feature guarantees that
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// QEMU_CPUHP_CMD_GET_ARCH_ID too is available.
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//
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Status = gBS->LocateProtocol (
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&gEfiMpServiceProtocolGuid,
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NULL,
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(VOID **)&MpServices
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);
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ASSERT_EFI_ERROR (Status);
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FetchPossibleApicIds = PcdGetBool (PcdQ35SmramAtDefaultSmbase);
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//
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// Get the number of CPUs
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//
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Status = MpServices->GetNumberOfProcessors (
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MpServices,
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&NumberOfCpus,
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&NumberOfEnabledProcessors
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);
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ASSERT_EFI_ERROR (Status);
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if (FetchPossibleApicIds) {
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NumberOfCpus = PcdGet32 (PcdCpuMaxLogicalProcessorNumber);
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} else {
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UINTN NumberOfEnabledProcessors;
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//
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// Get MP Services Protocol
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//
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Status = gBS->LocateProtocol (
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&gEfiMpServiceProtocolGuid,
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NULL,
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(VOID **)&MpServices
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);
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ASSERT_EFI_ERROR (Status);
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//
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// Get the number of CPUs
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//
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Status = MpServices->GetNumberOfProcessors (
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MpServices,
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&NumberOfCpus,
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&NumberOfEnabledProcessors
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);
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ASSERT_EFI_ERROR (Status);
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}
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AcpiCpuData->NumberOfCpus = (UINT32)NumberOfCpus;
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//
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@ -263,20 +279,45 @@ CpuS3DataInitialize (
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RegisterTable = (CPU_REGISTER_TABLE *)AllocateZeroPages (TableSize);
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ASSERT (RegisterTable != NULL);
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if (FetchPossibleApicIds) {
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//
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// Write a valid selector so that other hotplug registers can be
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// accessed.
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//
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IoWrite32 (ICH9_CPU_HOTPLUG_BASE + QEMU_CPUHP_W_CPU_SEL, 0);
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//
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// We'll be fetching the APIC IDs.
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//
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IoWrite8 (ICH9_CPU_HOTPLUG_BASE + QEMU_CPUHP_W_CMD,
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QEMU_CPUHP_CMD_GET_ARCH_ID);
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}
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for (Index = 0; Index < NumberOfCpus; Index++) {
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Status = MpServices->GetProcessorInfo (
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MpServices,
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Index,
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&ProcessorInfoBuffer
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);
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ASSERT_EFI_ERROR (Status);
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UINT32 InitialApicId;
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RegisterTable[Index].InitialApicId = (UINT32)ProcessorInfoBuffer.ProcessorId;
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if (FetchPossibleApicIds) {
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IoWrite32 (ICH9_CPU_HOTPLUG_BASE + QEMU_CPUHP_W_CPU_SEL,
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(UINT32)Index);
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InitialApicId = IoRead32 (
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ICH9_CPU_HOTPLUG_BASE + QEMU_CPUHP_RW_CMD_DATA);
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} else {
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Status = MpServices->GetProcessorInfo (
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MpServices,
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Index,
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&ProcessorInfoBuffer
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);
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ASSERT_EFI_ERROR (Status);
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InitialApicId = (UINT32)ProcessorInfoBuffer.ProcessorId;
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}
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DEBUG ((DEBUG_VERBOSE, "%a: Index=%05Lu ApicId=0x%08x\n", __FUNCTION__,
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(UINT64)Index, InitialApicId));
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RegisterTable[Index].InitialApicId = InitialApicId;
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RegisterTable[Index].TableLength = 0;
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RegisterTable[Index].AllocatedSize = 0;
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RegisterTable[Index].RegisterTableEntry = 0;
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RegisterTable[NumberOfCpus + Index].InitialApicId = (UINT32)ProcessorInfoBuffer.ProcessorId;
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RegisterTable[NumberOfCpus + Index].InitialApicId = InitialApicId;
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RegisterTable[NumberOfCpus + Index].TableLength = 0;
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RegisterTable[NumberOfCpus + Index].AllocatedSize = 0;
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RegisterTable[NumberOfCpus + Index].RegisterTableEntry = 0;
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@ -35,12 +35,14 @@
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[Packages]
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MdeModulePkg/MdeModulePkg.dec
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MdePkg/MdePkg.dec
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OvmfPkg/OvmfPkg.dec
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UefiCpuPkg/UefiCpuPkg.dec
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[LibraryClasses]
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BaseLib
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BaseMemoryLib
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DebugLib
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IoLib
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MemoryAllocationLib
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MtrrLib
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UefiBootServicesTableLib
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@ -55,7 +57,9 @@
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[Pcd]
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gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiS3Enable ## CONSUMES
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gUefiCpuPkgTokenSpaceGuid.PcdCpuApStackSize ## CONSUMES
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gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber ## CONSUMES
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gUefiCpuPkgTokenSpaceGuid.PcdCpuS3DataAddress ## PRODUCES
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gUefiOvmfPkgTokenSpaceGuid.PcdQ35SmramAtDefaultSmbase ## CONSUMES
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[Depex]
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gEfiMpServiceProtocolGuid
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