From 12e860a1e881b2fa997ebed17cc4918494a5f5fe Mon Sep 17 00:00:00 2001 From: Min Xu Date: Sun, 6 Mar 2022 22:09:10 +0800 Subject: [PATCH] OvmfPkg/PlatformPei: Refactor MemMapInitialization BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3863 MemMapInitialization is split into 2 functions: - PlatformMemMapInitialization is for PlatformInfoLib - MemMapInitialization calls PlatformMemMapInitialization and then sets PCDs. It is for PlatformPei. Cc: Ard Biesheuvel Cc: Jordan Justen Cc: Brijesh Singh Cc: Erdem Aktas Cc: James Bottomley Cc: Jiewen Yao Cc: Tom Lendacky Cc: Gerd Hoffmann Cc: Sebastien Boeuf Acked-by: Gerd Hoffmann Reviewed-by: Jiewen Yao Signed-off-by: Min Xu --- OvmfPkg/PlatformPei/Platform.c | 35 +++++++++++++++++++++++++--------- 1 file changed, 26 insertions(+), 9 deletions(-) diff --git a/OvmfPkg/PlatformPei/Platform.c b/OvmfPkg/PlatformPei/Platform.c index f89d14493e..b83bd75158 100644 --- a/OvmfPkg/PlatformPei/Platform.c +++ b/OvmfPkg/PlatformPei/Platform.c @@ -52,7 +52,8 @@ EFI_PEI_PPI_DESCRIPTOR mPpiBootMode[] = { }; VOID -MemMapInitialization ( +EFIAPI +PlatformMemMapInitialization ( IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob ) { @@ -110,10 +111,6 @@ MemMapInitialization ( // PciSize = 0xFC000000 - PciBase; PlatformAddIoMemoryBaseSizeHob (PciBase, PciSize); - PcdStatus = PcdSet64S (PcdPciMmio32Base, PciBase); - ASSERT_RETURN_ERROR (PcdStatus); - PcdStatus = PcdSet64S (PcdPciMmio32Size, PciSize); - ASSERT_RETURN_ERROR (PcdStatus); PlatformInfoHob->PcdPciMmio32Base = PciBase; PlatformInfoHob->PcdPciMmio32Size = PciSize; @@ -173,15 +170,35 @@ MemMapInitialization ( PciIoBase, PciIoSize ); - PcdStatus = PcdSet64S (PcdPciIoBase, PciIoBase); - ASSERT_RETURN_ERROR (PcdStatus); - PcdStatus = PcdSet64S (PcdPciIoSize, PciIoSize); - ASSERT_RETURN_ERROR (PcdStatus); PlatformInfoHob->PcdPciIoBase = PciIoBase; PlatformInfoHob->PcdPciIoSize = PciIoSize; } +VOID +MemMapInitialization ( + IN OUT EFI_HOB_PLATFORM_INFO *PlatformInfoHob + ) +{ + RETURN_STATUS PcdStatus; + + PlatformMemMapInitialization (PlatformInfoHob); + + if (PlatformInfoHob->HostBridgeDevId == 0xffff /* microvm */) { + return; + } + + PcdStatus = PcdSet64S (PcdPciMmio32Base, PlatformInfoHob->PcdPciMmio32Base); + ASSERT_RETURN_ERROR (PcdStatus); + PcdStatus = PcdSet64S (PcdPciMmio32Size, PlatformInfoHob->PcdPciMmio32Size); + ASSERT_RETURN_ERROR (PcdStatus); + + PcdStatus = PcdSet64S (PcdPciIoBase, PlatformInfoHob->PcdPciIoBase); + ASSERT_RETURN_ERROR (PcdStatus); + PcdStatus = PcdSet64S (PcdPciIoSize, PlatformInfoHob->PcdPciIoSize); + ASSERT_RETURN_ERROR (PcdStatus); +} + #define UPDATE_BOOLEAN_PCD_FROM_FW_CFG(TokenName) \ do { \ BOOLEAN Setting; \