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Vlv2TbltDevicePkg: Remove reference deprecated macro. 

Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: David Wei <david.wei@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
This commit is contained in:
Eric Dong 2017-08-04 13:55:18 +08:00
parent 309e799ba1
commit 1382ffb629
2 changed files with 21 additions and 9 deletions
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29
Vlv2TbltDevicePkg/PlatformInitPei/MemoryPeim.c
View File

@ -196,16 +196,22 @@ SetPeiCacheMode (
// Cache the flash area to improve the boot performance in PEI phase // Cache the flash area to improve the boot performance in PEI phase
// //
Index = 0; Index = 0;
MtrrSetting.Variables.Mtrr[0].Base = (FixedPcdGet32 (PcdFlashAreaBaseAddress) | CacheWriteProtected); ((MSR_IA32_MTRR_PHYSBASE_REGISTER *) &MtrrSetting.Variables.Mtrr[0].Base)->Uint64 = FixedPcdGet32 (PcdFlashAreaBaseAddress);
MtrrSetting.Variables.Mtrr[0].Mask = ((~((UINT64)(FixedPcdGet32 (PcdFlashAreaSize) - 1))) & ValidMtrrAddressMask) | MTRR_LIB_CACHE_MTRR_ENABLED; ((MSR_IA32_MTRR_PHYSBASE_REGISTER *) &MtrrSetting.Variables.Mtrr[0].Base)->Bits.Type = CacheWriteProtected;
((MSR_IA32_MTRR_PHYSMASK_REGISTER *) &MtrrSetting.Variables.Mtrr[0].Mask)->Uint64 = (~((UINT64)(FixedPcdGet32 (PcdFlashAreaSize) - 1))) & ValidMtrrAddressMask;
((MSR_IA32_MTRR_PHYSMASK_REGISTER *) &MtrrSetting.Variables.Mtrr[0].Mask)->Bits.V = 1;
Index ++; Index ++;
MemOverflow =0; MemOverflow =0;
while (MaxMemoryLength > MemOverflow){ while (MaxMemoryLength > MemOverflow){
MtrrSetting.Variables.Mtrr[Index].Base = (MemOverflow & ValidMtrrAddressMask) | CacheWriteBack;
MemoryLength = MaxMemoryLength - MemOverflow; MemoryLength = MaxMemoryLength - MemOverflow;
MemoryLength = GetPowerOfTwo64 (MemoryLength); MemoryLength = GetPowerOfTwo64 (MemoryLength);
MtrrSetting.Variables.Mtrr[Index].Mask = ((~(MemoryLength - 1)) & ValidMtrrAddressMask) | MTRR_LIB_CACHE_MTRR_ENABLED;
((MSR_IA32_MTRR_PHYSBASE_REGISTER *) &MtrrSetting.Variables.Mtrr[Index].Base)->Uint64 = MemOverflow & ValidMtrrAddressMask;
((MSR_IA32_MTRR_PHYSBASE_REGISTER *) &MtrrSetting.Variables.Mtrr[Index].Base)->Bits.Type = CacheWriteBack;
((MSR_IA32_MTRR_PHYSMASK_REGISTER *) &MtrrSetting.Variables.Mtrr[Index].Mask)->Uint64 = (~(MemoryLength - 1)) & ValidMtrrAddressMask;
((MSR_IA32_MTRR_PHYSMASK_REGISTER *) &MtrrSetting.Variables.Mtrr[Index].Mask)->Bits.V = 1;
MemOverflow += MemoryLength; MemOverflow += MemoryLength;
Index++; Index++;
@ -216,23 +222,28 @@ SetPeiCacheMode (
while (MaxMemoryLength != MemoryLength) { while (MaxMemoryLength != MemoryLength) {
MemoryLengthUc = GetPowerOfTwo64 (MaxMemoryLength - MemoryLength); MemoryLengthUc = GetPowerOfTwo64 (MaxMemoryLength - MemoryLength);
MtrrSetting.Variables.Mtrr[Index].Base = ((MaxMemoryLength - MemoryLengthUc) & ValidMtrrAddressMask) | CacheUncacheable; ((MSR_IA32_MTRR_PHYSBASE_REGISTER *) &MtrrSetting.Variables.Mtrr[Index].Base)->Uint64 = (MaxMemoryLength - MemoryLengthUc) & ValidMtrrAddressMask;
MtrrSetting.Variables.Mtrr[Index].Mask= ((~(MemoryLengthUc - 1)) & ValidMtrrAddressMask) | MTRR_LIB_CACHE_MTRR_ENABLED; ((MSR_IA32_MTRR_PHYSBASE_REGISTER *) &MtrrSetting.Variables.Mtrr[Index].Base)->Bits.Type = CacheUncacheable;
((MSR_IA32_MTRR_PHYSMASK_REGISTER *) &MtrrSetting.Variables.Mtrr[Index].Mask)->Uint64 = (~(MemoryLengthUc - 1)) & ValidMtrrAddressMask;
((MSR_IA32_MTRR_PHYSMASK_REGISTER *) &MtrrSetting.Variables.Mtrr[Index].Mask)->Bits.V = 1;
MaxMemoryLength -= MemoryLengthUc; MaxMemoryLength -= MemoryLengthUc;
Index++; Index++;
} }
MemOverflow =0x100000000; MemOverflow =0x100000000;
while (HighMemoryLength > 0) { while (HighMemoryLength > 0) {
MtrrSetting.Variables.Mtrr[Index].Base = (MemOverflow & ValidMtrrAddressMask) | CacheWriteBack;
MemoryLength = HighMemoryLength; MemoryLength = HighMemoryLength;
MemoryLength = GetPowerOfTwo64 (MemoryLength); MemoryLength = GetPowerOfTwo64 (MemoryLength);
if (MemoryLength > MemOverflow){ if (MemoryLength > MemOverflow){
MemoryLength = MemOverflow; MemoryLength = MemOverflow;
} }
MtrrSetting.Variables.Mtrr[Index].Mask = ((~(MemoryLength - 1)) & ValidMtrrAddressMask) | MTRR_LIB_CACHE_MTRR_ENABLED; ((MSR_IA32_MTRR_PHYSBASE_REGISTER *) &MtrrSetting.Variables.Mtrr[Index].Base)->Uint64 = MemOverflow & ValidMtrrAddressMask;
((MSR_IA32_MTRR_PHYSBASE_REGISTER *) &MtrrSetting.Variables.Mtrr[Index].Base)->Bits.Type = CacheWriteBack;
((MSR_IA32_MTRR_PHYSMASK_REGISTER *) &MtrrSetting.Variables.Mtrr[Index].Mask)->Uint64 = (~(MemoryLength - 1)) & ValidMtrrAddressMask;
((MSR_IA32_MTRR_PHYSMASK_REGISTER *) &MtrrSetting.Variables.Mtrr[Index].Mask)->Bits.V = 1;
MemOverflow += MemoryLength; MemOverflow += MemoryLength;
HighMemoryLength -= MemoryLength; HighMemoryLength -= MemoryLength;

1
Vlv2TbltDevicePkg/PlatformInitPei/PlatformEarlyInit.h
View File

@ -84,6 +84,7 @@ Abstract:
#include <Guid/PlatformCpuInfo.h> #include <Guid/PlatformCpuInfo.h>
#include <Guid/OsSelection.h> #include <Guid/OsSelection.h>
#include <Guid/SmramMemoryReserve.h> #include <Guid/SmramMemoryReserve.h>
#include <Register/Msr.h>
#define SMC_LAN_ON 0x46 #define SMC_LAN_ON 0x46
#define SMC_LAN_OFF 0x47 #define SMC_LAN_OFF 0x47