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OvmfPkg/PlatformPei: Move early GDT into ram when SEV-ES is enabled
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198 The SEV support will clear the C-bit from non-RAM areas. The early GDT lives in a non-RAM area, so when an exception occurs (like a #VC) the GDT will be read as un-encrypted even though it is encrypted. This will result in a failure to be able to handle the exception. Move the GDT into RAM so it can be accessed without error when running as an SEV-ES guest. Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Ard Biesheuvel <ard.biesheuvel@arm.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
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@ -39,6 +39,8 @@ AmdSevEsInitialize (
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PHYSICAL_ADDRESS GhcbBasePa;
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UINTN GhcbPageCount, PageCount;
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RETURN_STATUS PcdStatus, DecryptStatus;
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IA32_DESCRIPTOR Gdtr;
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VOID *Gdt;
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if (!MemEncryptSevEsIsEnabled ()) {
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return;
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@ -83,6 +85,22 @@ AmdSevEsInitialize (
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(UINT64)GhcbPageCount, GhcbBase));
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AsmWriteMsr64 (MSR_SEV_ES_GHCB, GhcbBasePa);
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//
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// The SEV support will clear the C-bit from non-RAM areas. The early GDT
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// lives in a non-RAM area, so when an exception occurs (like a #VC) the GDT
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// will be read as un-encrypted even though it was created before the C-bit
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// was cleared (encrypted). This will result in a failure to be able to
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// handle the exception.
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//
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AsmReadGdtr (&Gdtr);
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Gdt = AllocatePages (EFI_SIZE_TO_PAGES ((UINTN) Gdtr.Limit + 1));
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ASSERT (Gdt != NULL);
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CopyMem (Gdt, (VOID *) Gdtr.Base, Gdtr.Limit + 1);
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Gdtr.Base = (UINTN) Gdt;
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AsmWriteGdtr (&Gdtr);
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}
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/**
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