mirror of https://github.com/acidanthera/audk.git
MdeModulePkg/EhciDxe: enable 64-bit PCI DMA
PCI controller drivers must set the EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE attribute if the controller supports 64-bit DMA addressing. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Feng Tian <feng.tian@Intel.com>
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@ -89,7 +89,7 @@ EhcGetCapability (
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*MaxSpeed = EFI_USB_SPEED_HIGH;
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*PortNumber = (UINT8) (Ehc->HcStructParams & HCSP_NPORTS);
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*Is64BitCapable = (UINT8) (Ehc->HcCapParams & HCCP_64BIT);
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*Is64BitCapable = (UINT8) Ehc->Support64BitDma;
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DEBUG ((EFI_D_INFO, "EhcGetCapability: %d ports, 64 bit %d\n", *PortNumber, *Is64BitCapable));
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@ -1877,6 +1877,26 @@ EhcDriverBindingStart (
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goto CLOSE_PCIIO;
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}
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//
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// Enable 64-bit DMA support in the PCI layer if this controller
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// supports it.
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//
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if (EHC_BIT_IS_SET (Ehc->HcCapParams, HCCP_64BIT)) {
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Status = PciIo->Attributes (
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PciIo,
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EfiPciIoAttributeOperationEnable,
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EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE,
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NULL
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);
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if (!EFI_ERROR (Status)) {
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Ehc->Support64BitDma = TRUE;
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} else {
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DEBUG ((EFI_D_WARN,
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"%a: failed to enable 64-bit DMA on 64-bit capable controller @ %p (%r)\n",
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__FUNCTION__, Controller, Status));
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}
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}
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Status = gBS->InstallProtocolInterface (
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&Controller,
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&gEfiUsb2HcProtocolGuid,
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@ -173,6 +173,8 @@ struct _USB2_HC_DEV {
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UINT16 DebugPortOffset; // The offset of debug port mmio register
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UINT8 DebugPortBarNum; // The bar number of debug port mmio register
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UINT8 DebugPortNum; // The port number of usb debug port
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BOOLEAN Support64BitDma; // Whether 64 bit DMA may be used with this device
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};
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@ -178,7 +178,7 @@ EhcInitSched (
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//
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Ehc->MemPool = UsbHcInitMemPool (
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PciIo,
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EHC_BIT_IS_SET (Ehc->HcCapParams, HCCP_64BIT),
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Ehc->Support64BitDma,
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EHC_HIGH_32BIT (PhyAddr)
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);
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