mirror of https://github.com/acidanthera/audk.git
MdePkg/BaseLib: Remove LongJump.c and SetJump.c
MdePkg BaseLib still uses the inline X86 assembly code in C code files.For now, inline SetJump/LongJump() can be removed. https://bugzilla.tianocore.org/show_bug.cgi?id=1163 Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
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@ -91,7 +91,6 @@
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Ia32/WriteCr0.c | MSFT
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Ia32/WriteCr0.c | MSFT
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Ia32/WriteMsr64.c | MSFT
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Ia32/WriteMsr64.c | MSFT
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Ia32/SwapBytes64.c | MSFT
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Ia32/SwapBytes64.c | MSFT
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Ia32/SetJump.c | MSFT
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Ia32/RRotU64.c | MSFT
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Ia32/RRotU64.c | MSFT
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Ia32/RShiftU64.c | MSFT
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Ia32/RShiftU64.c | MSFT
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Ia32/ReadPmc.c | MSFT
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Ia32/ReadPmc.c | MSFT
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@ -135,7 +134,6 @@
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Ia32/MultU64x32.c | MSFT
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Ia32/MultU64x32.c | MSFT
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Ia32/LShiftU64.c | MSFT
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Ia32/LShiftU64.c | MSFT
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Ia32/LRotU64.c | MSFT
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Ia32/LRotU64.c | MSFT
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Ia32/LongJump.c | MSFT
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Ia32/Invd.c | MSFT
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Ia32/Invd.c | MSFT
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Ia32/FxRestore.c | MSFT
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Ia32/FxRestore.c | MSFT
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Ia32/FxSave.c | MSFT
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Ia32/FxSave.c | MSFT
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@ -185,7 +183,6 @@
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Ia32/WriteCr0.nasm| INTEL
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Ia32/WriteCr0.nasm| INTEL
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Ia32/WriteMsr64.nasm| INTEL
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Ia32/WriteMsr64.nasm| INTEL
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Ia32/SwapBytes64.nasm| INTEL
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Ia32/SwapBytes64.nasm| INTEL
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Ia32/SetJump.nasm| INTEL
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Ia32/RRotU64.nasm| INTEL
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Ia32/RRotU64.nasm| INTEL
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Ia32/RShiftU64.nasm| INTEL
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Ia32/RShiftU64.nasm| INTEL
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Ia32/ReadPmc.nasm| INTEL
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Ia32/ReadPmc.nasm| INTEL
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@ -229,7 +226,6 @@
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Ia32/MultU64x32.nasm| INTEL
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Ia32/MultU64x32.nasm| INTEL
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Ia32/LShiftU64.nasm| INTEL
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Ia32/LShiftU64.nasm| INTEL
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Ia32/LRotU64.nasm| INTEL
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Ia32/LRotU64.nasm| INTEL
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Ia32/LongJump.nasm| INTEL
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Ia32/Invd.nasm| INTEL
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Ia32/Invd.nasm| INTEL
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Ia32/FxRestore.nasm| INTEL
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Ia32/FxRestore.nasm| INTEL
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Ia32/FxSave.nasm| INTEL
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Ia32/FxSave.nasm| INTEL
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@ -263,8 +259,8 @@
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Ia32/Monitor.nasm| GCC
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Ia32/Monitor.nasm| GCC
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Ia32/CpuIdEx.nasm| GCC
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Ia32/CpuIdEx.nasm| GCC
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Ia32/CpuId.nasm| GCC
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Ia32/CpuId.nasm| GCC
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Ia32/LongJump.nasm| GCC
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Ia32/LongJump.nasm
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Ia32/SetJump.nasm| GCC
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Ia32/SetJump.nasm
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Ia32/SwapBytes64.nasm| GCC
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Ia32/SwapBytes64.nasm| GCC
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Ia32/DivU64x64Remainder.nasm| GCC
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Ia32/DivU64x64Remainder.nasm| GCC
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Ia32/DivU64x32Remainder.nasm| GCC
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Ia32/DivU64x32Remainder.nasm| GCC
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/** @file
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Implementation of _LongJump() on IA-32.
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Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include "BaseLibInternals.h"
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/**
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Restores the CPU context that was saved with SetJump().
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Restores the CPU context from the buffer specified by JumpBuffer.
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This function never returns to the caller.
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Instead is resumes execution based on the state of JumpBuffer.
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@param JumpBuffer A pointer to CPU context buffer.
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@param Value The value to return when the SetJump() context is restored.
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**/
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__declspec (naked)
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VOID
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EFIAPI
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InternalLongJump (
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IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer,
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IN UINTN Value
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)
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{
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_asm {
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mov eax, [PcdGet32 (PcdControlFlowEnforcementPropertyMask)]
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test eax, eax
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jz CetDone
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_emit 0x0F
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_emit 0x20
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_emit 0xE0 ; mov eax, cr4
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bt eax, 23 ; check if CET is enabled
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jnc CetDone
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mov edx, [esp + 4] ; edx = JumpBuffer
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mov edx, [edx + 24] ; edx = target SSP
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_emit 0xF3
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_emit 0x0F
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_emit 0x1E
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_emit 0xC8 ; READSSP EAX
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sub edx, eax ; edx = delta
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mov eax, edx ; eax = delta
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shr eax, 2 ; eax = delta/sizeof(UINT32)
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_emit 0xF3
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_emit 0x0F
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_emit 0xAE
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_emit 0xE8 ; INCSSP EAX
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CetDone:
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pop eax ; skip return address
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pop edx ; edx <- JumpBuffer
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pop eax ; eax <- Value
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mov ebx, [edx]
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mov esi, [edx + 4]
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mov edi, [edx + 8]
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mov ebp, [edx + 12]
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mov esp, [edx + 16]
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jmp dword ptr [edx + 20]
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}
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}
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/** @file
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Implementation of SetJump() on IA-32.
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Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include "BaseLibInternals.h"
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/**
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Worker function that checks ASSERT condition for JumpBuffer
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Checks ASSERT condition for JumpBuffer.
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If JumpBuffer is NULL, then ASSERT().
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For IPF CPUs, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().
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@param JumpBuffer A pointer to CPU context buffer.
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**/
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VOID
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EFIAPI
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InternalAssertJumpBuffer (
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IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer
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);
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/**
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Saves the current CPU context that can be restored with a call to LongJump()
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and returns 0.
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Saves the current CPU context in the buffer specified by JumpBuffer and
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returns 0. The initial call to SetJump() must always return 0. Subsequent
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calls to LongJump() cause a non-zero value to be returned by SetJump().
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If JumpBuffer is NULL, then ASSERT().
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For IPF CPUs, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().
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@param JumpBuffer A pointer to CPU context buffer.
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@retval 0 Indicates a return from SetJump().
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**/
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_declspec (naked)
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RETURNS_TWICE
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UINTN
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EFIAPI
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SetJump (
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OUT BASE_LIBRARY_JUMP_BUFFER *JumpBuffer
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)
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{
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_asm {
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push [esp + 4]
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call InternalAssertJumpBuffer
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pop ecx
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pop ecx
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mov edx, [esp]
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xor eax, eax
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mov [edx + 24], eax ; save 0 to SSP
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mov eax, [PcdGet32 (PcdControlFlowEnforcementPropertyMask)]
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test eax, eax
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jz CetDone
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_emit 0x0F
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_emit 0x20
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_emit 0xE0 ; mov eax, cr4
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bt eax, 23 ; check if CET is enabled
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jnc CetDone
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mov eax, 1
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_emit 0xF3
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_emit 0x0F
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_emit 0xAE
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_emit 0xE8 ; INCSSP EAX to read original SSP
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_emit 0xF3
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_emit 0x0F
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_emit 0x1E
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_emit 0xC8 ; READSSP EAX
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mov [edx + 0x24], eax ; save SSP
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CetDone:
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mov [edx], ebx
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mov [edx + 4], esi
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mov [edx + 8], edi
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mov [edx + 12], ebp
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mov [edx + 16], esp
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mov [edx + 20], ecx
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xor eax, eax
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jmp ecx
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}
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}
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