mirror of https://github.com/acidanthera/audk.git
1. Updated CpuFlushTlb() according to IA-64 programmer's guide
2. Updated Thunk code to preserve EFLAGS/RFLAGS across real mode code invocation 3. Updated comments in x86Thunk.c git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@248 6f19259b-4bc3-4df7-8a09-765794883524
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@ -265,6 +265,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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</Arch>
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</Arch>
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<Arch ArchType="IPF">
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<Arch ArchType="IPF">
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<Filename>Math64.c</Filename>
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<Filename>Math64.c</Filename>
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<Filename>Ipf/PalCallStatic.s</Filename>
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<Filename>Ipf/setjmp.s</Filename>
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<Filename>Ipf/setjmp.s</Filename>
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<Filename>Ipf/SwitchStack.s</Filename>
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<Filename>Ipf/SwitchStack.s</Filename>
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<Filename>Ipf/Unaligned.c</Filename>
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<Filename>Ipf/Unaligned.c</Filename>
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@ -141,6 +141,12 @@ _ToUserCode PROC
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call @Base ; push eip
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call @Base ; push eip
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@Base:
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@Base:
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pop bp ; ebp <- offset @Base
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pop bp ; ebp <- offset @Base
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DB 67h ; address size override
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push [esp + sizeof (IA32_REGS) + 2]
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lea eax, [esi + (offset @RealMode - offset @Base)]
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push eax
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retf
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@RealMode:
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mov cs:[esi + (offset SavedSs - offset @Base)], edx
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mov cs:[esi + (offset SavedSs - offset @Base)], edx
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mov cs:[esi + (offset SavedEsp - offset @Base)], bx
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mov cs:[esi + (offset SavedEsp - offset @Base)], bx
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DB 66h
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DB 66h
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@ -208,7 +214,9 @@ InternalAsmThunk16 PROC USES ebp ebx esi edi ds es fs gs
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push 10h
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push 10h
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pop ecx ; ecx <- selector for data segments
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pop ecx ; ecx <- selector for data segments
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lgdt fword ptr [edx + (offset _16Gdtr - offset SavedCr0)]
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lgdt fword ptr [edx + (offset _16Gdtr - offset SavedCr0)]
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pushfd
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call fword ptr [edx + (offset _EntryPoint - offset SavedCr0)]
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call fword ptr [edx + (offset _EntryPoint - offset SavedCr0)]
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popfd
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lidt fword ptr [esp + 36] ; restore protected mode IDTR
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lidt fword ptr [esp + 36] ; restore protected mode IDTR
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lea eax, [ebp - sizeof (IA32_REGS)]
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lea eax, [ebp - sizeof (IA32_REGS)]
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ret
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ret
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@ -17,13 +17,41 @@
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.auto
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.auto
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.text
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.text
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.global PalCallStatic
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.type PalCallStatic, @function
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.proc CpuFlushTlb
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.proc CpuFlushTlb
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.type CpuFlushTlb, @function
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.type CpuFlushTlb, @function
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CpuFlushTlb::
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CpuFlushTlb::
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mov r8 = ip
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alloc loc0 = ar.pfs, 0, 2, 5, 0
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mov r9 = -1
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mov out0 = 0
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dep.z r10 = -1, 61, 3
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mov out1 = 6
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and r8 = r8, r10
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mov out2 = 0
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ptc.l r8, r9
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mov out3 = 0
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mov out4 = 0
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mov loc1 = b0
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br.call.sptk b0 = PalCallStatic
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rsm 1 << 14 // Disable interrupts
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mov ar.pfs = loc0
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extr.u r14 = r10, 32, 32 // r14 <- count1
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extr.u r15 = r11, 32, 32 // r15 <- stride1
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extr.u r10 = r10, 0, 32 // r10 <- count2
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mov loc0 = psr
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extr.u r11 = r11, 0, 32 // r11 <- stride2
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br.cond.sptk LoopPredicate
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LoopOuter:
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mov ar.lc = r10 // LC <- count2
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mov ar.ec = r0 // EC <- 0
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Loop:
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ptc.e r9
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add r9 = r11, r9 // r9 += stride2
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br.ctop.sptk Loop
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add r9 = r15, r9 // r9 += stride1
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LoopPredicate:
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cmp.ne p6, p7 = r0, r14 // count1 == 0?
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add r14 = -1, r14
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(p6) br.cond.sptk LoopOuter
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mov psr.l = loc0
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mov b0 = loc1
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br.ret.sptk.many b0
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br.ret.sptk.many b0
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.endp
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.endp
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@ -0,0 +1,47 @@
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/// @file
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/// Contains an implementation of CallPalProcStatic on Itanium-based
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/// architecture.
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///
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/// Copyright (c) 2006, Intel Corporation
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/// All rights reserved. This program and the accompanying materials
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/// are licensed and made available under the terms and conditions of the BSD License
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/// which accompanies this distribution. The full text of the license may be found at
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/// http://opensource.org/licenses/bsd-license.php
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///
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/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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///
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/// Module Name: PalCallStatic.s
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///
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///
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.auto
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.text
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.proc PalCallStatic
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.type PalCallStatic, @function
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.regstk 5, 0, 0, 0
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PalCallStatic::
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cmp.ne p6, p7 = r0, in0
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mov r31 = in4
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mov r8 = ip
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(p6) mov in0 = ar.k5
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add r8 = (PalProcReturn - PalCallStatic), r8
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mov in4 = b0
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mov r30 = in3
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mov r29 = in2
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mov b7 = in0
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mov in3 = psr
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rsm 1 << 14 // Disable interrupts
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mov r28 = in1
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mov in0 = 256
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mov b0 = r8
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br.cond.sptk b7
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PalProcReturn:
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mov psr.l = in3
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cmp.eq p6, p7 = in0, in1 // in1 == PAL_COPY_PAL?
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(p6) cmp.eq p6, p7 = r0, r8 // Status == Success?
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(p6) mov ar.k5 = in2
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mov b0 = in4
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br.ret.sptk.many b0
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.endp PalCallStatic
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@ -149,6 +149,11 @@ _ToUserCode PROC
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call @Base ; push eip
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call @Base ; push eip
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@Base:
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@Base:
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pop bp ; ebp <- offset @Base
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pop bp ; ebp <- offset @Base
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push [esp + sizeof (IA32_REGS) + 2]
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lea eax, [rsi + (offset @RealMode - offset @Base)]
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push rax
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retf
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@RealMode:
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DB 2eh ; cs:
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DB 2eh ; cs:
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mov [rsi + (offset SavedSs - offset @Base)], edi
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mov [rsi + (offset SavedSs - offset @Base)], edi
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DB 2eh ; cs:
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DB 2eh ; cs:
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@ -222,7 +227,9 @@ InternalAsmThunk16 PROC USES rbp rbx rsi rdi
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push 10h
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push 10h
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pop rdx ; rdx <- selector for data segments
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pop rdx ; rdx <- selector for data segments
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lgdt fword ptr [rcx + (offset _16Gdtr - offset SavedCr4)]
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lgdt fword ptr [rcx + (offset _16Gdtr - offset SavedCr4)]
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pushfq
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call fword ptr [rcx + (offset _EntryPoint - offset SavedCr4)]
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call fword ptr [rcx + (offset _EntryPoint - offset SavedCr4)]
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popfq
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lidt fword ptr [rsp + 38h] ; restore protected mode IDTR
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lidt fword ptr [rsp + 38h] ; restore protected mode IDTR
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lea eax, [rbp - sizeof (IA32_REGS)]
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lea eax, [rbp - sizeof (IA32_REGS)]
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pop gs
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pop gs
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@ -95,6 +95,10 @@ AsmGetThunk16Properties (
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ASSERT (ExtraStackSize != NULL);
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ASSERT (ExtraStackSize != NULL);
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*RealModeBufferSize = m16Size;
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*RealModeBufferSize = m16Size;
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//
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// Extra 4 bytes for return address, and another 4 bytes for mode transition
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//
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*ExtraStackSize = sizeof (IA32_DWORD_REGS) + 8;
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*ExtraStackSize = sizeof (IA32_DWORD_REGS) + 8;
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}
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}
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