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BaseTools: Cleaned up ARM relocs calculation in ImageTool and removed several relocation types' definitions as according to ARM ABI (aaelf32.pdf) 177-255 codes are reserved for future allocation.

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Mikhail Krichanov 2023-03-17 12:12:26 +03:00 committed by MikhailKrichanov
parent 687086ce0e
commit 19978560ba
2 changed files with 8 additions and 34 deletions
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30
BaseTools/ImageTool/ElfScan.c
View File

@ -328,10 +328,6 @@ SetRelocs (
#if defined(EFI_TARGET64) #if defined(EFI_TARGET64)
UINT32 Index2; UINT32 Index2;
BOOLEAN New; BOOLEAN New;
#elif defined(EFI_TARGET32)
UINT32 MovwOffset;
MovwOffset = 0;
#endif #endif
RelNum = 0; RelNum = 0;
@ -496,10 +492,6 @@ SetRelocs (
} else if (mEhdr->e_machine == EM_ARM) { } else if (mEhdr->e_machine == EM_ARM) {
switch (ELF32_R_TYPE(Rel->r_info)) { switch (ELF32_R_TYPE(Rel->r_info)) {
case R_ARM_NONE: case R_ARM_NONE:
case R_ARM_RBASE:
// No relocation - no action required
// break skipped
case R_ARM_PC24: case R_ARM_PC24:
case R_ARM_REL32: case R_ARM_REL32:
case R_ARM_XPC25: case R_ARM_XPC25:
@ -535,33 +527,22 @@ SetRelocs (
case R_ARM_TLS_GD32: case R_ARM_TLS_GD32:
case R_ARM_TLS_LDM32: case R_ARM_TLS_LDM32:
case R_ARM_TLS_IE32: case R_ARM_TLS_IE32:
// Thease are all PC-relative relocations and don't require modification
// GCC does not seem to have the concept of a application that just needs to get relocated.
break; break;
case R_ARM_THM_MOVW_ABS_NC: case R_ARM_THM_MOVW_ABS_NC:
// MOVW is only lower 16-bits of the addres
// ThumbMovtImmediatePatch ((UINT16 *)Targ, (UINT16)Sym->st_value);
mImageInfo.RelocInfo.Relocs[RelNum].Type = EFI_IMAGE_REL_BASED_ARM_MOV32T; mImageInfo.RelocInfo.Relocs[RelNum].Type = EFI_IMAGE_REL_BASED_ARM_MOV32T;
mImageInfo.RelocInfo.Relocs[RelNum].Target = Rel->r_offset; mImageInfo.RelocInfo.Relocs[RelNum].Target = Rel->r_offset;
++RelNum; ++RelNum;
// PE/COFF treats MOVW/MOVT relocation as single 64-bit instruction
// Track this address so we can log an error for unsupported sequence of MOVW/MOVT
MovwOffset = Rel->r_offset;
break; break;
case R_ARM_THM_MOVT_ABS: case R_ARM_THM_MOVT_ABS:
// MOVT is only upper 16-bits of the addres //
// ThumbMovtImmediatePatch ((UINT16 *)Targ, (UINT16)(Sym->st_value >> 16)); // The immediate fields of a contiguous MOVW+MOVT pair in Thumb mode
// is treated as a single 64-bit instruction starting at the address
if ((MovwOffset + 4) != Rel->r_offset) { // provided by R_ARM_THM_MOVW_ABS_NC relocation.
fprintf (stderr, "ImageTool: PE/COFF requires MOVW+MOVT instruction sequence (%x + 4) != %x\n", MovwOffset, Rel->r_offset); //
return RETURN_UNSUPPORTED;
}
break; break;
case R_ARM_ABS32: case R_ARM_ABS32:
case R_ARM_RABS32:
mImageInfo.RelocInfo.Relocs[RelNum].Type = EFI_IMAGE_REL_BASED_HIGHLOW; mImageInfo.RelocInfo.Relocs[RelNum].Type = EFI_IMAGE_REL_BASED_HIGHLOW;
mImageInfo.RelocInfo.Relocs[RelNum].Target = Rel->r_offset; mImageInfo.RelocInfo.Relocs[RelNum].Target = Rel->r_offset;
@ -641,7 +622,6 @@ CreateIntermediate (
} }
} else if (mEhdr->e_machine == EM_ARM) { } else if (mEhdr->e_machine == EM_ARM) {
if ((ELF_R_TYPE(Rel->r_info) == R_ARM_THM_MOVW_ABS_NC) if ((ELF_R_TYPE(Rel->r_info) == R_ARM_THM_MOVW_ABS_NC)
|| (ELF_R_TYPE(Rel->r_info) == R_ARM_RABS32)
|| (ELF_R_TYPE(Rel->r_info) == R_ARM_ABS32)) { || (ELF_R_TYPE(Rel->r_info) == R_ARM_ABS32)) {
++NumRelocs; ++NumRelocs;
} }

12
UefiPayloadPkg/PayloadLoaderPeim/ElfLib/ElfCommon.h
View File

@ -736,6 +736,7 @@ typedef struct {
#define R_ARM_THM_MOVW_PREL_NC 49 #define R_ARM_THM_MOVW_PREL_NC 49
#define R_ARM_THM_MOVT_PREL 50 #define R_ARM_THM_MOVT_PREL 50
#define R_ARM_THM_JMP6 52 #define R_ARM_THM_JMP6 52
#define R_ARM_THM_JUMP19 51
#define R_ARM_THM_ALU_PREL_11_0 53 #define R_ARM_THM_ALU_PREL_11_0 53
#define R_ARM_THM_PC12 54 #define R_ARM_THM_PC12 54
#define R_ARM_REL32_NOI 56 #define R_ARM_REL32_NOI 56
@ -753,21 +754,14 @@ typedef struct {
#define R_ARM_LDC_PC_G1 68 #define R_ARM_LDC_PC_G1 68
#define R_ARM_LDC_PC_G2 69 #define R_ARM_LDC_PC_G2 69
#define R_ARM_GOT_PREL 96 #define R_ARM_GOT_PREL 96
#define R_ARM_GNU_VTENTRY 100
#define R_ARM_GNU_VTINHERIT 101
#define R_ARM_THM_JUMP11 102 #define R_ARM_THM_JUMP11 102
#define R_ARM_THM_JUMP8 103 #define R_ARM_THM_JUMP8 103
#define R_ARM_TLS_GD32 104 #define R_ARM_TLS_GD32 104
#define R_ARM_TLS_LDM32 105 #define R_ARM_TLS_LDM32 105
#define R_ARM_TLS_IE32 107 #define R_ARM_TLS_IE32 107
#define R_ARM_THM_JUMP19 51
#define R_ARM_GNU_VTENTRY 100
#define R_ARM_GNU_VTINHERIT 101
#define R_ARM_RSBREL32 250
#define R_ARM_THM_RPC22 251
#define R_ARM_RREL32 252
#define R_ARM_RABS32 253
#define R_ARM_RPC24 254
#define R_ARM_RBASE 255
#define R_PPC_NONE 0/* No relocation. */ #define R_PPC_NONE 0/* No relocation. */
#define R_PPC_ADDR32 1 #define R_PPC_ADDR32 1