mirror of https://github.com/acidanthera/audk.git
Enhance the MTRR lib to support the case where alignment of base address < length.
Signed-off by: rsun3 Reviewed-by: hhuan13 git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12330 6f19259b-4bc3-4df7-8a09-765794883524
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rsun3
parent
0f87f732e9
commit
1a2ad6fca7
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@ -586,12 +586,17 @@ Power2MaxMemory (
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/**
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Check the direction to program variable MTRRs.
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Determine the MTRR numbers used to program a memory range.
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This function determines which direction of programming the variable
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MTRRs will use fewer MTRRs.
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This function first checks the alignment of the base address. If the alignment of the base address <= Length,
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cover the memory range (BaseAddress, alignment) by a MTRR, then BaseAddress += alignment and Length -= alignment.
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Repeat the step until alignment > Length.
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@param Input Length of Memory to program MTRR
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Then this function determines which direction of programming the variable MTRRs for the remaining length
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will use fewer MTRRs.
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@param BaseAddress Length of Memory to program MTRR
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@param Length Length of Memory to program MTRR
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@param MtrrNumber Pointer to the number of necessary MTRRs
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@retval TRUE Positive direction is better.
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@ -599,16 +604,41 @@ Power2MaxMemory (
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**/
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BOOLEAN
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GetDirection (
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IN UINT64 Input,
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GetMtrrNumberAndDirection (
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IN UINT64 BaseAddress,
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IN UINT64 Length,
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IN UINTN *MtrrNumber
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)
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{
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UINT64 TempQword;
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UINT64 Alignment;
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UINT32 Positive;
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UINT32 Subtractive;
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TempQword = Input;
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*MtrrNumber = 0;
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if (BaseAddress != 0) {
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do {
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//
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// Calculate the alignment of the base address.
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//
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Alignment = LShiftU64 (1, (UINTN)LowBitSet64 (BaseAddress));
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if (Alignment > Length) {
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break;
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}
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(*MtrrNumber)++;
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BaseAddress += Alignment;
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Length -= Alignment;
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} while (TRUE);
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if (Length == 0) {
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return TRUE;
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}
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}
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TempQword = Length;
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Positive = 0;
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Subtractive = 0;
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@ -617,7 +647,7 @@ GetDirection (
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Positive++;
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} while (TempQword != 0);
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TempQword = Power2MaxMemory (LShiftU64 (Input, 1)) - Input;
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TempQword = Power2MaxMemory (LShiftU64 (Length, 1)) - Length;
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Subtractive++;
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do {
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TempQword -= Power2MaxMemory (TempQword);
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@ -625,10 +655,10 @@ GetDirection (
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} while (TempQword != 0);
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if (Positive <= Subtractive) {
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*MtrrNumber = Positive;
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*MtrrNumber += Positive;
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return TRUE;
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} else {
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*MtrrNumber = Subtractive;
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*MtrrNumber += Subtractive;
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return FALSE;
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}
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}
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@ -887,7 +917,7 @@ MtrrSetMemoryAttribute (
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UINT64 TempQword;
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RETURN_STATUS Status;
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UINT64 MemoryType;
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UINT64 Remainder;
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UINT64 Alignment;
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BOOLEAN OverLap;
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BOOLEAN Positive;
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UINT32 MsrNum;
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@ -964,18 +994,6 @@ MtrrSetMemoryAttribute (
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Length += SIZE_1MB;
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}
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//
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// Check memory base address alignment
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//
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DivU64x64Remainder (BaseAddress, Power2MaxMemory (LShiftU64 (Length, 1)), &Remainder);
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if (Remainder != 0) {
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DivU64x64Remainder (BaseAddress, Power2MaxMemory (Length), &Remainder);
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if (Remainder != 0) {
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Status = RETURN_UNSUPPORTED;
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goto Done;
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}
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}
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//
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// Check for overlap
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//
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@ -1018,22 +1036,75 @@ MtrrSetMemoryAttribute (
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goto Done;
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}
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Positive = GetMtrrNumberAndDirection (BaseAddress, Length, &MtrrNumber);
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if ((UsedMtrr + MtrrNumber) > FirmwareVariableMtrrCount) {
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Status = RETURN_OUT_OF_RESOURCES;
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goto Done;
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}
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//
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// Invalidate the now-unused MTRRs
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//
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InvalidateMtrr(VariableMtrr);
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//
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// Find first unused MTRR
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//
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for (MsrNum = MTRR_LIB_IA32_VARIABLE_MTRR_BASE;
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MsrNum < VariableMtrrEnd;
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MsrNum += 2
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) {
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if ((AsmReadMsr64 (MsrNum + 1) & MTRR_LIB_CACHE_MTRR_ENABLED) == 0) {
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break;
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}
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}
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if (BaseAddress != 0) {
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do {
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//
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// Calculate the alignment of the base address.
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//
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Alignment = LShiftU64 (1, (UINTN)LowBitSet64 (BaseAddress));
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if (Alignment > Length) {
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break;
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}
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//
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// Find unused MTRR
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//
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for (; MsrNum < VariableMtrrEnd; MsrNum += 2) {
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if ((AsmReadMsr64 (MsrNum + 1) & MTRR_LIB_CACHE_MTRR_ENABLED) == 0) {
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break;
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}
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}
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ProgramVariableMtrr (
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MsrNum,
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BaseAddress,
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Alignment,
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MemoryType,
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MtrrValidAddressMask
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);
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BaseAddress += Alignment;
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Length -= Alignment;
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} while (TRUE);
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if (Length == 0) {
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goto Done;
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}
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}
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TempQword = Length;
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if (TempQword == Power2MaxMemory (TempQword)) {
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//
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// Invalidate the now-unused MTRRs
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//
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InvalidateMtrr(VariableMtrr);
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if (!Positive) {
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Length = Power2MaxMemory (LShiftU64 (TempQword, 1));
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//
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// Find first unused MTRR
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// Find unused MTRR
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//
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for (MsrNum = MTRR_LIB_IA32_VARIABLE_MTRR_BASE;
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MsrNum < VariableMtrrEnd;
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MsrNum += 2
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) {
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for (; MsrNum < VariableMtrrEnd; MsrNum += 2) {
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if ((AsmReadMsr64 (MsrNum + 1) & MTRR_LIB_CACHE_MTRR_ENABLED) == 0) {
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break;
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}
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@ -1046,76 +1117,40 @@ MtrrSetMemoryAttribute (
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MemoryType,
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MtrrValidAddressMask
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);
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} else {
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Positive = GetDirection (TempQword, &MtrrNumber);
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if ((UsedMtrr + MtrrNumber) > FirmwareVariableMtrrCount) {
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Status = RETURN_OUT_OF_RESOURCES;
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goto Done;
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}
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BaseAddress += Length;
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TempQword = Length - TempQword;
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MemoryType = MTRR_CACHE_UNCACHEABLE;
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}
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do {
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//
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// Invalidate the now-unused MTRRs
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// Find unused MTRR
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//
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InvalidateMtrr(VariableMtrr);
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//
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// Find first unused MTRR
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//
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for (MsrNum = MTRR_LIB_IA32_VARIABLE_MTRR_BASE;
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MsrNum < VariableMtrrEnd;
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MsrNum += 2
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) {
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for (; MsrNum < VariableMtrrEnd; MsrNum += 2) {
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if ((AsmReadMsr64 (MsrNum + 1) & MTRR_LIB_CACHE_MTRR_ENABLED) == 0) {
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break;
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}
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}
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Length = Power2MaxMemory (TempQword);
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if (!Positive) {
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Length = Power2MaxMemory (LShiftU64 (TempQword, 1));
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ProgramVariableMtrr (
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MsrNum,
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BaseAddress,
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Length,
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MemoryType,
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MtrrValidAddressMask
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);
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BaseAddress += Length;
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TempQword = Length - TempQword;
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MemoryType = MTRR_CACHE_UNCACHEABLE;
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BaseAddress -= Length;
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}
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do {
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//
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// Find unused MTRR
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//
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for (; MsrNum < VariableMtrrEnd; MsrNum += 2) {
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if ((AsmReadMsr64 (MsrNum + 1) & MTRR_LIB_CACHE_MTRR_ENABLED) == 0) {
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break;
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}
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}
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ProgramVariableMtrr (
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MsrNum,
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BaseAddress,
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Length,
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MemoryType,
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MtrrValidAddressMask
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);
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Length = Power2MaxMemory (TempQword);
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if (!Positive) {
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BaseAddress -= Length;
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}
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if (Positive) {
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BaseAddress += Length;
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}
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TempQword -= Length;
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ProgramVariableMtrr (
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MsrNum,
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BaseAddress,
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Length,
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MemoryType,
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MtrrValidAddressMask
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);
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if (Positive) {
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BaseAddress += Length;
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}
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TempQword -= Length;
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} while (TempQword > 0);
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}
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} while (TempQword > 0);
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Done:
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DEBUG((DEBUG_CACHE, " Status = %r\n", Status));
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