mirror of
https://github.com/acidanthera/audk.git
synced 2025-07-23 13:44:33 +02:00
ArmPlatformPkg: Unify the Secure and Normal FD and FV PCD naming
With this change, we now have these following PCDs values to define the location of the Secure and Normal firmwares: - gArmTokenSpaceGuid.PcdSecureFd(BaseAddress|Size) - gArmTokenSpaceGuid.PcdSecureFv(BaseAddress|Size) - gArmTokenSpaceGuid.PcdNormalFd(BaseAddress|Size) - gArmTokenSpaceGuid.PcdNormalFv(BaseAddress|Size) git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11806 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
parent
9d074e739f
commit
1ad14bc86b
@ -87,12 +87,16 @@
|
|||||||
#
|
#
|
||||||
gArmTokenSpaceGuid.PcdSecureFdBaseAddress|0|UINT32|0x00000015
|
gArmTokenSpaceGuid.PcdSecureFdBaseAddress|0|UINT32|0x00000015
|
||||||
gArmTokenSpaceGuid.PcdSecureFdSize|0|UINT32|0x00000016
|
gArmTokenSpaceGuid.PcdSecureFdSize|0|UINT32|0x00000016
|
||||||
|
gArmTokenSpaceGuid.PcdSecureFvBaseAddress|0x0|UINT32|0x0000002F
|
||||||
|
gArmTokenSpaceGuid.PcdSecureFvSize|0x0|UINT32|0x00000030
|
||||||
|
|
||||||
#
|
#
|
||||||
# ARM Normal (or Non Secure) Firmware PCDs
|
# ARM Normal (or Non Secure) Firmware PCDs
|
||||||
#
|
#
|
||||||
gArmTokenSpaceGuid.PcdNormalFdBaseAddress|0|UINT32|0x0000002B
|
gArmTokenSpaceGuid.PcdNormalFdBaseAddress|0|UINT32|0x0000002B
|
||||||
gArmTokenSpaceGuid.PcdNormalFdSize|0|UINT32|0x0000002C
|
gArmTokenSpaceGuid.PcdNormalFdSize|0|UINT32|0x0000002C
|
||||||
|
gArmTokenSpaceGuid.PcdNormalFvBaseAddress|0|UINT32|0x0000002D
|
||||||
|
gArmTokenSpaceGuid.PcdNormalFvSize|0|UINT32|0x0000002E
|
||||||
|
|
||||||
# System Memory (DRAM): These PCDs define the region of in-built system memory
|
# System Memory (DRAM): These PCDs define the region of in-built system memory
|
||||||
# Some platforms can get DRAM extensions, these additional regions will be declared
|
# Some platforms can get DRAM extensions, these additional regions will be declared
|
||||||
|
@ -340,10 +340,6 @@
|
|||||||
gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackBase|0x48000000 # Top of SEC Stack for Normal World
|
gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackBase|0x48000000 # Top of SEC Stack for Normal World
|
||||||
gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackSize|0x20000 # Size of SEC Stack for Normal World
|
gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackSize|0x20000 # Size of SEC Stack for Normal World
|
||||||
|
|
||||||
# Non Sec UEFI Firmware: These two PCDs must match PcdFlashFvMainBase/PcdFlashFvMainSize
|
|
||||||
gArmTokenSpaceGuid.PcdNormalFdBaseAddress|0x40050000 # Must be equal to gEmbeddedTokenSpaceGuid.PcdFlashFvMainBase
|
|
||||||
gArmTokenSpaceGuid.PcdNormalFdSize|0x00100000 # Must be equal to gEmbeddedTokenSpaceGuid.PcdFlashFvMainSize
|
|
||||||
|
|
||||||
# System Memory (256MB)
|
# System Memory (256MB)
|
||||||
gArmTokenSpaceGuid.PcdSystemMemoryBase|0x70000000
|
gArmTokenSpaceGuid.PcdSystemMemoryBase|0x70000000
|
||||||
gArmTokenSpaceGuid.PcdSystemMemorySize|0x10000000
|
gArmTokenSpaceGuid.PcdSystemMemorySize|0x10000000
|
||||||
|
@ -344,10 +344,6 @@
|
|||||||
gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackBase|0x48000000 # Top of SEC Stack for Normal World
|
gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackBase|0x48000000 # Top of SEC Stack for Normal World
|
||||||
gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackSize|0x20000 # Stack for each of the 4 CPU cores
|
gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackSize|0x20000 # Stack for each of the 4 CPU cores
|
||||||
|
|
||||||
# Non Sec UEFI Firmware: These two PCDs must match PcdFlashFvMainBase/PcdFlashFvMainSize
|
|
||||||
gArmTokenSpaceGuid.PcdNormalFdBaseAddress|0x40050000 # Must be equal to gEmbeddedTokenSpaceGuid.PcdFlashFvMainBase
|
|
||||||
gArmTokenSpaceGuid.PcdNormalFdSize|0x00100000 # Must be equal to gEmbeddedTokenSpaceGuid.PcdFlashFvMainSize
|
|
||||||
|
|
||||||
# System Memory (256MB)
|
# System Memory (256MB)
|
||||||
gArmTokenSpaceGuid.PcdSystemMemoryBase|0x70000000
|
gArmTokenSpaceGuid.PcdSystemMemoryBase|0x70000000
|
||||||
gArmTokenSpaceGuid.PcdSystemMemorySize|0x10000000
|
gArmTokenSpaceGuid.PcdSystemMemorySize|0x10000000
|
||||||
|
@ -27,8 +27,8 @@
|
|||||||
|
|
||||||
|
|
||||||
[FD.ArmRealViewEb_EFI]
|
[FD.ArmRealViewEb_EFI]
|
||||||
BaseAddress = 0x40000000 # The base address of the FLASH Device.
|
BaseAddress = 0x40000000|gArmTokenSpaceGuid.PcdNormalFdBaseAddress
|
||||||
Size = 0x00200000 # The size in bytes of the FLASH Device
|
Size = 0x00200000|gArmTokenSpaceGuid.PcdNormalFdSize
|
||||||
ErasePolarity = 1
|
ErasePolarity = 1
|
||||||
BlockSize = 0x00010000
|
BlockSize = 0x00010000
|
||||||
NumBlocks = 0x20
|
NumBlocks = 0x20
|
||||||
@ -50,11 +50,11 @@ NumBlocks = 0x20
|
|||||||
################################################################################
|
################################################################################
|
||||||
|
|
||||||
0x00000000|0x00050000
|
0x00000000|0x00050000
|
||||||
gEmbeddedTokenSpaceGuid.PcdFlashFvSecBase|gEmbeddedTokenSpaceGuid.PcdFlashFvSecSize
|
gArmTokenSpaceGuid.PcdSecureFvBaseAddress|gArmTokenSpaceGuid.PcdSecureFvBaseSize
|
||||||
FV = FVMAIN_SEC
|
FV = FVMAIN_SEC
|
||||||
|
|
||||||
0x00050000|0x00100000
|
0x00050000|0x00100000
|
||||||
gEmbeddedTokenSpaceGuid.PcdFlashFvMainBase|gEmbeddedTokenSpaceGuid.PcdFlashFvMainSize
|
gArmTokenSpaceGuid.PcdNormalFvBaseAddress|gArmTokenSpaceGuid.PcdNormalFvSize
|
||||||
FV = FVMAIN_COMPACT
|
FV = FVMAIN_COMPACT
|
||||||
|
|
||||||
################################################################################
|
################################################################################
|
||||||
|
@ -27,8 +27,8 @@
|
|||||||
|
|
||||||
|
|
||||||
[FD.ArmRealViewEb_EFI]
|
[FD.ArmRealViewEb_EFI]
|
||||||
BaseAddress = 0x40000000 # The base address of the FLASH Device.
|
BaseAddress = 0x40000000|gArmTokenSpaceGuid.PcdNormalFdBaseAddress
|
||||||
Size = 0x00200000 # The size in bytes of the FLASH Device
|
Size = 0x00200000|gArmTokenSpaceGuid.PcdNormalFdSize
|
||||||
ErasePolarity = 1
|
ErasePolarity = 1
|
||||||
BlockSize = 0x00010000
|
BlockSize = 0x00010000
|
||||||
NumBlocks = 0x20
|
NumBlocks = 0x20
|
||||||
@ -50,11 +50,11 @@ NumBlocks = 0x20
|
|||||||
################################################################################
|
################################################################################
|
||||||
|
|
||||||
0x00000000|0x00050000
|
0x00000000|0x00050000
|
||||||
gEmbeddedTokenSpaceGuid.PcdFlashFvSecBase|gEmbeddedTokenSpaceGuid.PcdFlashFvSecSize
|
gArmTokenSpaceGuid.PcdSecureFvBaseAddress|gArmTokenSpaceGuid.PcdSecureFvBaseSize
|
||||||
FV = FVMAIN_SEC
|
FV = FVMAIN_SEC
|
||||||
|
|
||||||
0x00050000|0x00100000
|
0x00050000|0x00100000
|
||||||
gEmbeddedTokenSpaceGuid.PcdFlashFvMainBase|gEmbeddedTokenSpaceGuid.PcdFlashFvMainSize
|
gArmTokenSpaceGuid.PcdNormalFvBaseAddress|gArmTokenSpaceGuid.PcdNormalFvSize
|
||||||
FV = FVMAIN_COMPACT
|
FV = FVMAIN_COMPACT
|
||||||
|
|
||||||
################################################################################
|
################################################################################
|
||||||
|
@ -27,10 +27,10 @@
|
|||||||
|
|
||||||
[FD.Sec_ArmVExpress_EFI]
|
[FD.Sec_ArmVExpress_EFI]
|
||||||
BaseAddress = 0x44000000|gArmTokenSpaceGuid.PcdSecureFdBaseAddress #The base address of the Secure FLASH Device.
|
BaseAddress = 0x44000000|gArmTokenSpaceGuid.PcdSecureFdBaseAddress #The base address of the Secure FLASH Device.
|
||||||
Size = 0x00200000|gArmTokenSpaceGuid.PcdSecureFdSize #The size in bytes of the Secure FLASH Device
|
Size = 0x00080000|gArmTokenSpaceGuid.PcdSecureFdSize #The size in bytes of the Secure FLASH Device
|
||||||
ErasePolarity = 1
|
ErasePolarity = 1
|
||||||
BlockSize = 0x00001000
|
BlockSize = 0x00001000
|
||||||
NumBlocks = 0x200
|
NumBlocks = 0x80
|
||||||
|
|
||||||
################################################################################
|
################################################################################
|
||||||
#
|
#
|
||||||
@ -48,8 +48,8 @@ NumBlocks = 0x200
|
|||||||
#
|
#
|
||||||
################################################################################
|
################################################################################
|
||||||
|
|
||||||
0x00000000|0x00200000
|
0x00000000|0x00080000
|
||||||
gEmbeddedTokenSpaceGuid.PcdFlashFvSecBase|gEmbeddedTokenSpaceGuid.PcdFlashFvSecSize
|
gArmTokenSpaceGuid.PcdSecureFvBaseAddress|gArmTokenSpaceGuid.PcdSecureFvBaseSize
|
||||||
FV = FVMAIN_SEC
|
FV = FVMAIN_SEC
|
||||||
|
|
||||||
|
|
||||||
@ -83,7 +83,7 @@ NumBlocks = 0x200
|
|||||||
################################################################################
|
################################################################################
|
||||||
|
|
||||||
0x00000000|0x00200000
|
0x00000000|0x00200000
|
||||||
gEmbeddedTokenSpaceGuid.PcdFlashFvMainBase|gEmbeddedTokenSpaceGuid.PcdFlashFvMainSize
|
gArmTokenSpaceGuid.PcdNormalFvBaseAddress|gArmTokenSpaceGuid.PcdNormalFvBaseSize
|
||||||
FV = FVMAIN_COMPACT
|
FV = FVMAIN_COMPACT
|
||||||
|
|
||||||
|
|
||||||
@ -147,11 +147,10 @@ READ_LOCK_STATUS = TRUE
|
|||||||
INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
|
INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
|
||||||
INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
|
INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
|
||||||
INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
|
INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
|
||||||
INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
|
|
||||||
INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
|
INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
|
||||||
INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
|
INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
|
||||||
INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
|
INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
|
||||||
INF EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf
|
INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
|
||||||
INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
|
INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
|
||||||
INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
|
INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
|
||||||
INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
|
INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
|
||||||
|
@ -78,7 +78,7 @@ Returns:
|
|||||||
|
|
||||||
BuildCpuHob (PcdGet8 (PcdPrePiCpuMemorySize), PcdGet8 (PcdPrePiCpuIoSize));
|
BuildCpuHob (PcdGet8 (PcdPrePiCpuMemorySize), PcdGet8 (PcdPrePiCpuIoSize));
|
||||||
|
|
||||||
BuildFvHob (FixedPcdGet32(PcdFlashFvMainBase), FixedPcdGet32(PcdFlashFvMainSize));
|
BuildFvHob (PcdGet32(PcdNormalFvBaseAddress), PcdGet32(PcdNormalFvSize));
|
||||||
|
|
||||||
BootMode = ArmPlatformGetBootMode ();
|
BootMode = ArmPlatformGetBootMode ();
|
||||||
Status = (**PeiServices).SetBootMode (PeiServices, (UINT8) BootMode);
|
Status = (**PeiServices).SetBootMode (PeiServices, (UINT8) BootMode);
|
||||||
|
@ -47,10 +47,12 @@
|
|||||||
gEfiPeiBootInRecoveryModePpiGuid # PPI SOMETIMES_PRODUCED
|
gEfiPeiBootInRecoveryModePpiGuid # PPI SOMETIMES_PRODUCED
|
||||||
|
|
||||||
[FixedPcd]
|
[FixedPcd]
|
||||||
gArmTokenSpaceGuid.PcdNormalFdBaseAddress # The base address of the FLASH Device.
|
gArmTokenSpaceGuid.PcdNormalFdBaseAddress
|
||||||
gArmTokenSpaceGuid.PcdNormalFdSize # The size in bytes of the FLASH Device
|
gArmTokenSpaceGuid.PcdNormalFdSize
|
||||||
gEmbeddedTokenSpaceGuid.PcdFlashFvMainBase
|
|
||||||
gEmbeddedTokenSpaceGuid.PcdFlashFvMainSize
|
gArmTokenSpaceGuid.PcdNormalFvBaseAddress
|
||||||
|
gArmTokenSpaceGuid.PcdNormalFvSize
|
||||||
|
|
||||||
gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize
|
gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize
|
||||||
gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize
|
gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize
|
||||||
|
|
||||||
|
@ -77,8 +77,8 @@ VOID primary_main (
|
|||||||
// Note also: HOBs (pei temp ram) MUST be above stack
|
// Note also: HOBs (pei temp ram) MUST be above stack
|
||||||
//
|
//
|
||||||
SecCoreData.DataSize = sizeof(EFI_SEC_PEI_HAND_OFF);
|
SecCoreData.DataSize = sizeof(EFI_SEC_PEI_HAND_OFF);
|
||||||
SecCoreData.BootFirmwareVolumeBase = (VOID *)(UINTN)PcdGet32 (PcdNormalFdBaseAddress);
|
SecCoreData.BootFirmwareVolumeBase = (VOID *)(UINTN)PcdGet32 (PcdNormalFvBaseAddress);
|
||||||
SecCoreData.BootFirmwareVolumeSize = PcdGet32 (PcdNormalFdSize);
|
SecCoreData.BootFirmwareVolumeSize = PcdGet32 (PcdNormalFvSize);
|
||||||
SecCoreData.TemporaryRamBase = (VOID *)(UINTN)PcdGet32 (PcdCPUCoresNonSecStackBase); // We consider we run on the primary core (and so we use the first stack)
|
SecCoreData.TemporaryRamBase = (VOID *)(UINTN)PcdGet32 (PcdCPUCoresNonSecStackBase); // We consider we run on the primary core (and so we use the first stack)
|
||||||
SecCoreData.TemporaryRamSize = (UINTN)(UINTN)PcdGet32 (PcdCPUCoresNonSecStackSize);
|
SecCoreData.TemporaryRamSize = (UINTN)(UINTN)PcdGet32 (PcdCPUCoresNonSecStackSize);
|
||||||
SecCoreData.PeiTemporaryRamBase = (VOID *)((UINTN)(SecCoreData.TemporaryRamBase) + (SecCoreData.TemporaryRamSize / 2));
|
SecCoreData.PeiTemporaryRamBase = (VOID *)((UINTN)(SecCoreData.TemporaryRamBase) + (SecCoreData.TemporaryRamSize / 2));
|
||||||
|
@ -39,8 +39,8 @@ VOID primary_main (
|
|||||||
// Note also: HOBs (pei temp ram) MUST be above stack
|
// Note also: HOBs (pei temp ram) MUST be above stack
|
||||||
//
|
//
|
||||||
SecCoreData.DataSize = sizeof(EFI_SEC_PEI_HAND_OFF);
|
SecCoreData.DataSize = sizeof(EFI_SEC_PEI_HAND_OFF);
|
||||||
SecCoreData.BootFirmwareVolumeBase = (VOID *)(UINTN)PcdGet32 (PcdNormalFdBaseAddress);
|
SecCoreData.BootFirmwareVolumeBase = (VOID *)(UINTN)PcdGet32 (PcdNormalFvBaseAddress);
|
||||||
SecCoreData.BootFirmwareVolumeSize = PcdGet32 (PcdNormalFdSize);
|
SecCoreData.BootFirmwareVolumeSize = PcdGet32 (PcdNormalFvSize);
|
||||||
SecCoreData.TemporaryRamBase = (VOID *)(UINTN)PcdGet32 (PcdCPUCoresNonSecStackBase); // We consider we run on the primary core (and so we use the first stack)
|
SecCoreData.TemporaryRamBase = (VOID *)(UINTN)PcdGet32 (PcdCPUCoresNonSecStackBase); // We consider we run on the primary core (and so we use the first stack)
|
||||||
SecCoreData.TemporaryRamSize = (UINTN)(UINTN)PcdGet32 (PcdCPUCoresNonSecStackSize);
|
SecCoreData.TemporaryRamSize = (UINTN)(UINTN)PcdGet32 (PcdCPUCoresNonSecStackSize);
|
||||||
SecCoreData.PeiTemporaryRamBase = (VOID *)((UINTN)(SecCoreData.TemporaryRamBase) + (SecCoreData.TemporaryRamSize / 2));
|
SecCoreData.PeiTemporaryRamBase = (VOID *)((UINTN)(SecCoreData.TemporaryRamBase) + (SecCoreData.TemporaryRamSize / 2));
|
||||||
|
@ -55,7 +55,7 @@ _AllocateGlobalPeiVariables:
|
|||||||
|
|
||||||
_PrepareArguments:
|
_PrepareArguments:
|
||||||
# The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector
|
# The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector
|
||||||
LoadConstantToReg (FixedPcdGet32(PcdNormalFdBaseAddress), r2)
|
LoadConstantToReg (FixedPcdGet32(PcdNormalFvBaseAddress), r2)
|
||||||
add r2, r2, #4
|
add r2, r2, #4
|
||||||
ldr r1, [r2]
|
ldr r1, [r2]
|
||||||
|
|
||||||
|
@ -53,7 +53,7 @@ _AllocateGlobalPeiVariables
|
|||||||
|
|
||||||
_PrepareArguments
|
_PrepareArguments
|
||||||
// The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector
|
// The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector
|
||||||
LoadConstantToReg (FixedPcdGet32(PcdNormalFdBaseAddress), r2)
|
LoadConstantToReg (FixedPcdGet32(PcdNormalFvBaseAddress), r2)
|
||||||
add r2, r2, #4
|
add r2, r2, #4
|
||||||
ldr r1, [r2]
|
ldr r1, [r2]
|
||||||
|
|
||||||
|
@ -53,8 +53,8 @@
|
|||||||
gArmPlatformTokenSpaceGuid.PcdStandalone
|
gArmPlatformTokenSpaceGuid.PcdStandalone
|
||||||
|
|
||||||
[FixedPcd]
|
[FixedPcd]
|
||||||
gArmTokenSpaceGuid.PcdNormalFdBaseAddress
|
gArmTokenSpaceGuid.PcdNormalFvBaseAddress
|
||||||
gArmTokenSpaceGuid.PcdNormalFdSize
|
gArmTokenSpaceGuid.PcdNormalFvSize
|
||||||
|
|
||||||
gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackBase
|
gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackBase
|
||||||
gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackSize
|
gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackSize
|
||||||
|
@ -42,7 +42,6 @@
|
|||||||
IoLib
|
IoLib
|
||||||
ArmLib
|
ArmLib
|
||||||
ArmPlatformLib
|
ArmPlatformLib
|
||||||
SerialPortLib
|
|
||||||
|
|
||||||
[Ppis]
|
[Ppis]
|
||||||
gEfiTemporaryRamSupportPpiGuid
|
gEfiTemporaryRamSupportPpiGuid
|
||||||
@ -51,8 +50,8 @@
|
|||||||
gArmPlatformTokenSpaceGuid.PcdStandalone
|
gArmPlatformTokenSpaceGuid.PcdStandalone
|
||||||
|
|
||||||
[FixedPcd]
|
[FixedPcd]
|
||||||
gArmTokenSpaceGuid.PcdNormalFdBaseAddress
|
gArmTokenSpaceGuid.PcdNormalFvBaseAddress
|
||||||
gArmTokenSpaceGuid.PcdNormalFdSize
|
gArmTokenSpaceGuid.PcdNormalFvSize
|
||||||
|
|
||||||
gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackBase
|
gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackBase
|
||||||
gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackSize
|
gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackSize
|
||||||
|
@ -206,7 +206,7 @@ CEntryPoint (
|
|||||||
// If ArmVe has not been built as Standalone then we need to patch the DRAM to add an infinite loop at the start address
|
// If ArmVe has not been built as Standalone then we need to patch the DRAM to add an infinite loop at the start address
|
||||||
if (FeaturePcdGet(PcdStandalone) == FALSE) {
|
if (FeaturePcdGet(PcdStandalone) == FALSE) {
|
||||||
if (CoreId == ARM_PRIMARY_CORE) {
|
if (CoreId == ARM_PRIMARY_CORE) {
|
||||||
UINTN* StartAddress = (UINTN*)PcdGet32(PcdNormalFdBaseAddress);
|
UINTN* StartAddress = (UINTN*)PcdGet32(PcdNormalFvBaseAddress);
|
||||||
|
|
||||||
// Patch the DRAM to make an infinite loop at the start address
|
// Patch the DRAM to make an infinite loop at the start address
|
||||||
*StartAddress = 0xEAFFFFFE; // opcode for while(1)
|
*StartAddress = 0xEAFFFFFE; // opcode for while(1)
|
||||||
@ -215,7 +215,7 @@ CEntryPoint (
|
|||||||
SerialPortWrite ((UINT8 *) Buffer, CharCount);
|
SerialPortWrite ((UINT8 *) Buffer, CharCount);
|
||||||
|
|
||||||
// To enter into Non Secure state, we need to make a return from exception
|
// To enter into Non Secure state, we need to make a return from exception
|
||||||
return_from_exception(PcdGet32(PcdNormalFdBaseAddress));
|
return_from_exception(PcdGet32(PcdNormalFvBaseAddress));
|
||||||
} else {
|
} else {
|
||||||
// When the primary core is stopped by the hardware debugger to copy the firmware
|
// When the primary core is stopped by the hardware debugger to copy the firmware
|
||||||
// into DRAM. The secondary cores are still running. As soon as the first bytes of
|
// into DRAM. The secondary cores are still running. As soon as the first bytes of
|
||||||
@ -229,7 +229,7 @@ CEntryPoint (
|
|||||||
}
|
}
|
||||||
} else {
|
} else {
|
||||||
// To enter into Non Secure state, we need to make a return from exception
|
// To enter into Non Secure state, we need to make a return from exception
|
||||||
return_from_exception(PcdGet32(PcdNormalFdBaseAddress));
|
return_from_exception(PcdGet32(PcdNormalFvBaseAddress));
|
||||||
}
|
}
|
||||||
//-------------------- Non Secure Mode ---------------------
|
//-------------------- Non Secure Mode ---------------------
|
||||||
|
|
||||||
@ -247,7 +247,7 @@ NonSecureWaitForFirmware (
|
|||||||
VOID (*secondary_start)(VOID);
|
VOID (*secondary_start)(VOID);
|
||||||
|
|
||||||
// The secondary cores will execute the firmware once wake from WFI.
|
// The secondary cores will execute the firmware once wake from WFI.
|
||||||
secondary_start = (VOID (*)())PcdGet32(PcdNormalFdBaseAddress);
|
secondary_start = (VOID (*)())PcdGet32(PcdNormalFvBaseAddress);
|
||||||
|
|
||||||
ArmCallWFI();
|
ArmCallWFI();
|
||||||
|
|
||||||
|
@ -52,7 +52,7 @@
|
|||||||
gArmTokenSpaceGuid.PcdVFPEnabled
|
gArmTokenSpaceGuid.PcdVFPEnabled
|
||||||
gArmPlatformTokenSpaceGuid.PcdMPCoreSupport
|
gArmPlatformTokenSpaceGuid.PcdMPCoreSupport
|
||||||
|
|
||||||
gArmTokenSpaceGuid.PcdNormalFdBaseAddress
|
gArmTokenSpaceGuid.PcdNormalFvBaseAddress
|
||||||
|
|
||||||
gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase
|
gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase
|
||||||
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecStackSize
|
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecStackSize
|
||||||
|
Loading…
x
Reference in New Issue
Block a user