mirror of https://github.com/acidanthera/audk.git
DynamicTablesPkg/SsdtSerialPortFixupLib: Add Interrupt node for SPIs only
Add interrupt node to the AML description of the serial-port only if the IRQ ID from the Configuration Manager is a valid SPI (shared processor interrupt) or an extended SPI. So, for DBG2 UART ports where interrupt is not mandatory, adding of an interrupt node in the AML description using Serial Port Fixup Library can be ignored if the UART is not defined with a valid SPI, like in N1SDP. This update generates the interrupt node for the valid SPI range using the AML Codegen API instead of updating it using the AML Fixup API. Cc: Sami Mujawar <Sami.Mujawar@arm.com> Cc: Pierre Gondois <pierre.gondois@arm.com> Signed-off-by: Himanshu Sharma <Himanshu.Sharma@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Pierre Gondois <pierre.gondois@arm.com>
This commit is contained in:
Himanshu Sharma
mergify[bot]
parent
855f528199
commit
1ae5bee967
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@ -1,6 +1,6 @@
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/** @file
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Copyright (c) 2017 - 2023, Arm Limited. All rights reserved.<BR>
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Copyright (c) 2017 - 2024, Arm Limited. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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@ -317,7 +317,10 @@ typedef struct CmArmSerialPortInfo {
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/// The physical base address for the serial port
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UINT64 BaseAddress;
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/// The serial port interrupt
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/** The serial port interrupt.
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0 indicates that the serial port does not
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have an interrupt wired.
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*/
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UINT32 Interrupt;
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/// The serial port baud rate
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@ -1,7 +1,7 @@
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/** @file
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SSDT Serial Port Fixup Library.
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Copyright (c) 2019 - 2021, Arm Limited. All rights reserved.<BR>
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Copyright (c) 2019 - 2024, Arm Limited. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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@ -9,6 +9,9 @@
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- Arm Server Base Boot Requirements (SBBR), s4.2.1.8 "SPCR".
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- Microsoft Debug Port Table 2 (DBG2) Specification - December 10, 2015.
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- ACPI for Arm Components 1.0 - 2020
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- Arm Generic Interrupt Controller Architecture Specification,
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Issue H, January 2022.
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(https://developer.arm.com/documentation/ihi0069/)
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**/
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#include <IndustryStandard/DebugPort2Table.h>
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@ -27,6 +30,10 @@
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#include <Library/AmlLib/AmlLib.h>
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#include <Protocol/ConfigurationManagerProtocol.h>
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#if defined (MDE_CPU_ARM) || defined (MDE_CPU_AARCH64)
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#include <Library/ArmGicArchLib.h>
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#endif
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/** C array containing the compiled AML template.
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This symbol is defined in the auto generated C file
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containing the AML bytecode array.
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@ -100,6 +107,26 @@ ValidateSerialPortInfo (
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return EFI_INVALID_PARAMETER;
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}
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#if defined (MDE_CPU_ARM) || defined (MDE_CPU_AARCH64)
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// If an interrupt is not wired to the serial port, the Configuration
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// Manager specifies the interrupt as 0.
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// Any other value must be within the SPI or extended SPI range.
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if ((SerialPortInfo->Interrupt != 0) &&
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!(((SerialPortInfo->Interrupt >= ARM_GIC_ARCH_SPI_MIN) &&
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(SerialPortInfo->Interrupt <= ARM_GIC_ARCH_SPI_MAX)) ||
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((SerialPortInfo->Interrupt >= ARM_GIC_ARCH_EXT_SPI_MIN) &&
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(SerialPortInfo->Interrupt <= ARM_GIC_ARCH_EXT_SPI_MAX))))
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{
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DEBUG ((
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DEBUG_ERROR,
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"ERROR: Invalid UART port interrupt ID. Interrupt = %lu\n",
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SerialPortInfo->Interrupt
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));
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return EFI_INVALID_PARAMETER;
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}
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#endif
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DEBUG ((DEBUG_INFO, "UART Configuration:\n"));
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DEBUG ((
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DEBUG_INFO,
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@ -270,7 +297,6 @@ FixupCrs (
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EFI_STATUS Status;
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AML_OBJECT_NODE_HANDLE NameOpCrsNode;
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AML_DATA_NODE_HANDLE QWordRdNode;
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AML_DATA_NODE_HANDLE InterruptRdNode;
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// Get the "_CRS" object defined by the "Name ()" statement.
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Status = AmlFindNode (
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@ -303,20 +329,22 @@ FixupCrs (
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return Status;
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}
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// Get the Interrupt node.
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// It is the second Resource Data element in the NameOpCrsNode's
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// variable list of arguments.
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Status = AmlNameOpGetNextRdNode (QWordRdNode, &InterruptRdNode);
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if (EFI_ERROR (Status)) {
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return Status;
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}
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// Generate an interrupt node as the second Resource Data element in the
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// NameOpCrsNode, if the interrupt for the serial-port is a valid SPI from
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// Table 2-1 in Arm Generic Interrupt Controller Architecture Specification.
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Status = AmlCodeGenRdInterrupt (
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TRUE, // Resource Consumer
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FALSE, // Level Triggered
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FALSE, // Active High
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FALSE, // Exclusive
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(UINT32 *)&SerialPortInfo->Interrupt,
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1,
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NameOpCrsNode,
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NULL
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);
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ASSERT_EFI_ERROR (Status);
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if (InterruptRdNode == NULL) {
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return EFI_INVALID_PARAMETER;
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}
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// Update the interrupt number.
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return AmlUpdateRdInterrupt (InterruptRdNode, SerialPortInfo->Interrupt);
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return Status;
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}
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/** Fixup the Serial Port device name.
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@ -18,12 +18,15 @@
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SsdtSerialPortFixupLib.c
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SsdtSerialPortTemplate.asl
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[Packages]
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[Packages.common]
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MdePkg/MdePkg.dec
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MdeModulePkg/MdeModulePkg.dec
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EmbeddedPkg/EmbeddedPkg.dec
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DynamicTablesPkg/DynamicTablesPkg.dec
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[Packages.ARM, Packages.AARCH64]
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ArmPkg/ArmPkg.dec
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[LibraryClasses]
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AcpiHelperLib
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AmlLib
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@ -1,7 +1,7 @@
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/** @file
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SSDT Serial Template
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Copyright (c) 2019 - 2020, Arm Limited. All rights reserved.<BR>
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Copyright (c) 2019 - 2024, Arm Limited. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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@ -10,6 +10,7 @@
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@par Glossary:
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- {template} - Data fixed up using AML Fixup APIs.
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- {codegen} - Data generated using AML Codegen APIs.
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**/
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DefinitionBlock ("SsdtSerialPortTemplate.aml", "SSDT", 2, "ARMLTD", "SERIAL", 1) {
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@ -43,17 +44,21 @@ DefinitionBlock ("SsdtSerialPortTemplate.aml", "SSDT", 2, "ARMLTD", "SERIAL", 1)
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, // MemoryRangeType
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// TranslationType
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) // QWordMemory
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Interrupt (
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ResourceConsumer, // ResourceUsage
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Level, // EdgeLevel
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ActiveHigh, // ActiveLevel
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Exclusive, // Shared
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, // ResourceSourceIndex
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, // ResourceSource
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// DescriptorName
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) {
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0xA5 // {template}
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} // Interrupt
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// The Interrupt information is generated using AmlCodegen.
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//
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// Interrupt ( // {codegen}
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// ResourceConsumer, // ResourceUsage
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// Level, // EdgeLevel
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// ActiveHigh, // ActiveLevel
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// Exclusive, // Shared
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// , // ResourceSourceIndex
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// , // ResourceSource
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// // DescriptorName
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// ) {
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// <IRQ> // <spi>
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// } // Interrupt
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}) // Name
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} // Device
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} // Scope (_SB)
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