mirror of https://github.com/acidanthera/audk.git
In AtaAtapiPassThru driver
1. move the non-blocking task related setting ahead to store the MapTable and PageCount in case there is a IO operation error happened then the error handler code could use those information to release the resource. 2. Enlarge the TPL protective area to make sure the simulative delay time is accurate when there is mixing usage of Non blocking and blocking I/O. Signed-off-by: qianouyang Reviewed-by: erictian git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12712 6f19259b-4bc3-4df7-8a09-765794883524
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@ -905,15 +905,15 @@ AhciDmaTransfer (
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// BlockIO tasks.
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// BlockIO tasks.
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// Delay 100us to simulate the blocking time out checking.
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// Delay 100us to simulate the blocking time out checking.
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//
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//
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while ((Task == NULL) && (!IsListEmpty (&Instance->NonBlockingTaskList))) {
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OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
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OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
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while ((Task == NULL) && (!IsListEmpty (&Instance->NonBlockingTaskList))) {
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AsyncNonBlockingTransferRoutine (NULL, Instance);
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AsyncNonBlockingTransferRoutine (NULL, Instance);
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gBS->RestoreTPL (OldTpl);
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//
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//
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// Stall for 100us.
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// Stall for 100us.
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//
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//
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MicroSecondDelay (100);
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MicroSecondDelay (100);
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}
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}
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gBS->RestoreTPL (OldTpl);
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if ((Task == NULL) || ((Task != NULL) && (!Task->IsStart))) {
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if ((Task == NULL) || ((Task != NULL) && (!Task->IsStart))) {
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//
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//
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@ -1495,15 +1495,15 @@ AtaUdmaInOut (
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// BlockIO tasks.
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// BlockIO tasks.
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// Delay 1ms to simulate the blocking time out checking.
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// Delay 1ms to simulate the blocking time out checking.
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//
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//
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while ((Task == NULL) && (!IsListEmpty (&Instance->NonBlockingTaskList))) {
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OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
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OldTpl = gBS->RaiseTPL (TPL_NOTIFY);
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while ((Task == NULL) && (!IsListEmpty (&Instance->NonBlockingTaskList))) {
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AsyncNonBlockingTransferRoutine (NULL, Instance);
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AsyncNonBlockingTransferRoutine (NULL, Instance);
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gBS->RestoreTPL (OldTpl);
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//
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//
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// Stall for 1 milliseconds.
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// Stall for 1 milliseconds.
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//
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//
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MicroSecondDelay (1000);
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MicroSecondDelay (1000);
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}
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}
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gBS->RestoreTPL (OldTpl);
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//
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//
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// The data buffer should be even alignment
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// The data buffer should be even alignment
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@ -1663,6 +1663,20 @@ AtaUdmaInOut (
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}
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}
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IdeWritePortB (PciIo, IoPortForBmic, RegisterValue);
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IdeWritePortB (PciIo, IoPortForBmic, RegisterValue);
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if (Task != NULL) {
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//
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// Max transfer number of sectors for one command is 65536(32Mbyte),
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// it will cost 1 second to transfer these data in UDMA mode 2(33.3MBps).
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// So set the variable Count to 2000, for about 2 second Timeout time.
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//
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Task->RetryTimes = 2000;
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Task->Map = BufferMap;
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Task->TableMap = PrdTableMap;
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Task->MapBaseAddress = PrdBaseAddr;
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Task->PageCount = PageCount;
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Task->IsStart = TRUE;
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}
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//
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//
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// Issue ATA command
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// Issue ATA command
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//
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//
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@ -1685,19 +1699,6 @@ AtaUdmaInOut (
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RegisterValue |= BMIC_START;
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RegisterValue |= BMIC_START;
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IdeWritePortB(PciIo, IoPortForBmic, RegisterValue);
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IdeWritePortB(PciIo, IoPortForBmic, RegisterValue);
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if (Task != NULL) {
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//
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// Max transfer number of sectors for one command is 65536(32Mbyte),
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// it will cost 1 second to transfer these data in UDMA mode 2(33.3MBps).
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// So set the variable Count to 2000, for about 2 second Timeout time.
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//
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Task->RetryTimes = 2000;
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Task->Map = BufferMap;
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Task->TableMap = PrdTableMap;
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Task->MapBaseAddress = PrdBaseAddr;
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Task->PageCount = PageCount;
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Task->IsStart = TRUE;
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}
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}
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}
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//
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//
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