mirror of https://github.com/acidanthera/audk.git
MdePkg/PciExpress40.h: DVSEC definition missing
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2598 All registers definition of DVSEC are defined as per the PCI Express Base Specification 4.0 chapter 7.9.6. Signed-off-by: Ashraf Javeed <ashraf.javeed@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Zhiguang Liu <zhiguang.liu@intel.com> Reviewed-by: Zhiguang Liu <zhiguang.liu@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
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@ -4,6 +4,7 @@ Support for the PCI Express 4.0 standard.
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This header file may not define all structures. Please extend as required.
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Copyright (c) 2018, American Megatrends, Inc. All rights reserved.<BR>
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Copyright (c) 2020, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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@ -78,6 +79,33 @@ typedef struct {
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} PCI_EXPRESS_EXTENDED_CAPABILITIES_PHYSICAL_LAYER_16_0;
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///@}
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/// The Designated Vendor Specific Capability definitions
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/// Based on section 7.9.6 of PCI Express Base Specification 4.0.
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///@{
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typedef union {
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struct {
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UINT32 DvsecVendorId : 16; //bit 0..15
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UINT32 DvsecRevision : 4; //bit 16..19
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UINT32 DvsecLength : 12; //bit 20..31
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}Bits;
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UINT32 Uint32;
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}PCI_EXPRESS_DESIGNATED_VENDOR_SPECIFIC_HEADER_1;
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typedef union {
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struct {
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UINT16 DvsecId : 16; //bit 0..15
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}Bits;
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UINT16 Uint16;
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}PCI_EXPRESS_DESIGNATED_VENDOR_SPECIFIC_HEADER_2;
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typedef struct {
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PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER Header;
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PCI_EXPRESS_DESIGNATED_VENDOR_SPECIFIC_HEADER_1 DesignatedVendorSpecificHeader1;
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PCI_EXPRESS_DESIGNATED_VENDOR_SPECIFIC_HEADER_2 DesignatedVendorSpecificHeader2;
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UINT8 DesignatedVendorSpecific[1];
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}PCI_EXPRESS_EXTENDED_CAPABILITIES_DESIGNATED_VENDOR_SPECIFIC;
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///@}
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#pragma pack()
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#endif
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