ArmPlatformPkg/ArmJunoPkg: Enable PCI and SATA support

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
Reviewed-by: Ronald Cron <Ronald.Cron@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17414 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Olivier Martin 2015-05-11 17:52:03 +00:00 committed by oliviermartin
parent f63424474e
commit 1bb1f35f2e
7 changed files with 171 additions and 4 deletions

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@ -129,6 +129,17 @@
gArmTokenSpaceGuid.PcdGicDistributorBase|0x2C010000
gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0x2C02F000
#
# PLDA PCI Root Complex
#
gArmPlatformTokenSpaceGuid.PcdPciBusMax|255
gArmPlatformTokenSpaceGuid.PcdPciIoBase|0x5f800000
gArmPlatformTokenSpaceGuid.PcdPciIoSize|0x00800000
gArmPlatformTokenSpaceGuid.PcdPciMmio32Base|0x50000000
gArmPlatformTokenSpaceGuid.PcdPciMmio32Size|0x08000000
gArmPlatformTokenSpaceGuid.PcdPciMmio64Base|0x4000000000
gArmPlatformTokenSpaceGuid.PcdPciMmio64Size|0x100000000
# List of Device Paths that support BootMonFs
gArmPlatformTokenSpaceGuid.PcdBootMonFsSupportedDevicePaths|L"VenHw(E7223039-5836-41E1-B542-D7EC736C5E59)"
@ -235,7 +246,24 @@
MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
# Required by PCI
UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
#
# PCI Support
#
MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
ArmPlatformPkg/ArmJunoPkg/Drivers/PciHostBridgeDxe/PciHostBridgeDxe.inf
#
# SATA Controller
#
MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
EmbeddedPkg/Drivers/SataSiI3132Dxe/SataSiI3132Dxe.inf
#
# Networking stack
#
EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118Dxe.inf
#

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@ -1,5 +1,5 @@
#
# Copyright (c) 2013-2014, ARM Limited. All rights reserved.
# Copyright (c) 2013-2015, ARM Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@ -142,6 +142,9 @@ READ_LOCK_STATUS = TRUE
INF FatBinPkg/EnhancedFatDxe/Fat.inf
INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
# Required by PCI
INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
# FV FileSystem
INF MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFileSystemDxe.inf
@ -154,6 +157,18 @@ READ_LOCK_STATUS = TRUE
INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
INF MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf
#
# PCI Support
#
INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
INF ArmPlatformPkg/ArmJunoPkg/Drivers/PciHostBridgeDxe/PciHostBridgeDxe.inf
#
# SATA Controller
#
INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
INF EmbeddedPkg/Drivers/SataSiI3132Dxe/SataSiI3132Dxe.inf
#
# Networking stack
#

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@ -16,7 +16,9 @@
#include <ArmPlatform.h>
#include <Protocol/DevicePathFromText.h>
#include <Protocol/PciRootBridgeIo.h>
#include <Guid/EventGroup.h>
#include <Guid/GlobalVariable.h>
#include <Library/ArmShellCmdLib.h>
@ -54,6 +56,28 @@ STATIC EFI_STATUS SetJunoR1DefaultBootEntries (
// This GUID must match the FILE_GUID in ArmPlatformPkg/ArmJunoPkg/AcpiTables/AcpiTables.inf
STATIC CONST EFI_GUID mJunoAcpiTableFile = { 0xa1dd808e, 0x1e95, 0x4399, { 0xab, 0xc0, 0x65, 0x3c, 0x82, 0xe8, 0x53, 0x0c } };
typedef struct {
ACPI_HID_DEVICE_PATH AcpiDevicePath;
EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
} EFI_PCI_ROOT_BRIDGE_DEVICE_PATH;
STATIC CONST EFI_PCI_ROOT_BRIDGE_DEVICE_PATH mPciRootComplexDevicePath = {
{
{ ACPI_DEVICE_PATH,
ACPI_DP,
{ (UINT8) (sizeof (ACPI_HID_DEVICE_PATH)),
(UINT8) ((sizeof (ACPI_HID_DEVICE_PATH)) >> 8) }
},
EISA_PNP_ID (0x0A03),
0
},
{
END_DEVICE_PATH_TYPE,
END_ENTIRE_DEVICE_PATH_SUBTYPE,
{ END_DEVICE_PATH_LENGTH, 0 }
}
};
/**
* Build and Set UEFI Variable Boot####
*
@ -123,6 +147,46 @@ BootOptionCreate (
);
}
/**
Notification function of the event defined as belonging to the
EFI_END_OF_DXE_EVENT_GROUP_GUID event group that was created in
the entry point of the driver.
This function is called when an event belonging to the
EFI_END_OF_DXE_EVENT_GROUP_GUID event group is signalled. Such an
event is signalled once at the end of the dispatching of all
drivers (end of the so called DXE phase).
@param[in] Event Event declared in the entry point of the driver whose
notification function is being invoked.
@param[in] Context NULL
**/
STATIC
VOID
OnEndOfDxe (
IN EFI_EVENT Event,
IN VOID *Context
)
{
EFI_DEVICE_PATH_PROTOCOL* PciRootComplexDevicePath;
EFI_HANDLE Handle;
EFI_STATUS Status;
//
// PCI Root Complex initialization
// At the end of the DXE phase, we should get all the driver dispatched.
// Force the PCI Root Complex to be initialized. It allows the OS to skip
// this step.
//
PciRootComplexDevicePath = (EFI_DEVICE_PATH_PROTOCOL*) &mPciRootComplexDevicePath;
Status = gBS->LocateDevicePath (&gEfiPciRootBridgeIoProtocolGuid,
&PciRootComplexDevicePath,
&Handle);
Status = gBS->ConnectController (Handle, NULL, PciRootComplexDevicePath, FALSE);
ASSERT_EFI_ERROR (Status);
}
EFI_STATUS
EFIAPI
ArmJunoEntryPoint (
@ -183,6 +247,22 @@ ArmJunoEntryPoint (
}
}
//
// Create an event belonging to the "gEfiEndOfDxeEventGroupGuid" group.
// The "OnEndOfDxe()" function is declared as the call back function.
// It will be called at the end of the DXE phase when an event of the
// same group is signalled to inform about the end of the DXE phase.
// Install the INSTALL_FDT_PROTOCOL protocol.
//
Status = gBS->CreateEventEx (
EVT_NOTIFY_SIGNAL,
TPL_CALLBACK,
OnEndOfDxe,
NULL,
&gEfiEndOfDxeEventGroupGuid,
&EndOfDxeEvent
);
// Install dynamic Shell command to run baremetal binaries.
Status = ShellDynCmdRunAxfInstall (ImageHandle);
if (EFI_ERROR (Status)) {

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@ -57,6 +57,7 @@
gEfiBlockIoProtocolGuid
gEfiDevicePathFromTextProtocolGuid
gEfiPciIoProtocolGuid
gEfiPciRootBridgeIoProtocolGuid
gEfiSimpleFileSystemProtocolGuid
[FixedPcd]

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@ -40,6 +40,9 @@
#define ARM_JUNO_PERIPHERALS_BASE 0x20000000
#define ARM_JUNO_PERIPHERALS_SZ 0x0E000000
#define ARM_JUNO_GIV2M_MSI_BASE 0x2c1c0000
#define ARM_JUNO_GIV2M_MSI_SZ SIZE_256KB
// On-Chip non-secure SRAM
#define ARM_JUNO_NON_SECURE_SRAM_BASE 0x2E000000
#define ARM_JUNO_NON_SECURE_SRAM_SZ SIZE_16MB

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@ -1,5 +1,5 @@
#
# Copyright (c) 2013-2014, ARM Limited. All rights reserved.
# Copyright (c) 2013-2015, ARM Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@ -52,3 +52,13 @@
gArmTokenSpaceGuid.PcdFvBaseAddress
gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
gArmJunoTokenSpaceGuid.PcdPcieControlBaseAddress
gArmJunoTokenSpaceGuid.PcdPciConfigurationSpaceBaseAddress
gArmJunoTokenSpaceGuid.PcdPciConfigurationSpaceSize
[Pcd]
gArmPlatformTokenSpaceGuid.PcdPciMmio32Base
gArmPlatformTokenSpaceGuid.PcdPciMmio32Size
gArmPlatformTokenSpaceGuid.PcdPciMmio64Base
gArmPlatformTokenSpaceGuid.PcdPciMmio64Size

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@ -1,6 +1,6 @@
/** @file
*
* Copyright (c) 2013-2014, ARM Limited. All rights reserved.
* Copyright (c) 2013-2015, ARM Limited. All rights reserved.
*
* This program and the accompanying materials
* are licensed and made available under the terms and conditions of the BSD License
@ -22,7 +22,7 @@
#include <ArmPlatform.h>
// The total number of descriptors, including the final "end-of-table" descriptor.
#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 12
#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 16
// DDR attributes
#define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK
@ -114,6 +114,36 @@ ArmPlatformGetVirtualMemoryMap (
VirtualMemoryTable[Index].Length = ARM_JUNO_NON_SECURE_SRAM_SZ;
VirtualMemoryTable[Index].Attributes = CacheAttributes;
// PCI Root Complex
VirtualMemoryTable[++Index].PhysicalBase = PcdGet64 (PcdPcieControlBaseAddress);
VirtualMemoryTable[Index].VirtualBase = PcdGet64 (PcdPcieControlBaseAddress);
VirtualMemoryTable[Index].Length = SIZE_128KB;
VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
//
// PCI Configuration Space
//
VirtualMemoryTable[++Index].PhysicalBase = PcdGet64 (PcdPciConfigurationSpaceBaseAddress);
VirtualMemoryTable[Index].VirtualBase = PcdGet64 (PcdPciConfigurationSpaceBaseAddress);
VirtualMemoryTable[Index].Length = PcdGet64 (PcdPciConfigurationSpaceSize);
VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
//
// PCI Memory Space
//
VirtualMemoryTable[++Index].PhysicalBase = PcdGet32 (PcdPciMmio32Base);
VirtualMemoryTable[Index].VirtualBase = PcdGet32 (PcdPciMmio32Base);
VirtualMemoryTable[Index].Length = PcdGet32 (PcdPciMmio32Size);
VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
//
// 64-bit PCI Memory Space
//
VirtualMemoryTable[++Index].PhysicalBase = PcdGet64 (PcdPciMmio64Base);
VirtualMemoryTable[Index].VirtualBase = PcdGet64 (PcdPciMmio64Base);
VirtualMemoryTable[Index].Length = PcdGet64 (PcdPciMmio64Size);
VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
// Juno SOC peripherals
VirtualMemoryTable[++Index].PhysicalBase = ARM_JUNO_SOC_PERIPHERALS_BASE;
VirtualMemoryTable[Index].VirtualBase = ARM_JUNO_SOC_PERIPHERALS_BASE;