OvmfPkg: report support for the PIIX3 reset register in the FADT

The value to be written corresponds to hard reset, which is what the ACPI
spec prescribes.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14156 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
jljusten 2013-03-04 17:38:05 +00:00
parent 304606c0b6
commit 1bccb20cf0
2 changed files with 6 additions and 3 deletions

View File

@ -65,8 +65,8 @@ EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE FACP = {
0x0000, // Boot architecture flag (16-bit)
RESERVED, // reserved
FLAG, // Fixed feature flags
{ 0 }, // Address of the Reset Register
0, // Value for the Reset Register to reset the system
GAS2_IO(RESET_REG, 1), // Extended address of the Reset Register
RESET_VALUE, // Value for the Reset Register to reset the system
{ RESERVED }, // reserved[3]
0, // 64-bit physical addesss of FACS, set at installation
0, // 64-bit physical addesss of DSDT, set at installation

View File

@ -54,7 +54,10 @@
#define FLAG (EFI_ACPI_2_0_WBINVD | \
EFI_ACPI_2_0_PROC_C1 | \
EFI_ACPI_2_0_SLP_BUTTON | \
EFI_ACPI_2_0_RTC_S4)
EFI_ACPI_2_0_RTC_S4 | \
EFI_ACPI_2_0_RESET_REG_SUP)
#define RESET_REG 0xCF9
#define RESET_VALUE (BIT2 | BIT1) // PIIX3 Reset CPU + System Reset
//
// Byte-aligned IO port register block initializer for