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UefiCpuPkg: Update SmmCpuFeatureLib pass XCODE5 tool chain

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https://bugzilla.tianocore.org/show_bug.cgi?id=849

In V2, use "mov rax, strict qword 0" to replace the hard code db.

1. Use lea instruction to get the address instead of mov instruction.
2. Use the dummy address as jmp destination, and add the logic to fix up
the address to the absolute address at boot time.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
This commit is contained in:
Liming Gao 2018-01-11 17:05:14 +08:00
parent 2db0ccc2d7
commit 1c7a65eba7
5 changed files with 52 additions and 22 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiEntry.nasm
View File

@ -1,5 +1,5 @@
;------------------------------------------------------------------------------ ; ;------------------------------------------------------------------------------ ;
; Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.<BR> ; Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials ; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License ; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at ; which accompanies this distribution. The full text of the license may be found at
@ -273,3 +273,7 @@ _StmSmiHandler:
ASM_PFX(gcStmSmiHandlerSize) : DW $ - _StmSmiEntryPoint ASM_PFX(gcStmSmiHandlerSize) : DW $ - _StmSmiEntryPoint
ASM_PFX(gcStmSmiHandlerOffset) : DW _StmSmiHandler - _StmSmiEntryPoint ASM_PFX(gcStmSmiHandlerOffset) : DW _StmSmiHandler - _StmSmiEntryPoint
global ASM_PFX(SmmCpuFeaturesLibStmSmiEntryFixupAddress)
ASM_PFX(SmmCpuFeaturesLibStmSmiEntryFixupAddress):
ret

8
UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.c
View File

@ -1,7 +1,7 @@
/** @file /** @file
SMM STM support functions SMM STM support functions
Copyright (c) 2015 - 2017, Intel Corporation. All rights reserved.<BR> Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at which accompanies this distribution. The full text of the license may be found at
@ -116,7 +116,6 @@ UINTN mMsegSize = 0;
BOOLEAN mStmConfigurationTableInitialized = FALSE; BOOLEAN mStmConfigurationTableInitialized = FALSE;
/** /**
The constructor function The constructor function
@ -138,6 +137,11 @@ SmmCpuFeaturesLibStmConstructor (
EFI_HOB_GUID_TYPE *GuidHob; EFI_HOB_GUID_TYPE *GuidHob;
EFI_SMRAM_DESCRIPTOR *SmramDescriptor; EFI_SMRAM_DESCRIPTOR *SmramDescriptor;
//
// Initialize address fixup
//
SmmCpuFeaturesLibStmSmiEntryFixupAddress ();
// //
// Call the common constructor function // Call the common constructor function
// //

11
UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.h
View File

@ -1,7 +1,7 @@
/** @file /** @file
SMM STM support SMM STM support
Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR> Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at which accompanies this distribution. The full text of the license may be found at
@ -173,4 +173,13 @@ GetStmResource (
VOID VOID
); );
/**
This function fixes up the address of the global variable or function
referred in SmiEntry assembly files to be the absoute address.
**/
VOID
EFIAPI
SmmCpuFeaturesLibStmSmiEntryFixupAddress (
);
#endif #endif

39
UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiEntry.nasm
View File

@ -1,5 +1,5 @@
;------------------------------------------------------------------------------ ; ;------------------------------------------------------------------------------ ;
; Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.<BR> ; Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials ; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License ; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at ; which accompanies this distribution. The full text of the license may be found at
@ -164,7 +164,8 @@ Base:
mov cr0, rbx mov cr0, rbx
retf retf
@LongMode: ; long mode (64-bit code) starts here @LongMode: ; long mode (64-bit code) starts here
mov rax, ASM_PFX(gStmSmiHandlerIdtr) mov rax, strict qword 0 ; mov rax, ASM_PFX(gStmSmiHandlerIdtr)
StmSmiEntrySmiHandlerIdtrAbsAddr:
lidt [rax] lidt [rax]
lea ebx, [rdi + DSC_OFFSET] lea ebx, [rdi + DSC_OFFSET]
mov ax, [rbx + DSC_DS] mov ax, [rbx + DSC_DS]
@ -175,7 +176,9 @@ Base:
mov gs, eax mov gs, eax
mov ax, [rbx + DSC_SS] mov ax, [rbx + DSC_SS]
mov ss, eax mov ss, eax
mov rax, strict qword 0 ; mov rax, CommonHandler
StmSmiEntryCommonHandlerAbsAddr:
jmp rax
CommonHandler: CommonHandler:
mov rbx, [rsp + 0x08] ; rbx <- CpuIndex mov rbx, [rsp + 0x08] ; rbx <- CpuIndex
@ -188,16 +191,13 @@ CommonHandler:
add rsp, -0x20 add rsp, -0x20
mov rcx, rbx mov rcx, rbx
mov rax, ASM_PFX(CpuSmmDebugEntry) call ASM_PFX(CpuSmmDebugEntry)
call rax
mov rcx, rbx mov rcx, rbx
mov rax, ASM_PFX(SmiRendezvous) ; rax <- absolute addr of SmiRedezvous call ASM_PFX(SmiRendezvous)
call rax
mov rcx, rbx mov rcx, rbx
mov rax, ASM_PFX(CpuSmmDebugExit) call ASM_PFX(CpuSmmDebugExit)
call rax
add rsp, 0x20 add rsp, 0x20
@ -208,7 +208,7 @@ CommonHandler:
add rsp, 0x200 add rsp, 0x200
mov rax, ASM_PFX(gStmXdSupported) lea rax, [ASM_PFX(gStmXdSupported)]
mov al, [rax] mov al, [rax]
cmp al, 0 cmp al, 0
jz .1 jz .1
@ -228,7 +228,7 @@ _StmSmiHandler:
; Check XD disable bit ; Check XD disable bit
; ;
xor r8, r8 xor r8, r8
mov rax, ASM_PFX(gStmXdSupported) lea rax, [ASM_PFX(gStmXdSupported)]
mov al, [rax] mov al, [rax]
cmp al, 0 cmp al, 0
jz @StmXdDone jz @StmXdDone
@ -249,8 +249,8 @@ _StmSmiHandler:
; below step is needed, because STM does not run above code. ; below step is needed, because STM does not run above code.
; we have to run below code to set IDT/CR0/CR4 ; we have to run below code to set IDT/CR0/CR4
mov rax, strict qword 0 ; mov rax, ASM_PFX(gStmSmiHandlerIdtr)
mov rax, ASM_PFX(gStmSmiHandlerIdtr) StmSmiHandlerIdtrAbsAddr:
lidt [rax] lidt [rax]
mov rax, cr0 mov rax, cr0
@ -264,3 +264,16 @@ _StmSmiHandler:
ASM_PFX(gcStmSmiHandlerSize) : DW $ - _StmSmiEntryPoint ASM_PFX(gcStmSmiHandlerSize) : DW $ - _StmSmiEntryPoint
ASM_PFX(gcStmSmiHandlerOffset) : DW _StmSmiHandler - _StmSmiEntryPoint ASM_PFX(gcStmSmiHandlerOffset) : DW _StmSmiHandler - _StmSmiEntryPoint
global ASM_PFX(SmmCpuFeaturesLibStmSmiEntryFixupAddress)
ASM_PFX(SmmCpuFeaturesLibStmSmiEntryFixupAddress):
lea rax, [ASM_PFX(gStmSmiHandlerIdtr)]
lea rcx, [StmSmiEntrySmiHandlerIdtrAbsAddr]
mov qword [rcx - 8], rax
lea rcx, [StmSmiHandlerIdtrAbsAddr]
mov qword [rcx - 8], rax
lea rax, [CommonHandler]
lea rcx, [StmSmiEntryCommonHandlerAbsAddr]
mov qword [rcx - 8], rax
ret

10
UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiException.nasm
View File

@ -1,5 +1,5 @@
;------------------------------------------------------------------------------ ; ;------------------------------------------------------------------------------ ;
; Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.<BR> ; Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials ; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License ; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at ; which accompanies this distribution. The full text of the license may be found at
@ -95,7 +95,7 @@ ASM_PFX(OnStmSetup):
; Check XD disable bit ; Check XD disable bit
; ;
xor r8, r8 xor r8, r8
mov rax, ASM_PFX(gStmXdSupported) lea rax, [ASM_PFX(gStmXdSupported)]
mov al, [rax] mov al, [rax]
cmp al, 0 cmp al, 0
jz @StmXdDone1 jz @StmXdDone1
@ -118,7 +118,7 @@ ASM_PFX(OnStmSetup):
call ASM_PFX(SmmStmSetup) call ASM_PFX(SmmStmSetup)
add rsp, 0x20 add rsp, 0x20
mov rax, ASM_PFX(gStmXdSupported) lea rax, [ASM_PFX(gStmXdSupported)]
mov al, [rax] mov al, [rax]
cmp al, 0 cmp al, 0
jz .11 jz .11
@ -139,7 +139,7 @@ ASM_PFX(OnStmTeardown):
; Check XD disable bit ; Check XD disable bit
; ;
xor r8, r8 xor r8, r8
mov rax, ASM_PFX(gStmXdSupported) lea rax, [ASM_PFX(gStmXdSupported)]
mov al, [rax] mov al, [rax]
cmp al, 0 cmp al, 0
jz @StmXdDone2 jz @StmXdDone2
@ -162,7 +162,7 @@ ASM_PFX(OnStmTeardown):
call ASM_PFX(SmmStmTeardown) call ASM_PFX(SmmStmTeardown)
add rsp, 0x20 add rsp, 0x20
mov rax, ASM_PFX(gStmXdSupported) lea rax, [ASM_PFX(gStmXdSupported)]
mov al, [rax] mov al, [rax]
cmp al, 0 cmp al, 0
jz .12 jz .12