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ArmVirtualizationPkg/PciHostBridgeDxe: IO space is emulated with MMIO 

There is no IO space on ARM, and there are no special instructions that
access it. QEMU emulates the IO space for PCI devices with a special MMIO
range. We're ready to use it at this point, we just have to switch the
Io(Read|Write)(8|16|32) primitives to their MMIO counterparts, because in
"MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c", the IO primitives
correctly ASSERT (FALSE).

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Olivier Martin <Olivier.martin@arm.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16900 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
Laszlo Ersek 2015-02-23 16:03:21 +00:00 committed by lersek
parent 1275aaf430
commit 1cfa1957bb
1 changed files with 6 additions and 6 deletions
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12
ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe/PciRootBridgeIo.c
View File

@ -1008,13 +1008,13 @@ RootBridgeIoIoRW (
if (Write) {
switch (OperationWidth) {
case EfiPciWidthUint8:
IoWrite8 ((UINTN)Address, *Uint8Buffer);
MmioWrite8 ((UINTN)Address, *Uint8Buffer);
break;
case EfiPciWidthUint16:
IoWrite16 ((UINTN)Address, *((UINT16 *)Uint8Buffer));
MmioWrite16 ((UINTN)Address, *((UINT16 *)Uint8Buffer));
break;
case EfiPciWidthUint32:
IoWrite32 ((UINTN)Address, *((UINT32 *)Uint8Buffer));
MmioWrite32 ((UINTN)Address, *((UINT32 *)Uint8Buffer));
break;
default:
//
@ -1027,13 +1027,13 @@ RootBridgeIoIoRW (
} else {
switch (OperationWidth) {
case EfiPciWidthUint8:
*Uint8Buffer = IoRead8 ((UINTN)Address);
*Uint8Buffer = MmioRead8 ((UINTN)Address);
break;
case EfiPciWidthUint16:
*((UINT16 *)Uint8Buffer) = IoRead16 ((UINTN)Address);
*((UINT16 *)Uint8Buffer) = MmioRead16 ((UINTN)Address);
break;
case EfiPciWidthUint32:
*((UINT32 *)Uint8Buffer) = IoRead32 ((UINTN)Address);
*((UINT32 *)Uint8Buffer) = MmioRead32 ((UINTN)Address);
break;
default:
//