mirror of
https://github.com/acidanthera/audk.git
synced 2025-07-26 23:24:03 +02:00
UefiCpuPkg/MtrrUnitTest: Update UnitTestMtrrSetAllMtrrs().
Update UnitTestMtrrSetAllMtrrs() for the case that fixed MtrrLib is not always supported. Signed-off-by: Yuanhao Xie <yuanhao.xie@intel.com> Cc: Eric Dong <eric.dong@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Ray Ni <ray.ni@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
This commit is contained in:
parent
1217f59d23
commit
1d0fd0bb3d
@ -799,13 +799,10 @@ UnitTestMtrrGetAllMtrrs (
|
|||||||
|
|
||||||
/**
|
/**
|
||||||
Unit test of MtrrLib service MtrrSetAllMtrrs()
|
Unit test of MtrrLib service MtrrSetAllMtrrs()
|
||||||
|
|
||||||
@param[in] Context Ignored
|
@param[in] Context Ignored
|
||||||
|
|
||||||
@retval UNIT_TEST_PASSED The Unit test has completed and the test
|
@retval UNIT_TEST_PASSED The Unit test has completed and the test
|
||||||
case was successful.
|
case was successful.
|
||||||
@retval UNIT_TEST_ERROR_TEST_FAILED A test case assertion has failed.
|
@retval UNIT_TEST_ERROR_TEST_FAILED A test case assertion has failed.
|
||||||
|
|
||||||
**/
|
**/
|
||||||
UNIT_TEST_STATUS
|
UNIT_TEST_STATUS
|
||||||
EFIAPI
|
EFIAPI
|
||||||
@ -814,35 +811,43 @@ UnitTestMtrrSetAllMtrrs (
|
|||||||
)
|
)
|
||||||
{
|
{
|
||||||
MTRR_SETTINGS *Result;
|
MTRR_SETTINGS *Result;
|
||||||
MTRR_SETTINGS Mtrrs;
|
MTRR_SETTINGS ExpectedMtrrs;
|
||||||
UINT32 Index;
|
UINT32 Index;
|
||||||
MSR_IA32_MTRR_DEF_TYPE_REGISTER Default;
|
MSR_IA32_MTRR_DEF_TYPE_REGISTER Default;
|
||||||
MTRR_LIB_SYSTEM_PARAMETER SystemParameter;
|
MTRR_LIB_SYSTEM_PARAMETER SystemParameter;
|
||||||
MTRR_LIB_TEST_CONTEXT *LocalContext;
|
MTRR_LIB_TEST_CONTEXT *LocalContext;
|
||||||
|
UINTN MsrIndex;
|
||||||
|
UINTN ByteIndex;
|
||||||
|
UINT64 MsrValue;
|
||||||
|
|
||||||
LocalContext = (MTRR_LIB_TEST_CONTEXT *)Context;
|
LocalContext = (MTRR_LIB_TEST_CONTEXT *)Context;
|
||||||
|
|
||||||
CopyMem (&SystemParameter, LocalContext->SystemParameter, sizeof (SystemParameter));
|
CopyMem (&SystemParameter, LocalContext->SystemParameter, sizeof (SystemParameter));
|
||||||
InitializeMtrrRegs (&SystemParameter);
|
InitializeMtrrRegs (&SystemParameter);
|
||||||
|
|
||||||
Default.Uint64 = 0;
|
Default.Uint64 = 0;
|
||||||
Default.Bits.E = 1;
|
Default.Bits.E = 1;
|
||||||
Default.Bits.FE = 1;
|
Default.Bits.FE = 1;
|
||||||
Default.Bits.Type = GenerateRandomCacheType ();
|
Default.Bits.Type = GenerateRandomCacheType ();
|
||||||
|
ZeroMem (&ExpectedMtrrs, sizeof (ExpectedMtrrs));
|
||||||
ZeroMem (&Mtrrs, sizeof (Mtrrs));
|
ExpectedMtrrs.MtrrDefType = Default.Uint64;
|
||||||
Mtrrs.MtrrDefType = Default.Uint64;
|
|
||||||
for (Index = 0; Index < SystemParameter.VariableMtrrCount; Index++) {
|
for (Index = 0; Index < SystemParameter.VariableMtrrCount; Index++) {
|
||||||
GenerateRandomMtrrPair (SystemParameter.PhysicalAddressBits, GenerateRandomCacheType (), &Mtrrs.Variables.Mtrr[Index], NULL);
|
GenerateRandomMtrrPair (SystemParameter.PhysicalAddressBits, GenerateRandomCacheType (), &ExpectedMtrrs.Variables.Mtrr[Index], NULL);
|
||||||
}
|
}
|
||||||
|
|
||||||
Result = MtrrSetAllMtrrs (&Mtrrs);
|
for (MsrIndex = 0; MsrIndex < ARRAY_SIZE (mFixedMtrrsIndex); MsrIndex++) {
|
||||||
UT_ASSERT_EQUAL ((UINTN)Result, (UINTN)&Mtrrs);
|
MsrValue = 0;
|
||||||
|
for (ByteIndex = 0; ByteIndex < sizeof (UINT64); ByteIndex++) {
|
||||||
|
MsrValue = MsrValue | LShiftU64 (GenerateRandomCacheType (), ByteIndex * 8);
|
||||||
|
}
|
||||||
|
|
||||||
UT_ASSERT_EQUAL (AsmReadMsr64 (MSR_IA32_MTRR_DEF_TYPE), Mtrrs.MtrrDefType);
|
ExpectedMtrrs.Fixed.Mtrr[MsrIndex] = MsrValue;
|
||||||
|
}
|
||||||
|
|
||||||
|
Result = MtrrSetAllMtrrs (&ExpectedMtrrs);
|
||||||
|
UT_ASSERT_EQUAL ((UINTN)Result, (UINTN)&ExpectedMtrrs);
|
||||||
|
UT_ASSERT_EQUAL (AsmReadMsr64 (MSR_IA32_MTRR_DEF_TYPE), ExpectedMtrrs.MtrrDefType);
|
||||||
for (Index = 0; Index < SystemParameter.VariableMtrrCount; Index++) {
|
for (Index = 0; Index < SystemParameter.VariableMtrrCount; Index++) {
|
||||||
UT_ASSERT_EQUAL (AsmReadMsr64 (MSR_IA32_MTRR_PHYSBASE0 + (Index << 1)), Mtrrs.Variables.Mtrr[Index].Base);
|
UT_ASSERT_EQUAL (AsmReadMsr64 (MSR_IA32_MTRR_PHYSBASE0 + (Index << 1)), ExpectedMtrrs.Variables.Mtrr[Index].Base);
|
||||||
UT_ASSERT_EQUAL (AsmReadMsr64 (MSR_IA32_MTRR_PHYSMASK0 + (Index << 1)), Mtrrs.Variables.Mtrr[Index].Mask);
|
UT_ASSERT_EQUAL (AsmReadMsr64 (MSR_IA32_MTRR_PHYSMASK0 + (Index << 1)), ExpectedMtrrs.Variables.Mtrr[Index].Mask);
|
||||||
}
|
}
|
||||||
|
|
||||||
return UNIT_TEST_PASSED;
|
return UNIT_TEST_PASSED;
|
||||||
|
Loading…
x
Reference in New Issue
Block a user