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UefiCpuPkg/PiSmmCpuDxeSmm: Allocate buffer for global semaphores

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Get semaphores alignment/size requirement and allocate aligned
buffer for all global spin lock and semaphores.

Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
This commit is contained in:
Jeff Fan 2016-03-22 09:55:28 +08:00 committed by Michael Kinney
parent 328f84b156
commit 1d64853193
2 changed files with 65 additions and 0 deletions
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46
UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
View File

@ -21,6 +21,8 @@ UINT64 gSmiMtrrs[MTRR_NUMBER_OF_FIXED_MTRR
UINT64 gPhyMask; UINT64 gPhyMask;
SMM_DISPATCHER_MP_SYNC_DATA *mSmmMpSyncData = NULL; SMM_DISPATCHER_MP_SYNC_DATA *mSmmMpSyncData = NULL;
UINTN mSmmMpSyncDataSize; UINTN mSmmMpSyncDataSize;
SMM_CPU_SEMAPHORES mSmmCpuSemaphores;
UINTN mSemaphoreSize;
/** /**
Performs an atomic compare exchange operation to get semaphore. Performs an atomic compare exchange operation to get semaphore.
@ -1193,6 +1195,48 @@ Exit:
AsmWriteCr2 (Cr2); AsmWriteCr2 (Cr2);
} }
/**
Allocate buffer for all semaphores and spin locks.
**/
VOID
InitializeSmmCpuSemaphores (
VOID
)
{
UINTN ProcessorCount;
UINTN TotalSize;
UINTN GlobalSemaphoresSize;
UINTN SemaphoreSize;
UINTN Pages;
UINTN *SemaphoreBlock;
UINTN SemaphoreAddr;
SemaphoreSize = GetSpinLockProperties ();
ProcessorCount = gSmmCpuPrivate->SmmCoreEntryContext.NumberOfCpus;
GlobalSemaphoresSize = (sizeof (SMM_CPU_SEMAPHORE_GLOBAL) / sizeof (VOID *)) * SemaphoreSize;
TotalSize = GlobalSemaphoresSize;
DEBUG((EFI_D_INFO, "One Semaphore Size = 0x%x\n", SemaphoreSize));
DEBUG((EFI_D_INFO, "Total Semaphores Size = 0x%x\n", TotalSize));
Pages = EFI_SIZE_TO_PAGES (TotalSize);
SemaphoreBlock = AllocatePages (Pages);
ASSERT (SemaphoreBlock != NULL);
ZeroMem (SemaphoreBlock, TotalSize);
SemaphoreAddr = (UINTN)SemaphoreBlock;
mSmmCpuSemaphores.SemaphoreGlobal.Counter = (UINT32 *)SemaphoreAddr;
SemaphoreAddr += SemaphoreSize;
mSmmCpuSemaphores.SemaphoreGlobal.InsideSmm = (BOOLEAN *)SemaphoreAddr;
SemaphoreAddr += SemaphoreSize;
mSmmCpuSemaphores.SemaphoreGlobal.AllCpusInSync = (BOOLEAN *)SemaphoreAddr;
SemaphoreAddr += SemaphoreSize;
mSmmCpuSemaphores.SemaphoreGlobal.PFLock = (SPIN_LOCK *)SemaphoreAddr;
SemaphoreAddr += SemaphoreSize;
mSmmCpuSemaphores.SemaphoreGlobal.CodeAccessCheckLock
= (SPIN_LOCK *)SemaphoreAddr;
mSemaphoreSize = SemaphoreSize;
}
/** /**
Initialize un-cacheable data. Initialize un-cacheable data.
@ -1215,6 +1259,8 @@ InitializeMpSyncData (
mSmmMpSyncData->BspIndex = (UINT32)-1; mSmmMpSyncData->BspIndex = (UINT32)-1;
} }
mSmmMpSyncData->EffectiveSyncMode = (SMM_CPU_SYNC_MODE) PcdGet8 (PcdCpuSmmSyncMode); mSmmMpSyncData->EffectiveSyncMode = (SMM_CPU_SYNC_MODE) PcdGet8 (PcdCpuSmmSyncMode);
InitializeSmmCpuSemaphores ();
} }
} }

19
UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
View File

@ -354,6 +354,25 @@ typedef struct {
UINT64 MtrrBaseMaskPtr; // Offset 0x58 UINT64 MtrrBaseMaskPtr; // Offset 0x58
} PROCESSOR_SMM_DESCRIPTOR; } PROCESSOR_SMM_DESCRIPTOR;
///
/// All global semaphores' pointer
///
typedef struct {
volatile UINT32 *Counter;
volatile BOOLEAN *InsideSmm;
volatile BOOLEAN *AllCpusInSync;
SPIN_LOCK *PFLock;
SPIN_LOCK *CodeAccessCheckLock;
} SMM_CPU_SEMAPHORE_GLOBAL;
///
/// All semaphores' information
///
typedef struct {
SMM_CPU_SEMAPHORE_GLOBAL SemaphoreGlobal;
} SMM_CPU_SEMAPHORES;
extern IA32_DESCRIPTOR gcSmiGdtr; extern IA32_DESCRIPTOR gcSmiGdtr;
extern IA32_DESCRIPTOR gcSmiIdtr; extern IA32_DESCRIPTOR gcSmiIdtr;
extern VOID *gcSmiIdtrPtr; extern VOID *gcSmiIdtrPtr;