mirror of https://github.com/acidanthera/audk.git
IntelFsp2Pkg/GenCfgOpt.py: Support UPD offset auto assignment
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1211 For reducing maintenance effort, the UPD offset can be automatic assigned by GenCfgOpt.py following by alignment requirements. The usage model as below: . If UPD offset in DSC file are all '*', GenCfgOpt.py will assign offset for all UPD automatically. In this case no need to manually hardcode offset to all UPD in DSC. . If UPD offset in DSC file are all not '*', GenCfgOpt.py will use hardcoded offset directly (original usage model) . Tool does not support mixing scenario so UPD offset in DSC should be all '*' or all hardcoded but not mixed. In auto mode UPD offset will be assigned following natural alignment (size aligned) rule and the whole structure size will align to either 32bits or 64bits depends on maximal UPD size in the structure. Test: Verified by both UPD offset hardcoded or '*' in DSC and generated UPD header files are correct. Cc: Jiewen Yao <Jiewen.yao@intel.com> Cc: Gao Liming <liming.gao@intel.com> Cc: Zhu Yonghong <yonghong.zhu@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Chasel Chiu <chasel.chiu@intel.com> Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
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@ -418,6 +418,8 @@ EndList
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return ""
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return ""
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def ParseDscFile (self, DscFile, FvDir):
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def ParseDscFile (self, DscFile, FvDir):
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Hardcode = False
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AutoAlign = False
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self._CfgItemList = []
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self._CfgItemList = []
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self._CfgPageDict = {}
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self._CfgPageDict = {}
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self._CfgBlkDict = {}
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self._CfgBlkDict = {}
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@ -438,6 +440,8 @@ EndList
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DscLines = DscFd.readlines()
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DscLines = DscFd.readlines()
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DscFd.close()
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DscFd.close()
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MaxAlign = 32 #Default align to 32, but if there are 64 bit unit, align to 64
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SizeAlign = 0 #record the struct max align
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while len(DscLines):
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while len(DscLines):
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DscLine = DscLines.pop(0).strip()
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DscLine = DscLines.pop(0).strip()
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Handle = False
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Handle = False
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@ -464,6 +468,7 @@ EndList
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ConfigDict['comment'] = ''
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ConfigDict['comment'] = ''
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ConfigDict['subreg'] = []
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ConfigDict['subreg'] = []
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IsUpdSect = True
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IsUpdSect = True
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Offset = 0
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else:
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else:
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if IsDefSect or IsPcdSect or IsUpdSect or IsVpdSect:
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if IsDefSect or IsPcdSect or IsUpdSect or IsVpdSect:
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if re.match("^!else($|\s+#.+)", DscLine):
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if re.match("^!else($|\s+#.+)", DscLine):
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@ -530,6 +535,7 @@ EndList
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NewDscLines = IncludeDsc.readlines()
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NewDscLines = IncludeDsc.readlines()
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IncludeDsc.close()
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IncludeDsc.close()
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DscLines = NewDscLines + DscLines
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DscLines = NewDscLines + DscLines
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Offset = 0
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else:
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else:
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if DscLine.startswith('!'):
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if DscLine.startswith('!'):
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print("ERROR: Unrecoginized directive for line '%s'" % DscLine)
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print("ERROR: Unrecoginized directive for line '%s'" % DscLine)
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@ -620,13 +626,22 @@ EndList
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# Check VPD/UPD
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# Check VPD/UPD
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if IsUpdSect:
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if IsUpdSect:
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Match = re.match("^([_a-zA-Z0-9]+).([_a-zA-Z0-9]+)\s*\|\s*(0x[0-9A-F]+)\s*\|\s*(\d+|0x[0-9a-fA-F]+)\s*\|\s*(.+)",DscLine)
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Match = re.match("^([_a-zA-Z0-9]+).([_a-zA-Z0-9]+)\s*\|\s*(0x[0-9A-F]+|\*)\s*\|\s*(\d+|0x[0-9a-fA-F]+)\s*\|\s*(.+)",DscLine)
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else:
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else:
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Match = re.match("^([_a-zA-Z0-9]+).([_a-zA-Z0-9]+)\s*\|\s*(0x[0-9A-F]+)(?:\s*\|\s*(.+))?", DscLine)
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Match = re.match("^([_a-zA-Z0-9]+).([_a-zA-Z0-9]+)\s*\|\s*(0x[0-9A-F]+)(?:\s*\|\s*(.+))?", DscLine)
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if Match:
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if Match:
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ConfigDict['space'] = Match.group(1)
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ConfigDict['space'] = Match.group(1)
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ConfigDict['cname'] = Match.group(2)
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ConfigDict['cname'] = Match.group(2)
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ConfigDict['offset'] = int (Match.group(3), 16)
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if Match.group(3) != '*':
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Hardcode = True
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Offset = int (Match.group(3), 16)
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else:
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AutoAlign = True
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if Hardcode and AutoAlign:
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print("Hardcode and auto-align mixed mode is not supported by GenCfgOpt")
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raise SystemExit
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ConfigDict['offset'] = Offset
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if ConfigDict['order'] == -1:
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if ConfigDict['order'] == -1:
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ConfigDict['order'] = ConfigDict['offset'] << 8
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ConfigDict['order'] = ConfigDict['offset'] << 8
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else:
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else:
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@ -638,6 +653,7 @@ EndList
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Length = int (Match.group(4), 16)
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Length = int (Match.group(4), 16)
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else :
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else :
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Length = int (Match.group(4))
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Length = int (Match.group(4))
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Offset += Length
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else:
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else:
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Value = Match.group(4)
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Value = Match.group(4)
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if Value is None:
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if Value is None:
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@ -665,6 +681,52 @@ EndList
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ConfigDict['help'] = ''
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ConfigDict['help'] = ''
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ConfigDict['type'] = ''
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ConfigDict['type'] = ''
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ConfigDict['option'] = ''
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ConfigDict['option'] = ''
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if IsUpdSect and AutoAlign:
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ItemLength = int(ConfigDict['length'])
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ItemOffset = int(ConfigDict['offset'])
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ItemStruct = ConfigDict['struct']
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Unit = 1
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if ItemLength in [1, 2, 4, 8] and not ConfigDict['value'].startswith('{'):
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Unit = ItemLength
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# If there are 64 bit unit, align to 64
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if Unit == 8:
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MaxAlign = 64
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SizeAlign = 8
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if ItemStruct != '':
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UnitDict = {'UINT8':1, 'UINT16':2, 'UINT32':4, 'UINT64':8}
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if ItemStruct in ['UINT8', 'UINT16', 'UINT32', 'UINT64']:
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Unit = UnitDict[ItemStruct]
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# If there are 64 bit unit, align to 64
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if Unit == 8:
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MaxAlign = 64
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SizeAlign = max(SizeAlign, Unit)
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if (ConfigDict['embed'].find(':START') != -1):
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Base = ItemOffset
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SubOffset = ItemOffset - Base
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SubRemainder = SubOffset % Unit
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if SubRemainder:
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Diff = Unit - SubRemainder
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Offset = Offset + Diff
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ItemOffset = ItemOffset + Diff
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if (ConfigDict['embed'].find(':END') != -1):
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Remainder = Offset % (MaxAlign/8) # MaxAlign is either 32 or 64
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if Remainder:
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Diff = (MaxAlign/8) - Remainder
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Offset = Offset + Diff
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ItemOffset = ItemOffset + Diff
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MaxAlign = 32 # Reset to default 32 align when struct end
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if (ConfigDict['cname'] == 'UpdTerminator'):
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# ItemLength is the size of UpdTerminator
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# Itemlength might be 16, 32, or 64
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# Struct align to 64 if UpdTerminator
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# or struct size is 64 bit, else align to 32
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Remainder = Offset % max(ItemLength/8, 4, SizeAlign)
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Offset = Offset + ItemLength
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if Remainder:
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Diff = max(ItemLength/8, 4, SizeAlign) - Remainder
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ItemOffset = ItemOffset + Diff
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ConfigDict['offset'] = ItemOffset
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self._CfgItemList.append(ConfigDict.copy())
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self._CfgItemList.append(ConfigDict.copy())
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ConfigDict['name'] = ''
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ConfigDict['name'] = ''
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