mirror of https://github.com/acidanthera/audk.git
ArmPlatformPkg/ArmVExpressPkg: Add support for ARM Versatile Express A9x4 Model
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12429 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
oliviermartin
parent
4463f70698
commit
1ddb209e0e
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#
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# Copyright (c) 2011, ARM Limited. All rights reserved.
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#
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# http://opensource.org/licenses/bsd-license.php
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#
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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#
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################################################################################
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#
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# Defines Section - statements that will be processed to create a Makefile.
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#
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################################################################################
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[Defines]
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PLATFORM_NAME = ArmVExpressPkg-RTSM-A9x4
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PLATFORM_GUID = e46039e0-5bb3-11e0-a9d6-0002a5d5c51b
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PLATFORM_VERSION = 0.1
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DSC_SPECIFICATION = 0x00010005
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OUTPUT_DIRECTORY = Build/ArmVExpress-RTSM-A9x4
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SUPPORTED_ARCHITECTURES = ARM
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BUILD_TARGETS = DEBUG|RELEASE
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SKUID_IDENTIFIER = DEFAULT
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FLASH_DEFINITION = ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-A9x4.fdf
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!include ArmPlatformPkg/ArmVExpressPkg/ArmVExpress.dsc.inc
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[LibraryClasses.common]
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ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7MPCoreLib.inf
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ArmPlatformLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf
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ArmPlatformSysConfigLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSysConfigLib/ArmVExpressSysConfigLib.inf
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NorFlashPlatformLib|ArmPlatformPkg/ArmVExpressPkg/Library/NorFlashArmVExpressLib/NorFlashArmVExpressLib.inf
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LcdPlatformLib|ArmPlatformPkg/ArmVExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpressLib.inf
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#DebugAgentTimerLib|ArmPlatformPkg/ArmVExpressPkg/Library/DebugAgentTimerLib/DebugAgentTimerLib.inf
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[LibraryClasses.common.SEC]
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ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7MPCoreLibSec.inf
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ArmPlatformLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressSecLib.inf
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# Uncomment to turn on GDB stub in SEC.
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#DebugAgentLib|EmbeddedPkg/Library/GdbDebugAgent/GdbDebugAgent.inf
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# ARM PL390 General Interrupt Driver in Secure and Non-secure
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ArmGicSecLib|ArmPkg/Drivers/PL390Gic/PL390GicSecLib.inf
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ArmGicLib|ArmPkg/Drivers/PL390Gic/PL390GicLib.inf
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[BuildOptions]
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RVCT:*_*_ARM_PLATFORM_FLAGS == --cpu Cortex-A9 -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/RTSM
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GCC:*_*_ARM_PLATFORM_FLAGS == -mcpu=cortex-a9 -mfpu=neon -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/RTSM
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XCODE:*_*_ARM_PLATFORM_FLAGS == -mcpu=cortex-a9 -mfpu=neon -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include -I$(WORKSPACE)/ArmPlatformPkg/ArmVExpressPkg/Include/Platform/RTSM
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################################################################################
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#
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# Pcd Section - list of all EDK II PCD Entries defined by this Platform
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#
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################################################################################
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[PcdsFeatureFlag.common]
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!if $(EDK2_SKIP_PEICORE) == 1
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gArmPlatformTokenSpaceGuid.PcdSystemMemoryInitializeInSec|TRUE
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gArmPlatformTokenSpaceGuid.PcdSendSgiToBringUpSecondaryCores|TRUE
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!endif
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## If TRUE, Graphics Output Protocol will be installed on virtual handle created by ConsplitterDxe.
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# It could be set FALSE to save size.
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gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE
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[PcdsFixedAtBuild.common]
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gArmPlatformTokenSpaceGuid.PcdFirmwareVendor|"ARM Versatile Express"
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gEmbeddedTokenSpaceGuid.PcdEmbeddedPrompt|"ArmVExpress-RTSM"
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#
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# NV Storage PCDs. Use base of 0x0C000000 for NOR1
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#
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gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|0x0FFC0000
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gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize|0x00010000
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gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|0x0FFD0000
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gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize|0x00010000
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gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0x0FFE0000
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gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize|0x00010000
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gArmPlatformTokenSpaceGuid.PcdMPCoreSupport|1
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gArmTokenSpaceGuid.PcdVFPEnabled|1
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# Stacks for MPCores in Secure World
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gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase|0x2E009000
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gArmPlatformTokenSpaceGuid.PcdCPUCoreSecPrimaryStackSize|0x1000
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# Stacks for MPCores in Monitor Mode
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gArmPlatformTokenSpaceGuid.PcdCPUCoresSecMonStackBase|0x2E008000
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gArmPlatformTokenSpaceGuid.PcdCPUCoreSecMonStackSize|0x100
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# Stacks for MPCores in Normal World
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gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0x2E000000
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gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x4000
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# System Memory (1GB)
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gArmTokenSpaceGuid.PcdSystemMemoryBase|0x80000000
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gArmTokenSpaceGuid.PcdSystemMemorySize|0x40000000
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# Size of the region used by UEFI in permanent memory (Reserved 64MB)
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gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize|0x04000000
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#
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# ARM Pcds
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#
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gArmTokenSpaceGuid.PcdArmUncachedMemoryMask|0x0000000040000000
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#
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# ARM PrimeCell
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#
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## SP804 Timer
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gEmbeddedTokenSpaceGuid.PcdEmbeddedPerformanceCounterFrequencyInHz|1000000
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gEmbeddedTokenSpaceGuid.PcdTimerPeriod|100000 # expressed in 100ns units, 100,000 x 100 ns = 10,000,000 ns = 10 ms
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gArmPlatformTokenSpaceGuid.PcdSP804TimerPeriodicInterruptNum|34
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gArmPlatformTokenSpaceGuid.PcdSP804TimerPeriodicBase|0x1c110000
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gArmPlatformTokenSpaceGuid.PcdSP804TimerPerformanceBase|0x1c110020
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gArmPlatformTokenSpaceGuid.PcdSP804TimerDebugAgentTimerBase|0x1c120000
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gArmPlatformTokenSpaceGuid.PcdSP804TimerMetronomeBase|0x1c120020
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## SP805 Watchdog - Motherboard Watchdog
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gArmPlatformTokenSpaceGuid.PcdSP805WatchdogBase|0x1C0F0000
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## PL011 - Serial Terminal
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gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x1c090000
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gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate|38400
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gEfiMdePkgTokenSpaceGuid.PcdUartDefaultDataBits|8
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gEfiMdePkgTokenSpaceGuid.PcdUartDefaultParity|1
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gEfiMdePkgTokenSpaceGuid.PcdUartDefaultStopBits|1
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gArmPlatformTokenSpaceGuid.PcdUartDefaultReceiveFifoDepth|32
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gArmPlatformTokenSpaceGuid.PcdUartDefaultTimeout|1000000
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## PL031 RealTimeClock
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gArmPlatformTokenSpaceGuid.PcdPL031RtcBase|0x1C170000
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## PL111 Versatile Express Motherboard controller
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gArmPlatformTokenSpaceGuid.PcdPL111LcdBase|0x1C1F0000
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#
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# ARM PL390 General Interrupt Controller
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#
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gArmTokenSpaceGuid.PcdGicDistributorBase|0x2C001000
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gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0x2C000100
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#
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# ARM OS Loader
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#
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# Versatile Express machine type (ARM VERSATILE EXPRESS = 2272) required for ARM Linux:
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gArmTokenSpaceGuid.PcdArmMachineType|2272
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gArmPlatformTokenSpaceGuid.PcdDefaultBootDescription|L"NorFlash"
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gArmPlatformTokenSpaceGuid.PcdDefaultBootDevicePath|L"VenHw(1F15DA3C-37FF-4070-B471-BB4AF12A724A)/MemoryMapped(0x0,0x46000000,0x46400000)"
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gArmPlatformTokenSpaceGuid.PcdDefaultBootArgument|""
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gArmPlatformTokenSpaceGuid.PcdDefaultBootType|1
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# Use the serial console (ConIn & ConOut) and the Graphic driver (ConOut)
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gArmPlatformTokenSpaceGuid.PcdDefaultConOutPaths|L"VenHw(D3987D4B-971A-435F-8CAF-4967EB627241)/Uart(38400,8,N,1)/VenPcAnsi();VenHw(407B4008-BF5B-11DF-9547-CF16E0D72085)"
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gArmPlatformTokenSpaceGuid.PcdDefaultConInPaths|L"VenHw(D3987D4B-971A-435F-8CAF-4967EB627241)/Uart(38400,8,N,1)/VenPcAnsi()"
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#
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# ARM L2x0 PCDs
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#
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gArmTokenSpaceGuid.PcdL2x0ControllerBase|0x1E00A000
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################################################################################
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#
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# Components Section - list of all EDK II Modules needed by this Platform
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#
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################################################################################
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[Components.common]
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#
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# SEC
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#
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ArmPlatformPkg/Sec/Sec.inf
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#
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# PEI Phase modules
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#
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!if $(EDK2_SKIP_PEICORE) == 1
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ArmPlatformPkg/PrePi/PeiMPCore.inf {
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<LibraryClasses>
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ArmGicSecLib|ArmPkg/Drivers/PL390Gic/PL390GicLib.inf
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ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7MPCoreLib.inf
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ArmPlatformLib|ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/ArmVExpressLib.inf
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ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/PrePi/PrePiArmPlatformGlobalVariableLib.inf
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}
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!else
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ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf {
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<LibraryClasses>
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ArmGicSecLib|ArmPkg/Drivers/PL390Gic/PL390GicLib.inf
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ArmPlatformGlobalVariableLib|ArmPlatformPkg/Library/ArmPlatformGlobalVariableLib/Pei/PeiArmPlatformGlobalVariableLib.inf
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}
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MdeModulePkg/Core/Pei/PeiMain.inf
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MdeModulePkg/Universal/PCD/Pei/Pcd.inf {
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<LibraryClasses>
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PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
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}
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ArmPlatformPkg/PlatformPei/PlatformPeim.inf
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ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf
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ArmPkg/Drivers/CpuPei/CpuPei.inf
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IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf
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Nt32Pkg/BootModePei/BootModePei.inf
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MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
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MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf {
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<LibraryClasses>
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NULL|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
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}
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!endif
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#
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# DXE
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#
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MdeModulePkg/Core/Dxe/DxeMain.inf {
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<LibraryClasses>
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PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
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NULL|MdeModulePkg/Library/DxeCrc32GuidedSectionExtractLib/DxeCrc32GuidedSectionExtractLib.inf
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}
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#
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# Architectural Protocols
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#
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ArmPkg/Drivers/CpuDxe/CpuDxe.inf
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MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
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MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
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MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
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MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
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MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
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MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
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EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
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EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
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EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
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MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
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MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
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MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
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MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
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EmbeddedPkg/SerialDxe/SerialDxe.inf
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MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
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ArmPkg/Drivers/PL390Gic/PL390GicDxe.inf
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ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
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ArmPlatformPkg/Drivers/SP804TimerDxe/SP804TimerDxe.inf
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ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf
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ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
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#
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# Semi-hosting filesystem
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#
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ArmPkg/Filesystem/SemihostFs/SemihostFs.inf
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#
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# Multimedia Card Interface
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#
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EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf
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ArmPlatformPkg/Drivers/PL180MciDxe/PL180MciDxe.inf
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#
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# FAT filesystem + GPT/MBR partitioning
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#
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MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
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MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
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FatPkg/EnhancedFatDxe/Fat.inf
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MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
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#
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# Application
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#
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EmbeddedPkg/Ebl/Ebl.inf
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ArmPkg/Application/VariableServicesTest/VariableServicesTest.inf
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!if $(EDK2_ARMVE_UEFI2_SHELL) == 1
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ShellPkg/Application/Shell/Shell.inf {
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<LibraryClasses>
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ShellCommandLib|ShellPkg/Library/UefiShellCommandLib/UefiShellCommandLib.inf
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NULL|ShellPkg/Library/UefiShellLevel2CommandsLib/UefiShellLevel2CommandsLib.inf
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NULL|ShellPkg/Library/UefiShellLevel1CommandsLib/UefiShellLevel1CommandsLib.inf
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NULL|ShellPkg/Library/UefiShellLevel3CommandsLib/UefiShellLevel3CommandsLib.inf
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NULL|ShellPkg/Library/UefiShellDriver1CommandsLib/UefiShellDriver1CommandsLib.inf
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NULL|ShellPkg/Library/UefiShellInstall1CommandsLib/UefiShellInstall1CommandsLib.inf
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NULL|ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLib.inf
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NULL|ShellPkg/Library/UefiShellNetwork1CommandsLib/UefiShellNetwork1CommandsLib.inf
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HandleParsingLib|ShellPkg/Library/UefiHandleParsingLib/UefiHandleParsingLib.inf
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FileHandleLib|ShellPkg/Library/UefiFileHandleLib/UefiFileHandleLib.inf
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ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf
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SortLib|ShellPkg/Library/UefiSortLib/UefiSortLib.inf
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<PcdsFixedAtBuild>
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gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0xFF
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gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE
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gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|16000
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}
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!endif
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#
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# Bds
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#
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MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
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ArmPlatformPkg/Bds/Bds.inf
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@ -0,0 +1,318 @@
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#
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# Copyright (c) 2011, ARM Limited. All rights reserved.
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#
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
|
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# http://opensource.org/licenses/bsd-license.php
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#
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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################################################################################
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#
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# FD Section
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# The [FD] Section is made up of the definition statements and a
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# description of what goes into the Flash Device Image. Each FD section
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# defines one flash "device" image. A flash device image may be one of
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# the following: Removable media bootable image (like a boot floppy
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# image,) an Option ROM image (that would be "flashed" into an add-in
|
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# card,) a System "Flash" image (that would be burned into a system's
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# flash) or an Update ("Capsule") image that will be used to update and
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# existing system flash.
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#
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################################################################################
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[FD.RTSM_VE_Cortex-A9_EFI]
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BaseAddress = 0x08000000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in NOR Flash.
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Size = 0x00280000|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the FLASH Device
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ErasePolarity = 1
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# This one is tricky, it must be: BlockSize * NumBlocks = Size
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BlockSize = 0x00001000
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NumBlocks = 0x280
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################################################################################
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#
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# Following are lists of FD Region layout which correspond to the locations of different
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# images within the flash device.
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#
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# Regions must be defined in ascending order and may not overlap.
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#
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# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
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# the pipe "|" character, followed by the size of the region, also in hex with the leading
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# "0x" characters. Like:
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# Offset|Size
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# PcdOffsetCName|PcdSizeCName
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# RegionType <FV, DATA, or FILE>
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#
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################################################################################
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0x00000000|0x00080000
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gArmTokenSpaceGuid.PcdSecureFvBaseAddress|gArmTokenSpaceGuid.PcdSecureFvBaseSize
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FV = FVMAIN_SEC
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0x00080000|0x00280000
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gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvBaseSize
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FV = FVMAIN_COMPACT
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################################################################################
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#
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# FV Section
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#
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# [FV] section is used to define what components or modules are placed within a flash
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# device file. This section also defines order the components and modules are positioned
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# within the image. The [FV] section consists of define statements, set statements and
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# module statements.
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#
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################################################################################
|
||||
|
||||
[FV.FVMAIN_SEC]
|
||||
FvAlignment = 8
|
||||
ERASE_POLARITY = 1
|
||||
MEMORY_MAPPED = TRUE
|
||||
STICKY_WRITE = TRUE
|
||||
LOCK_CAP = TRUE
|
||||
LOCK_STATUS = TRUE
|
||||
WRITE_DISABLED_CAP = TRUE
|
||||
WRITE_ENABLED_CAP = TRUE
|
||||
WRITE_STATUS = TRUE
|
||||
WRITE_LOCK_CAP = TRUE
|
||||
WRITE_LOCK_STATUS = TRUE
|
||||
READ_DISABLED_CAP = TRUE
|
||||
READ_ENABLED_CAP = TRUE
|
||||
READ_STATUS = TRUE
|
||||
READ_LOCK_CAP = TRUE
|
||||
READ_LOCK_STATUS = TRUE
|
||||
|
||||
INF ArmPlatformPkg/Sec/Sec.inf
|
||||
|
||||
|
||||
[FV.FvMain]
|
||||
BlockSize = 0x40
|
||||
NumBlocks = 0 # This FV gets compressed so make it just big enough
|
||||
FvAlignment = 8 # FV alignment and FV attributes setting.
|
||||
ERASE_POLARITY = 1
|
||||
MEMORY_MAPPED = TRUE
|
||||
STICKY_WRITE = TRUE
|
||||
LOCK_CAP = TRUE
|
||||
LOCK_STATUS = TRUE
|
||||
WRITE_DISABLED_CAP = TRUE
|
||||
WRITE_ENABLED_CAP = TRUE
|
||||
WRITE_STATUS = TRUE
|
||||
WRITE_LOCK_CAP = TRUE
|
||||
WRITE_LOCK_STATUS = TRUE
|
||||
READ_DISABLED_CAP = TRUE
|
||||
READ_ENABLED_CAP = TRUE
|
||||
READ_STATUS = TRUE
|
||||
READ_LOCK_CAP = TRUE
|
||||
READ_LOCK_STATUS = TRUE
|
||||
|
||||
INF MdeModulePkg/Core/Dxe/DxeMain.inf
|
||||
|
||||
#
|
||||
# PI DXE Drivers producing Architectural Protocols (EFI Services)
|
||||
#
|
||||
INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
|
||||
INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
|
||||
INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
|
||||
INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
|
||||
INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
|
||||
INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
|
||||
INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
|
||||
INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
|
||||
INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
|
||||
INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
|
||||
|
||||
INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
|
||||
|
||||
#
|
||||
# Multiple Console IO support
|
||||
#
|
||||
INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
|
||||
INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
|
||||
INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
|
||||
INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
|
||||
INF EmbeddedPkg/SerialDxe/SerialDxe.inf
|
||||
|
||||
INF ArmPkg/Drivers/PL390Gic/PL390GicDxe.inf
|
||||
INF ArmPlatformPkg/Drivers/SP804TimerDxe/SP804TimerDxe.inf
|
||||
INF ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
|
||||
INF ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf
|
||||
INF ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
|
||||
|
||||
#
|
||||
# Semi-hosting filesystem
|
||||
#
|
||||
INF ArmPkg/Filesystem/SemihostFs/SemihostFs.inf
|
||||
|
||||
#
|
||||
# FAT filesystem + GPT/MBR partitioning
|
||||
#
|
||||
INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
|
||||
INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
|
||||
INF FatPkg/EnhancedFatDxe/Fat.inf
|
||||
INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
|
||||
|
||||
#
|
||||
# Multimedia Card Interface
|
||||
#
|
||||
INF EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf
|
||||
INF ArmPlatformPkg/Drivers/PL180MciDxe/PL180MciDxe.inf
|
||||
|
||||
#
|
||||
# UEFI application (Shell Embedded Boot Loader)
|
||||
#
|
||||
INF EmbeddedPkg/Ebl/Ebl.inf
|
||||
|
||||
#
|
||||
# UEFI application (Full EFI Shell)
|
||||
#
|
||||
FILE APPLICATION = PCD(gArmTokenSpaceGuid.PcdShellFile) {
|
||||
SECTION PE32 = EdkShellBinPkg/FullShell/Arm/ShellFull.efi
|
||||
SECTION UI = "ShellFull"
|
||||
}
|
||||
|
||||
!if $(EDK2_ARMVE_UEFI2_SHELL) == 1
|
||||
INF ShellPkg/Application/Shell/Shell.inf
|
||||
!endif
|
||||
#
|
||||
# UEFI application (Test Variable Services)
|
||||
#
|
||||
INF ArmPkg/Application/VariableServicesTest/VariableServicesTest.inf
|
||||
|
||||
#
|
||||
# Bds
|
||||
#
|
||||
INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
|
||||
INF ArmPlatformPkg/Bds/Bds.inf
|
||||
|
||||
|
||||
[FV.FVMAIN_COMPACT]
|
||||
FvAlignment = 8
|
||||
ERASE_POLARITY = 1
|
||||
MEMORY_MAPPED = TRUE
|
||||
STICKY_WRITE = TRUE
|
||||
LOCK_CAP = TRUE
|
||||
LOCK_STATUS = TRUE
|
||||
WRITE_DISABLED_CAP = TRUE
|
||||
WRITE_ENABLED_CAP = TRUE
|
||||
WRITE_STATUS = TRUE
|
||||
WRITE_LOCK_CAP = TRUE
|
||||
WRITE_LOCK_STATUS = TRUE
|
||||
READ_DISABLED_CAP = TRUE
|
||||
READ_ENABLED_CAP = TRUE
|
||||
READ_STATUS = TRUE
|
||||
READ_LOCK_CAP = TRUE
|
||||
READ_LOCK_STATUS = TRUE
|
||||
|
||||
!if $(EDK2_SKIP_PEICORE) == 1
|
||||
INF ArmPlatformPkg/PrePi/PeiMPCore.inf
|
||||
!else
|
||||
INF ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf
|
||||
INF MdeModulePkg/Core/Pei/PeiMain.inf
|
||||
INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf
|
||||
INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf
|
||||
INF ArmPkg/Drivers/CpuPei/CpuPei.inf
|
||||
INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
|
||||
INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf
|
||||
INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
|
||||
INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
|
||||
!endif
|
||||
|
||||
FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
|
||||
SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
|
||||
SECTION FV_IMAGE = FVMAIN
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
################################################################################
|
||||
#
|
||||
# Rules are use with the [FV] section's module INF type to define
|
||||
# how an FFS file is created for a given INF file. The following Rule are the default
|
||||
# rules for the different module type. User can add the customized rules to define the
|
||||
# content of the FFS file.
|
||||
#
|
||||
################################################################################
|
||||
|
||||
|
||||
############################################################################
|
||||
# Example of a DXE_DRIVER FFS file with a Checksum encapsulation section #
|
||||
############################################################################
|
||||
#
|
||||
#[Rule.Common.DXE_DRIVER]
|
||||
# FILE DRIVER = $(NAMED_GUID) {
|
||||
# DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
|
||||
# COMPRESS PI_STD {
|
||||
# GUIDED {
|
||||
# PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
# UI STRING="$(MODULE_NAME)" Optional
|
||||
# VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
|
||||
# }
|
||||
# }
|
||||
# }
|
||||
#
|
||||
############################################################################
|
||||
|
||||
[Rule.Common.SEC]
|
||||
FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
|
||||
TE TE Align = 32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
}
|
||||
|
||||
[Rule.Common.PEI_CORE]
|
||||
FILE PEI_CORE = $(NAMED_GUID) {
|
||||
TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
UI STRING ="$(MODULE_NAME)" Optional
|
||||
}
|
||||
|
||||
[Rule.Common.PEIM]
|
||||
FILE PEIM = $(NAMED_GUID) {
|
||||
PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
|
||||
TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
UI STRING="$(MODULE_NAME)" Optional
|
||||
}
|
||||
|
||||
[Rule.Common.PEIM.TIANOCOMPRESSED]
|
||||
FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 {
|
||||
PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
|
||||
GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
|
||||
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
UI STRING="$(MODULE_NAME)" Optional
|
||||
}
|
||||
}
|
||||
|
||||
[Rule.Common.DXE_CORE]
|
||||
FILE DXE_CORE = $(NAMED_GUID) {
|
||||
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
UI STRING="$(MODULE_NAME)" Optional
|
||||
}
|
||||
|
||||
[Rule.Common.UEFI_DRIVER]
|
||||
FILE DRIVER = $(NAMED_GUID) {
|
||||
DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
|
||||
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
UI STRING="$(MODULE_NAME)" Optional
|
||||
}
|
||||
|
||||
[Rule.Common.DXE_DRIVER]
|
||||
FILE DRIVER = $(NAMED_GUID) {
|
||||
DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
|
||||
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
UI STRING="$(MODULE_NAME)" Optional
|
||||
}
|
||||
|
||||
[Rule.Common.DXE_RUNTIME_DRIVER]
|
||||
FILE DRIVER = $(NAMED_GUID) {
|
||||
DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
|
||||
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
UI STRING="$(MODULE_NAME)" Optional
|
||||
}
|
||||
|
||||
[Rule.Common.UEFI_APPLICATION]
|
||||
FILE APPLICATION = $(NAMED_GUID) {
|
||||
UI STRING ="$(MODULE_NAME)" Optional
|
||||
PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
|
||||
}
|
||||
|
|
@ -0,0 +1,83 @@
|
|||
/** @file
|
||||
* Header defining Versatile Express constants (Base addresses, sizes, flags)
|
||||
*
|
||||
* Copyright (c) 2011, ARM Limited. All rights reserved.
|
||||
*
|
||||
* This program and the accompanying materials
|
||||
* are licensed and made available under the terms and conditions of the BSD License
|
||||
* which accompanies this distribution. The full text of the license may be found at
|
||||
* http://opensource.org/licenses/bsd-license.php
|
||||
*
|
||||
* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
*
|
||||
**/
|
||||
|
||||
#ifndef __ARM_VEXPRESS_H__
|
||||
#define __ARM_VEXPRESS_H__
|
||||
|
||||
#include <VExpressMotherBoard.h>
|
||||
|
||||
/***********************************************************************************
|
||||
// Platform Memory Map
|
||||
************************************************************************************/
|
||||
|
||||
// Can be NOR0, NOR1, DRAM
|
||||
#define ARM_VE_REMAP_BASE 0x00000000
|
||||
#define ARM_VE_REMAP_SZ SIZE_64MB
|
||||
|
||||
// Motherboard Peripheral and On-chip peripheral
|
||||
#define ARM_VE_BOARD_PERIPH_BASE 0x1C010000
|
||||
|
||||
// NOR Flash 1
|
||||
// There is typo in the reference manual for the Base address of NOR Flash 1
|
||||
#define ARM_VE_SMB_NOR0_BASE 0x08000000
|
||||
#define ARM_VE_SMB_NOR0_SZ SIZE_64MB
|
||||
// NOR Flash 2
|
||||
#define ARM_VE_SMB_NOR1_BASE 0x0C000000
|
||||
#define ARM_VE_SMB_NOR1_SZ SIZE_64MB
|
||||
// SRAM
|
||||
#define ARM_VE_SMB_SRAM_BASE 0x2E000000
|
||||
#define ARM_VE_SMB_SRAM_SZ SIZE_64KB
|
||||
// USB, Ethernet, VRAM
|
||||
#define ARM_VE_SMB_PERIPH_BASE 0x18000000
|
||||
#define PL111_CLCD_VRAM_MOTHERBOARD_BASE ARM_VE_SMB_PERIPH_BASE
|
||||
#define ARM_VE_SMB_PERIPH_SZ SIZE_64MB
|
||||
|
||||
// DRAM
|
||||
#define ARM_VE_DRAM_BASE PcdGet32 (PcdSystemMemoryBase)
|
||||
#define ARM_VE_DRAM_SZ PcdGet32 (PcdSystemMemorySize)
|
||||
|
||||
// This can be any value since we only support motherboard PL111
|
||||
#define LCD_VRAM_CORE_TILE_BASE 0x00000000
|
||||
|
||||
// On-chip peripherals (Snoop Control Unit etc...)
|
||||
#define ARM_VE_ON_CHIP_PERIPH_BASE 0x2C000000
|
||||
// Note: The TRM says not all the peripherals are implemented
|
||||
#define ARM_VE_ON_CHIP_PERIPH_SZ SIZE_256MB
|
||||
|
||||
|
||||
// External AXI between daughterboards (Logic Tile)
|
||||
#define ARM_VE_EXT_AXI_BASE 0x2E010000 // Not modelled
|
||||
#define ARM_VE_EXT_AXI_SZ 0x20000000 /* 512 MB */
|
||||
|
||||
/***********************************************************************************
|
||||
// Memory-mapped peripherals
|
||||
************************************************************************************/
|
||||
|
||||
// Note: There is no System Configuration Controller on the Model,
|
||||
// So do dummy definition to avoid build failures
|
||||
#define ARM_VE_SCC_BASE
|
||||
|
||||
// SP810 Controller
|
||||
#define SP810_CTRL_BASE 0x1C020000
|
||||
|
||||
// PL111 Colour LCD Controller
|
||||
#define PL111_CLCD_SITE ARM_VE_MOTHERBOARD_SITE
|
||||
#define PL111_CLCD_MOTHERBOARD_VIDEO_MODE_OSC_ID 1
|
||||
#define PL111_CLCD_CORE_TILE_VIDEO_MODE_OSC_ID 1
|
||||
|
||||
// VRAM offset for the PL111 Colour LCD Controller on the motherboard
|
||||
#define VRAM_MOTHERBOARD_BASE (ARM_VE_SMB_PERIPH_BASE + 0x00000)
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,47 @@
|
|||
#/* @file
|
||||
# Copyright (c) 2011, ARM Limited. All rights reserved.
|
||||
#
|
||||
# This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
# http://opensource.org/licenses/bsd-license.php
|
||||
#
|
||||
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
#
|
||||
#*/
|
||||
|
||||
[Defines]
|
||||
INF_VERSION = 0x00010005
|
||||
BASE_NAME = RTSMArmVExpressLib
|
||||
FILE_GUID = b98a6cb7-d472-4128-ad62-a7347f85ce13
|
||||
MODULE_TYPE = BASE
|
||||
VERSION_STRING = 1.0
|
||||
LIBRARY_CLASS = ArmPlatformLib
|
||||
|
||||
[Packages]
|
||||
MdePkg/MdePkg.dec
|
||||
MdeModulePkg/MdeModulePkg.dec
|
||||
EmbeddedPkg/EmbeddedPkg.dec
|
||||
ArmPkg/ArmPkg.dec
|
||||
ArmPlatformPkg/ArmPlatformPkg.dec
|
||||
|
||||
[LibraryClasses]
|
||||
IoLib
|
||||
ArmLib
|
||||
MemoryAllocationLib
|
||||
SerialPortLib
|
||||
|
||||
[Sources.common]
|
||||
RTSM.c
|
||||
RTSMMem.c
|
||||
|
||||
[FeaturePcd]
|
||||
gEmbeddedTokenSpaceGuid.PcdCacheEnable
|
||||
gArmPlatformTokenSpaceGuid.PcdNorFlashRemapping
|
||||
gArmPlatformTokenSpaceGuid.PcdStandalone
|
||||
|
||||
[FixedPcd]
|
||||
gArmTokenSpaceGuid.PcdSystemMemoryBase
|
||||
gArmTokenSpaceGuid.PcdSystemMemorySize
|
||||
gArmTokenSpaceGuid.PcdFvBaseAddress
|
||||
|
|
@ -0,0 +1,48 @@
|
|||
#/* @file
|
||||
# Copyright (c) 2011, ARM Limited. All rights reserved.
|
||||
#
|
||||
# This program and the accompanying materials
|
||||
# are licensed and made available under the terms and conditions of the BSD License
|
||||
# which accompanies this distribution. The full text of the license may be found at
|
||||
# http://opensource.org/licenses/bsd-license.php
|
||||
#
|
||||
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
#
|
||||
#*/
|
||||
|
||||
[Defines]
|
||||
INF_VERSION = 0x00010005
|
||||
BASE_NAME = RTSMArmVExpressLib
|
||||
FILE_GUID = 6352e3a0-ed14-4613-bf90-d316014dd142
|
||||
MODULE_TYPE = BASE
|
||||
VERSION_STRING = 1.0
|
||||
LIBRARY_CLASS = ArmPlatformLib
|
||||
|
||||
[Packages]
|
||||
MdePkg/MdePkg.dec
|
||||
MdeModulePkg/MdeModulePkg.dec
|
||||
EmbeddedPkg/EmbeddedPkg.dec
|
||||
ArmPkg/ArmPkg.dec
|
||||
ArmPlatformPkg/ArmPlatformPkg.dec
|
||||
|
||||
[LibraryClasses]
|
||||
IoLib
|
||||
ArmLib
|
||||
SerialPortLib
|
||||
|
||||
[Sources.common]
|
||||
RTSMSec.c
|
||||
RTSM.c
|
||||
RTSMBoot.asm | RVCT
|
||||
RTSMBoot.S | GCC
|
||||
|
||||
[Protocols]
|
||||
|
||||
[FeaturePcd]
|
||||
gEmbeddedTokenSpaceGuid.PcdCacheEnable
|
||||
gArmPlatformTokenSpaceGuid.PcdNorFlashRemapping
|
||||
gArmPlatformTokenSpaceGuid.PcdStandalone
|
||||
|
||||
[FixedPcd]
|
||||
gArmTokenSpaceGuid.PcdFvBaseAddress
|
||||
|
|
@ -0,0 +1,196 @@
|
|||
/** @file
|
||||
*
|
||||
* Copyright (c) 2011, ARM Limited. All rights reserved.
|
||||
*
|
||||
* This program and the accompanying materials
|
||||
* are licensed and made available under the terms and conditions of the BSD License
|
||||
* which accompanies this distribution. The full text of the license may be found at
|
||||
* http://opensource.org/licenses/bsd-license.php
|
||||
*
|
||||
* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
*
|
||||
**/
|
||||
|
||||
#include <Library/IoLib.h>
|
||||
#include <Library/ArmPlatformLib.h>
|
||||
#include <Library/DebugLib.h>
|
||||
#include <Library/PcdLib.h>
|
||||
|
||||
#include <Drivers/SP804Timer.h>
|
||||
|
||||
#include <Ppi/ArmMpCoreInfo.h>
|
||||
|
||||
#include <ArmPlatform.h>
|
||||
|
||||
ARM_CORE_INFO mVersatileExpressMpCoreInfoTable[] = {
|
||||
{
|
||||
// Cluster 0, Core 0
|
||||
0x0, 0x0,
|
||||
|
||||
// MP Core MailBox Set/Get/Clear Addresses and Clear Value
|
||||
(EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
|
||||
(EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
|
||||
(EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
|
||||
(UINT64)0xFFFFFFFF
|
||||
},
|
||||
{
|
||||
// Cluster 0, Core 1
|
||||
0x0, 0x1,
|
||||
|
||||
// MP Core MailBox Set/Get/Clear Addresses and Clear Value
|
||||
(EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
|
||||
(EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
|
||||
(EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
|
||||
(UINT64)0xFFFFFFFF
|
||||
},
|
||||
{
|
||||
// Cluster 0, Core 2
|
||||
0x0, 0x2,
|
||||
|
||||
// MP Core MailBox Set/Get/Clear Addresses and Clear Value
|
||||
(EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
|
||||
(EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
|
||||
(EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
|
||||
(UINT64)0xFFFFFFFF
|
||||
},
|
||||
{
|
||||
// Cluster 0, Core 3
|
||||
0x0, 0x3,
|
||||
|
||||
// MP Core MailBox Set/Get/Clear Addresses and Clear Value
|
||||
(EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_REG,
|
||||
(EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_SET_REG,
|
||||
(EFI_PHYSICAL_ADDRESS)ARM_VE_SYS_FLAGS_CLR_REG,
|
||||
(UINT64)0xFFFFFFFF
|
||||
}
|
||||
};
|
||||
|
||||
/**
|
||||
Return if Trustzone is supported by your platform
|
||||
|
||||
A non-zero value must be returned if you want to support a Secure World on your platform.
|
||||
ArmVExpressTrustzoneInit() will later set up the secure regions.
|
||||
This function can return 0 even if Trustzone is supported by your processor. In this case,
|
||||
the platform will continue to run in Secure World.
|
||||
|
||||
@return A non-zero value if Trustzone supported.
|
||||
|
||||
**/
|
||||
UINTN
|
||||
ArmPlatformTrustzoneSupported (
|
||||
VOID
|
||||
)
|
||||
{
|
||||
// Not supported yet but model does have Secure SRAM (but no TZPC/TZASC) so we could support it
|
||||
return FALSE;
|
||||
}
|
||||
|
||||
/**
|
||||
Return the current Boot Mode
|
||||
|
||||
This function returns the boot reason on the platform
|
||||
|
||||
@return Return the current Boot Mode of the platform
|
||||
|
||||
**/
|
||||
EFI_BOOT_MODE
|
||||
ArmPlatformGetBootMode (
|
||||
VOID
|
||||
)
|
||||
{
|
||||
return BOOT_WITH_FULL_CONFIGURATION;
|
||||
}
|
||||
|
||||
/**
|
||||
Remap the memory at 0x0
|
||||
|
||||
Some platform requires or gives the ability to remap the memory at the address 0x0.
|
||||
This function can do nothing if this feature is not relevant to your platform.
|
||||
|
||||
**/
|
||||
VOID
|
||||
ArmPlatformBootRemapping (
|
||||
VOID
|
||||
)
|
||||
{
|
||||
// Disable memory remapping and return to normal mapping
|
||||
MmioOr32 (SP810_CTRL_BASE, BIT8);
|
||||
}
|
||||
|
||||
/**
|
||||
Initialize controllers that must setup in the normal world
|
||||
|
||||
This function is called by the ArmPlatformPkg/Pei or ArmPlatformPkg/Pei/PlatformPeim
|
||||
in the PEI phase.
|
||||
|
||||
**/
|
||||
VOID
|
||||
ArmPlatformNormalInitialize (
|
||||
VOID
|
||||
)
|
||||
{
|
||||
// Nothing to do here
|
||||
}
|
||||
|
||||
/**
|
||||
Initialize the system (or sometimes called permanent) memory
|
||||
|
||||
This memory is generally represented by the DRAM.
|
||||
|
||||
**/
|
||||
VOID
|
||||
ArmPlatformInitializeSystemMemory (
|
||||
VOID
|
||||
)
|
||||
{
|
||||
// Configure periodic timer (TIMER0) for 1MHz operation
|
||||
MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER0_TIMCLK);
|
||||
// Configure 1MHz clock
|
||||
MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER1_TIMCLK);
|
||||
// configure SP810 to use 1MHz clock and disable
|
||||
MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER2_EN, SP810_SYS_CTRL_TIMER2_TIMCLK);
|
||||
// Configure SP810 to use 1MHz clock and disable
|
||||
MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER3_EN, SP810_SYS_CTRL_TIMER3_TIMCLK);
|
||||
}
|
||||
|
||||
EFI_STATUS
|
||||
PrePeiCoreGetMpCoreInfo (
|
||||
OUT UINTN *CoreCount,
|
||||
OUT ARM_CORE_INFO **ArmCoreTable
|
||||
)
|
||||
{
|
||||
UINT32 ProcType;
|
||||
|
||||
ProcType = MmioRead32 (ARM_VE_SYS_PROCID0_REG) & ARM_VE_SYS_PROC_ID_MASK;
|
||||
if (ProcType == ARM_VE_SYS_PROC_ID_CORTEX_A9) {
|
||||
// Only support one cluster
|
||||
*CoreCount = ArmGetCpuCountPerCluster ();
|
||||
*ArmCoreTable = mVersatileExpressMpCoreInfoTable;
|
||||
return EFI_SUCCESS;
|
||||
} else {
|
||||
return EFI_UNSUPPORTED;
|
||||
}
|
||||
}
|
||||
|
||||
// Needs to be declared in the file. Otherwise gArmMpCoreInfoPpiGuid is undefined in the contect of PrePeiCore
|
||||
EFI_GUID mArmMpCoreInfoPpiGuid = ARM_MP_CORE_INFO_PPI_GUID;
|
||||
ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = { PrePeiCoreGetMpCoreInfo };
|
||||
|
||||
EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] = {
|
||||
{
|
||||
EFI_PEI_PPI_DESCRIPTOR_PPI,
|
||||
&mArmMpCoreInfoPpiGuid,
|
||||
&mMpCoreInfoPpi
|
||||
}
|
||||
};
|
||||
|
||||
VOID
|
||||
ArmPlatformGetPlatformPpiList (
|
||||
OUT UINTN *PpiListSize,
|
||||
OUT EFI_PEI_PPI_DESCRIPTOR **PpiList
|
||||
)
|
||||
{
|
||||
*PpiListSize = sizeof(gPlatformPpiTable);
|
||||
*PpiList = gPlatformPpiTable;
|
||||
}
|
||||
|
|
@ -0,0 +1,50 @@
|
|||
//
|
||||
// Copyright (c) 2011, ARM Limited. All rights reserved.
|
||||
//
|
||||
// This program and the accompanying materials
|
||||
// are licensed and made available under the terms and conditions of the BSD License
|
||||
// which accompanies this distribution. The full text of the license may be found at
|
||||
// http://opensource.org/licenses/bsd-license.php
|
||||
//
|
||||
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
//
|
||||
//
|
||||
|
||||
#include <AsmMacroIoLib.h>
|
||||
#include <Base.h>
|
||||
#include <Library/ArmPlatformLib.h>
|
||||
#include <AutoGen.h>
|
||||
#include <ArmPlatform.h>
|
||||
|
||||
.text
|
||||
.align 3
|
||||
|
||||
GCC_ASM_EXPORT(ArmPlatformSecBootAction)
|
||||
GCC_ASM_EXPORT(ArmPlatformInitializeBootMemory)
|
||||
|
||||
/**
|
||||
Call at the beginning of the platform boot up
|
||||
|
||||
This function allows the firmware platform to do extra actions at the early
|
||||
stage of the platform power up.
|
||||
|
||||
Note: This function must be implemented in assembler as there is no stack set up yet
|
||||
|
||||
**/
|
||||
ASM_PFX(ArmPlatformSecBootAction):
|
||||
bx lr
|
||||
|
||||
/**
|
||||
Initialize the memory where the initial stacks will reside
|
||||
|
||||
This memory can contain the initial stacks (Secure and Secure Monitor stacks).
|
||||
In some platform, this region is already initialized and the implementation of this function can
|
||||
do nothing. This memory can also represent the Secure RAM.
|
||||
This function is called before the satck has been set up. Its implementation must ensure the stack
|
||||
pointer is not used (probably required to use assembly language)
|
||||
|
||||
**/
|
||||
ASM_PFX(ArmPlatformInitializeBootMemory):
|
||||
// The SMC does not need to be initialized for RTSM
|
||||
bx lr
|
||||
|
|
@ -0,0 +1,52 @@
|
|||
//
|
||||
// Copyright (c) 2011, ARM Limited. All rights reserved.
|
||||
//
|
||||
// This program and the accompanying materials
|
||||
// are licensed and made available under the terms and conditions of the BSD License
|
||||
// which accompanies this distribution. The full text of the license may be found at
|
||||
// http://opensource.org/licenses/bsd-license.php
|
||||
//
|
||||
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
//
|
||||
//
|
||||
|
||||
#include <AsmMacroIoLib.h>
|
||||
#include <Base.h>
|
||||
#include <Library/ArmPlatformLib.h>
|
||||
#include <AutoGen.h>
|
||||
#include <ArmPlatform.h>
|
||||
|
||||
INCLUDE AsmMacroIoLib.inc
|
||||
|
||||
EXPORT ArmPlatformSecBootAction
|
||||
EXPORT ArmPlatformInitializeBootMemory
|
||||
|
||||
PRESERVE8
|
||||
AREA RTSMVExpressBootMode, CODE, READONLY
|
||||
|
||||
/**
|
||||
Call at the beginning of the platform boot up
|
||||
|
||||
This function allows the firmware platform to do extra actions at the early
|
||||
stage of the platform power up.
|
||||
|
||||
Note: This function must be implemented in assembler as there is no stack set up yet
|
||||
|
||||
**/
|
||||
ArmPlatformSecBootAction
|
||||
bx lr
|
||||
|
||||
/**
|
||||
Initialize the memory where the initial stacks will reside
|
||||
|
||||
This memory can contain the initial stacks (Secure and Secure Monitor stacks).
|
||||
In some platform, this region is already initialized and the implementation of this function can
|
||||
do nothing. This memory can also represent the Secure RAM.
|
||||
This function is called before the satck has been set up. Its implementation must ensure the stack
|
||||
pointer is not used (probably required to use assembly language)
|
||||
|
||||
**/
|
||||
ArmPlatformInitializeBootMemory
|
||||
// The SMC does not need to be initialized for RTSM
|
||||
bx lr
|
||||
|
|
@ -0,0 +1,158 @@
|
|||
/** @file
|
||||
*
|
||||
* Copyright (c) 2011, ARM Limited. All rights reserved.
|
||||
*
|
||||
* This program and the accompanying materials
|
||||
* are licensed and made available under the terms and conditions of the BSD License
|
||||
* which accompanies this distribution. The full text of the license may be found at
|
||||
* http://opensource.org/licenses/bsd-license.php
|
||||
*
|
||||
* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
*
|
||||
**/
|
||||
|
||||
#include <Library/ArmPlatformLib.h>
|
||||
#include <Library/DebugLib.h>
|
||||
#include <Library/PcdLib.h>
|
||||
#include <Library/IoLib.h>
|
||||
#include <Library/MemoryAllocationLib.h>
|
||||
#include <ArmPlatform.h>
|
||||
|
||||
// Number of Virtual Memory Map Descriptors without a Logic Tile
|
||||
#define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 5
|
||||
|
||||
// DDR attributes
|
||||
#define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK
|
||||
#define DDR_ATTRIBUTES_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED
|
||||
#define DDR_ATTRIBUTES_SECURE_CACHED ARM_MEMORY_REGION_ATTRIBUTE_SECURE_WRITE_BACK
|
||||
#define DDR_ATTRIBUTES_SECURE_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_SECURE_UNCACHED_UNBUFFERED
|
||||
|
||||
/**
|
||||
Return the Virtual Memory Map of your platform
|
||||
|
||||
This Virtual Memory Map is used by MemoryInitPei Module to initialize the MMU on your platform.
|
||||
|
||||
@param[out] VirtualMemoryMap Array of ARM_MEMORY_REGION_DESCRIPTOR describing a Physical-to-
|
||||
Virtual Memory mapping. This array must be ended by a zero-filled
|
||||
entry
|
||||
|
||||
**/
|
||||
VOID
|
||||
ArmPlatformGetVirtualMemoryMap (
|
||||
IN ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap
|
||||
)
|
||||
{
|
||||
ARM_MEMORY_REGION_ATTRIBUTES CacheAttributes;
|
||||
BOOLEAN bTrustzoneSupport;
|
||||
UINTN Index = 0;
|
||||
ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable;
|
||||
|
||||
ASSERT(VirtualMemoryMap != NULL);
|
||||
|
||||
VirtualMemoryTable = (ARM_MEMORY_REGION_DESCRIPTOR*)AllocatePages(EFI_SIZE_TO_PAGES (sizeof(ARM_MEMORY_REGION_DESCRIPTOR) * MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS));
|
||||
if (VirtualMemoryTable == NULL) {
|
||||
return;
|
||||
}
|
||||
|
||||
// Check if SMC TZASC is enabled. If Trustzone not enabled then all the entries remain in Secure World.
|
||||
// As this value can be changed in the Board Configuration file, the UEFI firmware needs to work for both case
|
||||
if (ArmPlatformTrustzoneSupported ()) {
|
||||
bTrustzoneSupport = TRUE;
|
||||
} else {
|
||||
bTrustzoneSupport = FALSE;
|
||||
}
|
||||
|
||||
if (FeaturePcdGet(PcdCacheEnable) == TRUE) {
|
||||
CacheAttributes = (bTrustzoneSupport ? DDR_ATTRIBUTES_CACHED : DDR_ATTRIBUTES_SECURE_CACHED);
|
||||
} else {
|
||||
CacheAttributes = (bTrustzoneSupport ? DDR_ATTRIBUTES_UNCACHED : DDR_ATTRIBUTES_SECURE_UNCACHED);
|
||||
}
|
||||
|
||||
// ReMap (Either NOR Flash or DRAM)
|
||||
VirtualMemoryTable[Index].PhysicalBase = ARM_VE_REMAP_BASE;
|
||||
VirtualMemoryTable[Index].VirtualBase = ARM_VE_REMAP_BASE;
|
||||
VirtualMemoryTable[Index].Length = ARM_VE_REMAP_SZ;
|
||||
|
||||
if (FeaturePcdGet(PcdNorFlashRemapping)) {
|
||||
// Map the NOR Flash as Secure Memory
|
||||
if (FeaturePcdGet(PcdCacheEnable) == TRUE) {
|
||||
VirtualMemoryTable[Index].Attributes = DDR_ATTRIBUTES_SECURE_CACHED;
|
||||
} else {
|
||||
VirtualMemoryTable[Index].Attributes = DDR_ATTRIBUTES_SECURE_UNCACHED;
|
||||
}
|
||||
} else {
|
||||
// DRAM mapping
|
||||
VirtualMemoryTable[Index].Attributes = CacheAttributes;
|
||||
}
|
||||
|
||||
// DDR
|
||||
VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_DRAM_BASE;
|
||||
VirtualMemoryTable[Index].VirtualBase = ARM_VE_DRAM_BASE;
|
||||
VirtualMemoryTable[Index].Length = ARM_VE_DRAM_SZ;
|
||||
VirtualMemoryTable[Index].Attributes = CacheAttributes;
|
||||
|
||||
// CPU peripherals. TRM. Manual says not all of them are implemented.
|
||||
VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_ON_CHIP_PERIPH_BASE;
|
||||
VirtualMemoryTable[Index].VirtualBase = ARM_VE_ON_CHIP_PERIPH_BASE;
|
||||
VirtualMemoryTable[Index].Length = ARM_VE_ON_CHIP_PERIPH_SZ;
|
||||
VirtualMemoryTable[Index].Attributes = (bTrustzoneSupport ? ARM_MEMORY_REGION_ATTRIBUTE_DEVICE : ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE);
|
||||
|
||||
// SMB CS0-CS1 - NOR Flash 1 & 2
|
||||
VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_NOR0_BASE;
|
||||
VirtualMemoryTable[Index].VirtualBase = ARM_VE_SMB_NOR0_BASE;
|
||||
VirtualMemoryTable[Index].Length = ARM_VE_SMB_NOR0_SZ + ARM_VE_SMB_NOR1_SZ;
|
||||
VirtualMemoryTable[Index].Attributes = (bTrustzoneSupport ? ARM_MEMORY_REGION_ATTRIBUTE_DEVICE : ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE);
|
||||
|
||||
// SMB CS2 - SRAM
|
||||
VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_SRAM_BASE;
|
||||
VirtualMemoryTable[Index].VirtualBase = ARM_VE_SMB_SRAM_BASE;
|
||||
VirtualMemoryTable[Index].Length = ARM_VE_SMB_SRAM_SZ;
|
||||
VirtualMemoryTable[Index].Attributes = CacheAttributes;
|
||||
|
||||
// Peripheral CS2 and CS3
|
||||
VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_PERIPH_BASE;
|
||||
VirtualMemoryTable[Index].VirtualBase = ARM_VE_SMB_PERIPH_BASE;
|
||||
VirtualMemoryTable[Index].Length = 2 * ARM_VE_SMB_PERIPH_SZ;
|
||||
VirtualMemoryTable[Index].Attributes = (bTrustzoneSupport ? ARM_MEMORY_REGION_ATTRIBUTE_DEVICE : ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE);
|
||||
|
||||
//TODO:This should be enabled for final release. Right now, ARM VE RTSM crashes.
|
||||
// // If a Logic Tile is connected to The ARM Versatile Express Motherboard
|
||||
// if (MmioRead32(ARM_VE_SYS_PROCID1_REG) != 0) {
|
||||
// VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_EXT_AXI_BASE;
|
||||
// VirtualMemoryTable[Index].VirtualBase = ARM_VE_EXT_AXI_BASE;
|
||||
// VirtualMemoryTable[Index].Length = ARM_VE_EXT_AXI_SZ;
|
||||
// VirtualMemoryTable[Index].Attributes = (bTrustzoneSupport ? ARM_MEMORY_REGION_ATTRIBUTE_DEVICE : ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE);
|
||||
//
|
||||
// ASSERT((Index + 1) == (MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS + 1));
|
||||
// } else {
|
||||
// ASSERT((Index + 1) == MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS);
|
||||
// }
|
||||
|
||||
// End of Table
|
||||
VirtualMemoryTable[++Index].PhysicalBase = 0;
|
||||
VirtualMemoryTable[Index].VirtualBase = 0;
|
||||
VirtualMemoryTable[Index].Length = 0;
|
||||
VirtualMemoryTable[Index].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)0;
|
||||
|
||||
*VirtualMemoryMap = VirtualMemoryTable;
|
||||
}
|
||||
|
||||
/**
|
||||
Return the EFI Memory Map provided by extension memory on your platform
|
||||
|
||||
This EFI Memory Map of the System Memory is used by MemoryInitPei module to create the Resource
|
||||
Descriptor HOBs used by DXE core.
|
||||
TODO: CompleteMe .... say this is the memory not covered by the System Memory PCDs
|
||||
|
||||
@param[out] EfiMemoryMap Array of ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR describing an
|
||||
EFI Memory region. This array must be ended by a zero-filled entry
|
||||
|
||||
**/
|
||||
EFI_STATUS
|
||||
ArmPlatformGetAdditionalSystemMemory (
|
||||
OUT ARM_SYSTEM_MEMORY_REGION_DESCRIPTOR** EfiMemoryMap
|
||||
)
|
||||
{
|
||||
return EFI_UNSUPPORTED;
|
||||
}
|
||||
|
|
@ -0,0 +1,65 @@
|
|||
/** @file
|
||||
*
|
||||
* Copyright (c) 2011, ARM Limited. All rights reserved.
|
||||
*
|
||||
* This program and the accompanying materials
|
||||
* are licensed and made available under the terms and conditions of the BSD License
|
||||
* which accompanies this distribution. The full text of the license may be found at
|
||||
* http://opensource.org/licenses/bsd-license.php
|
||||
*
|
||||
* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
||||
*
|
||||
**/
|
||||
|
||||
#include <Library/IoLib.h>
|
||||
#include <Library/ArmTrustZoneLib.h>
|
||||
#include <Library/ArmPlatformLib.h>
|
||||
#include <Library/DebugLib.h>
|
||||
#include <Library/PcdLib.h>
|
||||
#include <Drivers/PL310L2Cache.h>
|
||||
|
||||
/**
|
||||
Initialize the Secure peripherals and memory regions
|
||||
|
||||
If Trustzone is supported by your platform then this function makes the required initialization
|
||||
of the secure peripherals and memory regions.
|
||||
|
||||
**/
|
||||
VOID
|
||||
ArmPlatformTrustzoneInit (
|
||||
VOID
|
||||
)
|
||||
{
|
||||
// No TZPC or TZASC on RTSM to initialize
|
||||
}
|
||||
|
||||
/**
|
||||
Initialize controllers that must setup at the early stage
|
||||
|
||||
Some peripherals must be initialized in Secure World.
|
||||
For example, some L2x0 requires to be initialized in Secure World
|
||||
|
||||
**/
|
||||
VOID
|
||||
ArmPlatformSecInitialize (
|
||||
VOID
|
||||
)
|
||||
{
|
||||
}
|
||||
|
||||
/**
|
||||
Call before jumping to Normal World
|
||||
|
||||
This function allows the firmware platform to do extra actions before
|
||||
jumping to the Normal World
|
||||
|
||||
**/
|
||||
VOID
|
||||
ArmPlatformSecExtraAction (
|
||||
IN UINTN MpId,
|
||||
OUT UINTN* JumpAddress
|
||||
)
|
||||
{
|
||||
*JumpAddress = PcdGet32(PcdFvBaseAddress);
|
||||
}
|
||||
|
|
@ -234,12 +234,16 @@ LcdPlatformSetMode (
|
|||
return Status;
|
||||
}
|
||||
|
||||
// On the ARM Versatile Express Model (RTSM) the value of the SysId is equal to 0x225F500.
|
||||
// Note: The DVI Mode is not modelled on RTSM
|
||||
if (MmioRead32 (ARM_VE_SYS_ID_REG) != 0x225F500) {
|
||||
// Set the DVI into the new mode
|
||||
Status = ArmPlatformSysConfigSet (SYS_CFG_DVIMODE, mResolutions[ModeNumber].Mode);
|
||||
if (EFI_ERROR(Status)) {
|
||||
ASSERT_EFI_ERROR (Status);
|
||||
return Status;
|
||||
}
|
||||
}
|
||||
|
||||
// Set the multiplexer
|
||||
Status = ArmPlatformSysConfigSet (SYS_CFG_MUXFPGA, LcdSite);
|
||||
|
|
|
|||
Loading…
Reference in New Issue