mirror of https://github.com/acidanthera/audk.git
Ring3: All the same.
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@ -12,6 +12,8 @@
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#include <AsmMacroIoLibV8.h>
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#include <Protocol/DebugSupport.h> // for exception type definitions
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.cpu cortex-a76
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/*
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This is the stack constructed by the exception handler (low address to high address).
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X0 to FAR makes up the EFI_SYSTEM_CONTEXT for AArch64.
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@ -116,7 +118,24 @@ ASM_PFX(ExceptionHandlersStart):
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VECTOR_BASE(ExceptionHandlersStart)
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#endif
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.macro ExceptionEntry, val
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.macro ExceptionEntry, val, sp=SPx
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//
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// Our backtrace and register dump code is written in C and so it requires
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// a stack. This makes it difficult to produce meaningful diagnostics when
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// the stack pointer has been corrupted. So in such cases (i.e., when taking
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// synchronous exceptions), this macro is expanded with \sp set to SP0, in
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// which case we switch to the SP_EL0 stack pointer, which has been
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// initialized to point to a buffer that has been set aside for this purpose.
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//
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// Since 'sp' may no longer refer to the stack frame that was active when
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// the exception was taken, we may have to switch back and forth between
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// SP_EL0 and SP_ELx to record the correct value for SP in the context struct.
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//
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.ifnc \sp, SPx
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msr SPsel, xzr
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msr pan, #0
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.endif
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// Move the stackpointer so we can reach our structure with the str instruction.
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sub sp, sp, #(FP_CONTEXT_SIZE + SYS_CONTEXT_SIZE)
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@ -138,7 +157,13 @@ VECTOR_BASE(ExceptionHandlersStart)
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stp x28, x29, [sp, #0xe0]
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add x28, sp, #(GP_CONTEXT_SIZE + FP_CONTEXT_SIZE + SYS_CONTEXT_SIZE)
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.ifnc \sp, SPx
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msr SPsel, #1
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mov x7, sp
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msr SPsel, xzr
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.else
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mov x7, x28
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.endif
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stp x30, x7, [sp, #0xf0]
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@ -179,7 +204,7 @@ ASM_PFX(SErrorSP0):
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//
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VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_CUR_SPX_SYNC)
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ASM_PFX(SynchronousExceptionSPx):
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ExceptionEntry EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS
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ExceptionEntry EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS, SP0
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VECTOR_ENTRY(ExceptionHandlersStart, ARM_VECTOR_CUR_SPX_IRQ)
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ASM_PFX(IrqSPx):
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