mirror of https://github.com/acidanthera/audk.git
Save segment registers on stack in case the thunk code assembly calls CF9 soft reset and the x64 registers get cleared.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@8124 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
parent
0fe43214e3
commit
1e4371671b
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@ -1,6 +1,6 @@
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#------------------------------------------------------------------------------
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#------------------------------------------------------------------------------
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#
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#
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# Copyright (c) 2006 - 2008, Intel Corporation
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# Copyright (c) 2006 - 2009, Intel Corporation
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# All rights reserved. This program and the accompanying materials
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# All rights reserved. This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# which accompanies this distribution. The full text of the license may be found at
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@ -18,6 +18,7 @@
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# Real mode thunk
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# Real mode thunk
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#
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#
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#------------------------------------------------------------------------------
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#------------------------------------------------------------------------------
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#include <EdkIIGlueBase.h>
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#include <EdkIIGlueBase.h>
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.globl ASM_PFX(m16Start)
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.globl ASM_PFX(m16Start)
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@ -51,7 +52,7 @@
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ASM_PFX(m16Size): .word ASM_PFX(InternalAsmThunk16) - ASM_PFX(m16Start)
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ASM_PFX(m16Size): .word ASM_PFX(InternalAsmThunk16) - ASM_PFX(m16Start)
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ASM_PFX(mThunk16Attr): .word _ThunkAttr - ASM_PFX(m16Start)
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ASM_PFX(mThunk16Attr): .word _ThunkAttr - ASM_PFX(m16Start)
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ASM_PFX(m16Gdt): .word _NullSeg - ASM_PFX(m16Start)
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ASM_PFX(m16Gdt): .word ASM_PFX(NullSeg) - ASM_PFX(m16Start)
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ASM_PFX(m16GdtrBase): .word _16GdtrBase - ASM_PFX(m16Start)
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ASM_PFX(m16GdtrBase): .word _16GdtrBase - ASM_PFX(m16Start)
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ASM_PFX(mTransition): .word _EntryPoint - ASM_PFX(m16Start)
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ASM_PFX(mTransition): .word _EntryPoint - ASM_PFX(m16Start)
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@ -78,8 +79,8 @@ ASM_PFX(BackFromUserCode):
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.byte 0x16 # push ss
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.byte 0x16 # push ss
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.byte 0xe # push cs
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.byte 0xe # push cs
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.byte 0x66
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.byte 0x66
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call @Base # push eip
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call L_Base # push eip
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@Base:
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L_Base:
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.byte 0x66
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.byte 0x66
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pushq $0 # reserved high order 32 bits of EFlags
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pushq $0 # reserved high order 32 bits of EFlags
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.byte 0x66, 0x9c # pushfd actually
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.byte 0x66, 0x9c # pushfd actually
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@ -92,17 +93,17 @@ ASM_PFX(BackFromUserCode):
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.byte 0x66,0xba # mov edx, imm32
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.byte 0x66,0xba # mov edx, imm32
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_ThunkAttr: .space 4
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_ThunkAttr: .space 4
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testb $THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15, %dl
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testb $THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15, %dl
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jz @1
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jz L_1
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movl $0x15cd2401,%eax # mov ax, 2401h & int 15h
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movl $0x15cd2401,%eax # mov ax, 2401h & int 15h
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cli # disable interrupts
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cli # disable interrupts
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jnc @2
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jnc L_2
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@1:
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L_1:
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testb $THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL, %dl
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testb $THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL, %dl
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jz @2
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jz L_2
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inb $0x92,%al
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inb $0x92,%al
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orb $2,%al
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orb $2,%al
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outb %al, $0x92 # deactivate A20M#
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outb %al, $0x92 # deactivate A20M#
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@2:
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L_2:
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movl %ss,%eax
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movl %ss,%eax
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lea IA32_REGS_SIZE(%esp), %bp
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lea IA32_REGS_SIZE(%esp), %bp
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#
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#
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@ -115,9 +116,9 @@ _ThunkAttr: .space 4
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addw %ax,%bp # add ebp, eax
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addw %ax,%bp # add ebp, eax
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movw %cs,%ax
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movw %cs,%ax
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shlw $4,%ax
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shlw $4,%ax
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lea (@64BitCode - @Base)(%ebx, %eax), %ax
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lea (L_64BitCode - L_Base)(%ebx, %eax), %ax
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.byte 0x66,0x2e,0x89,0x87 # mov cs:[bx + (@64Eip - @Base)], eax
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.byte 0x66,0x2e,0x89,0x87 # mov cs:[bx + (L_64Eip - L_Base)], eax
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.word @64Eip - @Base
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.word L_64Eip - L_Base
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.byte 0x66,0xb8 # mov eax, imm32
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.byte 0x66,0xb8 # mov eax, imm32
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SavedCr4: .space 4
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SavedCr4: .space 4
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movq %rax, %cr4
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movq %rax, %cr4
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@ -125,7 +126,7 @@ SavedCr4: .space 4
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# rdi in the instruction below is indeed bx in 16-bit code
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# rdi in the instruction below is indeed bx in 16-bit code
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#
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#
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.byte 0x66,0x2e # 2eh is "cs:" segment override
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.byte 0x66,0x2e # 2eh is "cs:" segment override
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lgdt (SavedGdt - @Base)(%rdi)
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lgdt (SavedGdt - L_Base)(%rdi)
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.byte 0x66
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.byte 0x66
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movl $0xc0000080,%ecx
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movl $0xc0000080,%ecx
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rdmsr
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rdmsr
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@ -134,17 +135,20 @@ SavedCr4: .space 4
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.byte 0x66,0xb8 # mov eax, imm32
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.byte 0x66,0xb8 # mov eax, imm32
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SavedCr0: .space 4
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SavedCr0: .space 4
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movq %rax, %cr0
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movq %rax, %cr0
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.byte 0x66,0xea # jmp far cs:@64Bit
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.byte 0x66,0xea # jmp far cs:L_64Bit
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@64Eip: .space 4
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L_64Eip: .space 4
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SavedCs: .space 2
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SavedCs: .space 2
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@64BitCode:
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L_64BitCode:
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movq %r8, %rsp
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.byte 0x90
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.byte 0x67,0xbc # mov esp, imm32
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SavedSp: .space 4 # restore stack
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nop
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ret
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ret
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_EntryPoint: .long ASM_PFX(ToUserCode) - ASM_PFX(m16Start)
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_EntryPoint: .long ASM_PFX(ToUserCode) - ASM_PFX(m16Start)
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.word CODE16
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.word CODE16
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_16Gdtr: .word GDT_SIZE - 1
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_16Gdtr: .word GDT_SIZE - 1
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_16GdtrBase: .quad _NullSeg
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_16GdtrBase: .quad ASM_PFX(NullSeg)
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_16Idtr: .word 0x3ff
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_16Idtr: .word 0x3ff
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.long 0
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.long 0
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movl %esi,%ss # set up 16-bit stack segment
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movl %esi,%ss # set up 16-bit stack segment
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movw %bx,%sp # set up 16-bit stack pointer
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movw %bx,%sp # set up 16-bit stack pointer
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.byte 0x66 # make the following call 32-bit
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.byte 0x66 # make the following call 32-bit
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call @Base1 # push eip
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call L_Base1 # push eip
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@Base1:
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L_Base1:
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popw %bp # ebp <- address of @Base1
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popw %bp # ebp <- address of L_Base1
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pushq (IA32_REGS_SIZE + 2)(%esp)
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pushq (IA32_REGS_SIZE + 2)(%esp)
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lea 0x0c(%rsi), %eax
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lea 0x0c(%rsi), %eax
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pushq %rax
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pushq %rax
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lret # execution begins at next instruction
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lret # execution begins at next instruction
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@RealMode:
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L_RealMode:
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.byte 0x66,0x2e # CS and operand size override
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.byte 0x66,0x2e # CS and operand size override
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lidt (_16Idtr - @Base1)(%rsi)
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lidt (_16Idtr - L_Base1)(%rsi)
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.byte 0x66,0x61 # popad
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.byte 0x66,0x61 # popad
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.byte 0x1f # pop ds
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.byte 0x1f # pop ds
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.byte 0x7 # pop es
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.byte 0x7 # pop es
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.byte 0x66 # make the following retf 32-bit
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.byte 0x66 # make the following retf 32-bit
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lret # transfer control to user code
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lret # transfer control to user code
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.equ CODE16, ASM_PFX(16Code) - .
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.equ CODE16, ASM_PFX(_16Code) - .
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.equ DATA16, ASM_PFX(16Data) - .
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.equ DATA16, ASM_PFX(_16Data) - .
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.equ DATA32, ASM_PFX(32Data) - .
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.equ DATA32, ASM_PFX(_32Data) - .
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_NullSeg: .quad 0
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ASM_PFX(NullSeg): .quad 0
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ASM_PFX(16Code):
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ASM_PFX(_16Code):
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.word -1
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.word -1
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.word 0
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.word 0
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.byte 0
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.byte 0
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.byte 0x9b
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.byte 0x9b
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.byte 0x8f # 16-bit segment, 4GB limit
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.byte 0x8f # 16-bit segment, 4GB limit
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.byte 0
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.byte 0
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ASM_PFX(16Data):
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ASM_PFX(_16Data):
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.word -1
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.word -1
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.word 0
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.word 0
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.byte 0
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.byte 0
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.byte 0x93
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.byte 0x93
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.byte 0x8f # 16-bit segment, 4GB limit
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.byte 0x8f # 16-bit segment, 4GB limit
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.byte 0
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.byte 0
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ASM_PFX(32Data):
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ASM_PFX(_32Data):
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.word -1
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.word -1
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.word 0
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.word 0
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.byte 0
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.byte 0
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# IN OUT VOID *Transition
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# IN OUT VOID *Transition
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# );
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# );
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#------------------------------------------------------------------------------
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#------------------------------------------------------------------------------
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# MISMATCH: "InternalAsmThunk16 PROC USES rbp rbx rsi rdi"
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.globl ASM_PFX(InternalAsmThunk16)
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.globl ASM_PFX(InternalAsmThunk16)
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ASM_PFX(InternalAsmThunk16):
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ASM_PFX(InternalAsmThunk16):
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pushq %rsi
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pushq %rsi
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pushq %rdi
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pushq %rdi
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movl %ds, %r10d # r9 ~ r11 are not accessible in 16-bit
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movq %ds, %rbx
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movl %es, %r11d # so use them for saving seg registers
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pushq %rbx # Save ds segment register on the stack
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movl %ss, %r9d
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movq %es, %rbx
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pushq %rbx # Save es segment register on the stack
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movq %ss, %rbx
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pushq %rbx # Save ss segment register on the stack
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.byte 0x0f, 0xa0 #push fs
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.byte 0x0f, 0xa0 #push fs
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.byte 0x0f, 0xa8 #push gs
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.byte 0x0f, 0xa8 #push gs
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movq %rcx, %rsi
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movq %rcx, %rsi
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lea (_BackFromUserCode - ASM_PFX(m16Start))(%rdx), %ax
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lea (_BackFromUserCode - ASM_PFX(m16Start))(%rdx), %ax
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stosl # [edi] <- return address of user code
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stosl # [edi] <- return address of user code
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sgdt (SavedGdt - SavedCr4)(%rcx)
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sgdt (SavedGdt - SavedCr4)(%rcx)
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sidt 0x38(%rsp)
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sidt 0x50(%rsp)
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movq %cr0, %rax
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movq %cr0, %rax
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movl %eax, (SavedCr0 - SavedCr4)(%rcx)
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movl %eax, (SavedCr0 - SavedCr4)(%rcx)
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andl $0x7ffffffe,%eax # clear PE, PG bits
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andl $0x7ffffffe,%eax # clear PE, PG bits
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movl %edx,%ss
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movl %edx,%ss
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pushfq
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pushfq
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lea -8(%rdx), %edx
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lea -8(%rdx), %edx
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lea @RetFromRealMode, %r8
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lea L_RetFromRealMode, %r8
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pushq %r8
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pushq %r8
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movl %cs, %r8d
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movl %cs, %r8d
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movw %r8w, (SavedCs - SavedCr4)(%rcx)
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movw %r8w, (SavedCs - SavedCr4)(%rcx)
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movq %rsp, %r8
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movl %esp, (SavedSp - SavedCr4)(%rcx)
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.byte 0xff, 0x69 # jmp (_EntryPoint - SavedCr4)(%rcx)
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.byte 0xff, 0x69 # jmp (_EntryPoint - SavedCr4)(%rcx)
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.byte _EntryPoint - SavedCr4
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.byte _EntryPoint - SavedCr4
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@RetFromRealMode:
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L_RetFromRealMode:
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popfq
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popfq
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lidt 0x38(%rsp)
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lidt 0x50(%rsp)
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lea -IA32_REGS_SIZE(%rbp), %eax
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lea -IA32_REGS_SIZE(%rbp), %eax
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.byte 0x0f, 0xa9 # pop gs
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.byte 0x0f, 0xa9 # pop gs
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.byte 0x0f, 0xa1 # pop fs
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.byte 0x0f, 0xa1 # pop fs
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movl %r9d, %ss
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movl %r11d, %es
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popq %rbx
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movl %r10d, %ds
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movq %rbx, %ss
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popq %rbx
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movq %rbx, %es
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popq %rbx
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movq %rbx, %ds
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popq %rdi
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popq %rdi
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popq %rsi
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popq %rsi
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@ -138,7 +138,10 @@ SavedCr0 DD ?
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@64Eip DD ?
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@64Eip DD ?
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SavedCs DW ?
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SavedCs DW ?
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@64BitCode:
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@64BitCode:
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mov rsp, r8 ; restore stack
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db 090h
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db 067h, 0bch ; mov esp, imm32
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SavedSp DD ? ; restore stack
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nop
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ret
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ret
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_BackFromUserCode ENDP
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_BackFromUserCode ENDP
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; );
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; );
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;------------------------------------------------------------------------------
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;------------------------------------------------------------------------------
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InternalAsmThunk16 PROC USES rbp rbx rsi rdi
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InternalAsmThunk16 PROC USES rbp rbx rsi rdi
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mov r10d, ds ; r9 ~ r11 are not accessible in 16-bit
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mov rbx, ds
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mov r11d, es ; so use them for saving seg registers
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push rbx ; Save ds segment register on the stack
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mov r9d, ss
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mov rbx, es
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push rbx ; Save es segment register on the stack
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mov rbx, ss
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push rbx ; Save ss segment register on the stack
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push fs
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push fs
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push gs
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push gs
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mov rsi, rcx
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mov rsi, rcx
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lea ax, [rdx + (_BackFromUserCode - m16Start)] ; offset address
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lea ax, [rdx + (_BackFromUserCode - m16Start)] ; offset address
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stosd ; [edi] <- return address of user code
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stosd ; [edi] <- return address of user code
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sgdt fword ptr [rcx + (SavedGdt - SavedCr4)]
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sgdt fword ptr [rcx + (SavedGdt - SavedCr4)]
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sidt fword ptr [rsp + 38h] ; save IDT stack in argument space
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sidt fword ptr [rsp + 50h] ; save IDT stack in argument space
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mov rax, cr0
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mov rax, cr0
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mov [rcx + (SavedCr0 - SavedCr4)], eax
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mov [rcx + (SavedCr0 - SavedCr4)], eax
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and eax, 7ffffffeh ; clear PE, PG bits
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and eax, 7ffffffeh ; clear PE, PG bits
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push r8
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push r8
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mov r8d, cs
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mov r8d, cs
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mov [rcx + (SavedCs - SavedCr4)], r8w
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mov [rcx + (SavedCs - SavedCr4)], r8w
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mov r8, rsp
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mov [rcx + (SavedSp - SavedCr4)], esp
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jmp fword ptr [rcx + (_EntryPoint - SavedCr4)]
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jmp fword ptr [rcx + (_EntryPoint - SavedCr4)]
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@RetFromRealMode:
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@RetFromRealMode:
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popfq
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popfq
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lidt fword ptr [rsp + 38h] ; restore protected mode IDTR
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lidt fword ptr [rsp + 50h] ; restore protected mode IDTR
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lea eax, [rbp - sizeof (IA32_REGS)]
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lea eax, [rbp - sizeof (IA32_REGS)]
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pop gs
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pop gs
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pop fs
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pop fs
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mov ss, r9d
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pop rbx
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mov es, r11d
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mov ss, rbx
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mov ds, r10d
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pop rbx
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mov es, rbx
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pop rbx
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mov ds, rbx
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ret
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ret
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InternalAsmThunk16 ENDP
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InternalAsmThunk16 ENDP
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