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MdeModulePkg/PciBus: Change PCI_IO_DEVICE.RomSize to UINT32 type
Per PCI Spec, the option ROM BAR is 32bit so the maximum option ROM size can be hold by UINT32 type. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ray Ni <ray.ni@intel.com> Reviewed-by: Hao Wu <hao.a.wu@intel.com>
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@ -1,7 +1,7 @@
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/** @file
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Header files and data structures needed by PCI Bus module.
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Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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@ -237,7 +237,7 @@ struct _PCI_IO_DEVICE {
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//
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// The OptionRom Size
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//
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UINT64 RomSize;
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UINT32 RomSize;
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//
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// TRUE if all OpROM (in device or in platform specific position) have been processed
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@ -1,7 +1,7 @@
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/** @file
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Supporting functions implementaion for PCI devices management.
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Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
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(C) Copyright 2018 Hewlett Packard Enterprise Development LP<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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@ -259,7 +259,7 @@ RegisterPciDevice (
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);
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if (!EFI_ERROR (Status)) {
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PciIoDevice->EmbeddedRom = FALSE;
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PciIoDevice->RomSize = PlatformOpRomSize;
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PciIoDevice->RomSize = (UINT32) PlatformOpRomSize;
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PciIoDevice->PciIo.RomSize = PlatformOpRomSize;
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PciIoDevice->PciIo.RomImage = PlatformOpRomBuffer;
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//
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@ -285,7 +285,7 @@ RegisterPciDevice (
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);
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if (!EFI_ERROR (Status)) {
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PciIoDevice->EmbeddedRom = FALSE;
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PciIoDevice->RomSize = PlatformOpRomSize;
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PciIoDevice->RomSize = (UINT32) PlatformOpRomSize;
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PciIoDevice->PciIo.RomSize = PlatformOpRomSize;
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PciIoDevice->PciIo.RomImage = PlatformOpRomBuffer;
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//
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@ -1,7 +1,7 @@
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/** @file
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PCI eunmeration implementation on entire PCI bus system for PCI Bus module.
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Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
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(C) Copyright 2015 Hewlett Packard Enterprise Development LP<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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@ -528,15 +528,15 @@ DetermineRootBridgeAttributes (
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@return Max size of option rom needed.
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**/
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UINT64
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UINT32
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GetMaxOptionRomSize (
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IN PCI_IO_DEVICE *Bridge
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)
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{
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LIST_ENTRY *CurrentLink;
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PCI_IO_DEVICE *Temp;
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UINT64 MaxOptionRomSize;
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UINT64 TempOptionRomSize;
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UINT32 MaxOptionRomSize;
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UINT32 TempOptionRomSize;
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MaxOptionRomSize = 0;
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@ -1,7 +1,7 @@
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/** @file
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PCI bus enumeration logic function declaration for PCI bus module.
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Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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@ -109,7 +109,7 @@ DetermineRootBridgeAttributes (
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@return Max size of option rom needed.
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**/
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UINT64
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UINT32
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GetMaxOptionRomSize (
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IN PCI_IO_DEVICE *Bridge
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);
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@ -1,7 +1,7 @@
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/** @file
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Internal library implementation for PCI Bus module.
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Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
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(C) Copyright 2015 Hewlett Packard Enterprise Development LP<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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@ -415,7 +415,7 @@ PciHostBridgeResourceAllocator (
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UINT64 PMem32ResStatus;
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UINT64 Mem64ResStatus;
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UINT64 PMem64ResStatus;
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UINT64 MaxOptionRomSize;
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UINT32 MaxOptionRomSize;
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PCI_RESOURCE_NODE *IoBridge;
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PCI_RESOURCE_NODE *Mem32Bridge;
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PCI_RESOURCE_NODE *PMem32Bridge;
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