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1. Impl PI 1.2 PCI part. Major changes include:
a. Update PciBusDxe module, and move it from IntelFrameworkModulePkg to MdeModulePkg b. Move IncompatiblePciDeviceSupportDxe module from IntelFrameworkModulePkg to MdeModulePkg c. Update the related consumes in inf/dsc/fdf git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9348 6f19259b-4bc3-4df7-8a09-765794883524
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MdePkg/Include/Protocol/PciEnumerationComplete.h
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MdePkg/Include/Protocol/PciEnumerationComplete.h
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/** @file
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PCI Enumeration Complete Protocol as defined in the PI 1.1 specification.
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This protocol indicates that pci enumeration complete
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Copyright (c) 2009, Intel Corporation
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All rights reserved. This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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@par Revision Reference:
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This Protocol is defined in UEFI Platform Initialization Specification 1.2
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Volume 5: Standards
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**/
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#ifndef _PCI_ENUMERATION_COMPLETE_H_
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#define _PCI_ENUMERATION_COMPLETE_H_
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#define EFI_PCI_ENUMERATION_COMPLETE_GUID \
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{ \
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0x30cfe3e7, 0x3de1, 0x4586, { 0xbe, 0x20, 0xde, 0xab, 0xa1, 0xb3, 0xb7, 0x93 } \
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}
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extern EFI_GUID gEfiPciEnumerationCompleteProtocolGuid;
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#endif
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@ -132,7 +132,14 @@ typedef enum {
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/// The resource allocation phase is completed. No specific action is required
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/// The resource allocation phase is completed. No specific action is required
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/// here. This notification can be used to perform any chipset specific programming.
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/// here. This notification can be used to perform any chipset specific programming.
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///
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///
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EfiPciHostBridgeEndResourceAllocation
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EfiPciHostBridgeEndResourceAllocation,
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///
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/// The Host Bridge Enumeration is completed. No specific action is required here.
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/// This notification can be used to perform any chipset specific programming.
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///
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EfiPciHostBridgeEndEnumeration,
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EfiMaxPciHostBridgeEnumerationPhase
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} EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE;
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} EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE;
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///
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///
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## Include/Protocol/PciOverride.h
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## Include/Protocol/PciOverride.h
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gEfiPciOverrideProtocolGuid = { 0xb5b35764, 0x460c, 0x4a06, {0x99, 0xfc, 0x77, 0xa1, 0x7c, 0x1b, 0x5c, 0xeb }}
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gEfiPciOverrideProtocolGuid = { 0xb5b35764, 0x460c, 0x4a06, {0x99, 0xfc, 0x77, 0xa1, 0x7c, 0x1b, 0x5c, 0xeb }}
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## Include/Protocol/PciEnumerationComplete.h
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gEfiPciEnumerationCompleteProtocolGuid = { 0x30cfe3e7, 0x3de1, 0x4586, {0xbe, 0x20, 0xde, 0xab, 0xa1, 0xb3, 0xb7, 0x93}}
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## Include/Protocol/IncompatiblePciDeviceSupport.h
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## Include/Protocol/IncompatiblePciDeviceSupport.h
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