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MdeModulePkg/SdMmcPciHcDxe: Remove clock stop from HS200 switch 

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2218

Stopping the SD clock before switching host controller
bus timing is only necessary if preset value enable is
set in host controller. Code that performs switch to
HS200 doesn't check this condition right now and we also
don't do the SD clock stop before any other bus timing switch
in host controller. Since the driver is generally not ready to support
host controller with preset value enable set we removed this
code.

Signed-off-by: Mateusz Albecki <mateusz.albecki@intel.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
Tested-by: Hao A Wu <hao.a.wu@intel.com>
Tested-by: Marcin Wojtas <mw@semihalf.com>
This commit is contained in:
Albecki, Mateusz 2019-09-26 22:27:42 +08:00 committed by Hao A Wu
parent e86664d2b0
commit 206783aa7f
1 changed files with 0 additions and 29 deletions
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29
MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/EmmcDevice.c
View File

@ -837,7 +837,6 @@ EmmcSwitchToHS200 (
) )
{ {
EFI_STATUS Status; EFI_STATUS Status;
UINT16 ClockCtrl;
SD_MMC_HC_PRIVATE_DATA *Private; SD_MMC_HC_PRIVATE_DATA *Private;
Private = SD_MMC_HC_PRIVATE_FROM_THIS (PassThru); Private = SD_MMC_HC_PRIVATE_FROM_THIS (PassThru);
@ -851,40 +850,12 @@ EmmcSwitchToHS200 (
if (EFI_ERROR (Status)) { if (EFI_ERROR (Status)) {
return Status; return Status;
} }
//
// Stop bus clock at first
//
Status = SdMmcHcStopClock (PciIo, Slot);
if (EFI_ERROR (Status)) {
return Status;
}
Status = SdMmcHcUhsSignaling (Private->ControllerHandle, PciIo, Slot, BusMode->BusTiming); Status = SdMmcHcUhsSignaling (Private->ControllerHandle, PciIo, Slot, BusMode->BusTiming);
if (EFI_ERROR (Status)) { if (EFI_ERROR (Status)) {
return Status; return Status;
} }
//
// Wait Internal Clock Stable in the Clock Control register to be 1 before set SD Clock Enable bit
//
Status = SdMmcHcWaitMmioSet (
PciIo,
Slot,
SD_MMC_HC_CLOCK_CTRL,
sizeof (ClockCtrl),
BIT1,
BIT1,
SD_MMC_HC_GENERIC_TIMEOUT
);
if (EFI_ERROR (Status)) {
return Status;
}
//
// Set SD Clock Enable in the Clock Control register to 1
//
ClockCtrl = BIT2;
Status = SdMmcHcOrMmio (PciIo, Slot, SD_MMC_HC_CLOCK_CTRL, sizeof (ClockCtrl), &ClockCtrl);
Status = EmmcSwitchBusTiming (PciIo, PassThru, Slot, Rca, BusMode->DriverStrength, BusMode->BusTiming, BusMode->ClockFreq); Status = EmmcSwitchBusTiming (PciIo, PassThru, Slot, Rca, BusMode->DriverStrength, BusMode->BusTiming, BusMode->ClockFreq);
if (EFI_ERROR (Status)) { if (EFI_ERROR (Status)) {
return Status; return Status;