CpuException: Avoid allocating code pages for DXE instance

Today the DXE instance allocates code page and then copies the IDT
vectors to the allocated code page. Then it fixes up the vector number
in the IDT vector.

But if we update the NASM file to generate 256 IDT vectors, there is
no need to do the copy and fix-up.

A side effect is 4096 bytes (HOOKAFTER_STUB_SIZE * 256) is used for
256 IDT vectors while 32 IDT vectors only require 512 bytes without
this change, in following library instances:
1. 32bit SecPeiCpuExceptionHandlerLib and PeiCpuExceptionHandlerLib
2. 64bit PeiCpuExceptionHandlerLib

But considering the code logic simplification, 3.5K extra space is
not a big deal.
If 3.5K is too much, we can enhance the code further to generate 32
vectors for above mentioned library instances.

Signed-off-by: Ray Ni <ray.ni@intel.com>
Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
Acked-by: Eric Dong <eric.dong@intel.com>

UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeException.c

@@ -95,9 +95,6 @@ InitializeCpuInterruptHandlers (
   IA32_DESCRIPTOR                 IdtDescriptor;
   UINTN                           IdtEntryCount;
   EXCEPTION_HANDLER_TEMPLATE_MAP  TemplateMap;
-  UINTN                           Index;
-  UINTN                           InterruptEntry;
-  UINT8                           *InterruptEntryCode;
   RESERVED_VECTORS_DATA           *ReservedVectors;
   EFI_CPU_INTERRUPT_HANDLER       *ExternalInterruptHandler;
 
@@ -138,25 +135,6 @@ InitializeCpuInterruptHandlers (
   AsmGetTemplateAddressMap (&TemplateMap);
   ASSERT (TemplateMap.ExceptionStubHeaderSize <= HOOKAFTER_STUB_SIZE);
 
-  Status = gBS->AllocatePool (
-                  EfiBootServicesCode,
-                  TemplateMap.ExceptionStubHeaderSize * CPU_INTERRUPT_NUM,
-                  (VOID **)&InterruptEntryCode
-                  );
-  ASSERT (!EFI_ERROR (Status) && InterruptEntryCode != NULL);
-
-  InterruptEntry = (UINTN)InterruptEntryCode;
-  for (Index = 0; Index < CPU_INTERRUPT_NUM; Index++) {
-    CopyMem (
-      (VOID *)InterruptEntry,
-      (VOID *)TemplateMap.ExceptionStart,
-      TemplateMap.ExceptionStubHeaderSize
-      );
-    AsmVectorNumFixup ((VOID *)InterruptEntry, (UINT8)Index, (VOID *)TemplateMap.ExceptionStart);
-    InterruptEntry += TemplateMap.ExceptionStubHeaderSize;
-  }
-
-  TemplateMap.ExceptionStart                     = (UINTN)InterruptEntryCode;
   mExceptionHandlerData.IdtEntryCount            = CPU_INTERRUPT_NUM;
   mExceptionHandlerData.ReservedVectors          = ReservedVectors;
   mExceptionHandlerData.ExternalInterruptHandler = ExternalInterruptHandler;

UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ExceptionHandlerAsm.nasm

@@ -33,7 +33,7 @@ ALIGN   8
 ;
 AsmIdtVectorBegin:
 %assign Vector 0
-%rep  32
+%rep  256
     push    byte %[Vector];
     push    eax
     mov     eax, ASM_PFX(CommonInterruptEntry)
@@ -439,7 +439,7 @@ ASM_PFX(AsmGetTemplateAddressMap):
 
     mov ebx, dword [ebp + 0x8]
     mov dword [ebx],      AsmIdtVectorBegin
-    mov dword [ebx + 0x4], (AsmIdtVectorEnd - AsmIdtVectorBegin) / 32
+    mov dword [ebx + 0x4], (AsmIdtVectorEnd - AsmIdtVectorBegin) / 256
     mov dword [ebx + 0x8], HookAfterStubBegin
 
     popad

UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.nasm

@@ -31,6 +31,8 @@ SECTION .text
 
 ALIGN   8
 
+; Generate 32 IDT vectors.
+; 32 IDT vectors are enough because interrupts (32+) are not enabled in SEC and PEI phase.
 AsmIdtVectorBegin:
 %assign Vector 0
 %rep  32

UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/Xcode5ExceptionHandlerAsm.nasm

@@ -53,9 +53,10 @@ SECTION .text
 
 ALIGN   8
 
+; Generate 256 IDT vectors.
 AsmIdtVectorBegin:
 %assign Vector 0
-%rep  32
+%rep  256
     push    byte %[Vector]
     push    rax
     mov     rax, strict qword 0 ;    mov     rax, ASM_PFX(CommonInterruptEntry)
@@ -453,16 +454,16 @@ global ASM_PFX(AsmGetTemplateAddressMap)
 ASM_PFX(AsmGetTemplateAddressMap):
     lea     rax, [AsmIdtVectorBegin]
     mov     qword [rcx], rax
-    mov     qword [rcx + 0x8],  (AsmIdtVectorEnd - AsmIdtVectorBegin) / 32
+    mov     qword [rcx + 0x8],  (AsmIdtVectorEnd - AsmIdtVectorBegin) / 256
     lea     rax, [HookAfterStubHeaderBegin]
     mov     qword [rcx + 0x10], rax
 
 ; Fix up CommonInterruptEntry address
     lea    rax, [ASM_PFX(CommonInterruptEntry)]
     lea    rcx, [AsmIdtVectorBegin]
-%rep  32
+%rep  256
     mov    qword [rcx + (JmpAbsoluteAddress - 8 - HookAfterStubHeaderBegin)], rax
-    add    rcx, (AsmIdtVectorEnd - AsmIdtVectorBegin) / 32
+    add    rcx, (AsmIdtVectorEnd - AsmIdtVectorBegin) / 256
 %endrep
 ; Fix up HookAfterStubHeaderEnd
     lea    rax, [HookAfterStubHeaderEnd]