mirror of https://github.com/acidanthera/audk.git
Ring3: Removed gEfiHobPageTableInfoGuid.
This commit is contained in:
parent
a2023f569a
commit
23196bbf18
MdeModulePkg/Core
MdePkg
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@ -150,7 +150,6 @@
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gUefiImageLoaderImageContextGuid ## CONSUMES ## HOB
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gEfiGlobalVariableGuid ## SOMETIMES_CONSUMES ## SysCall
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gEarlyPL011BaseAddressGuid ## CONSUMES
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gEfiHobPageTableInfoGuid ## CONSUMES ## HOB
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[Ppis]
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gEfiVectorHandoffInfoPpiGuid ## UNDEFINED # HOB
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@ -223,9 +222,14 @@
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gEfiMdeModulePkgTokenSpaceGuid.PcdEnableUserSpace ## CONSUMES
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gEfiMdePkgTokenSpaceGuid.PcdDebugRaisePropertyMask ## CONSUMES
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gEfiMdePkgTokenSpaceGuid.PcdImageProtectionPolicy ## CONSUMES
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gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio ## CONSUMES
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[Pcd.IA32,Pcd.X64]
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gEfiMdeModulePkgTokenSpaceGuid.PcdUse1GPageTable ## SOMETIMES_CONSUMES
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gEfiMdeModulePkgTokenSpaceGuid.PcdUse5LevelPageTable ## SOMETIMES_CONSUMES
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gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrMask ## CONSUMES
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfWorkAreaBase ## CONSUMES
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfWorkAreaSize ## CONSUMES
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gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseMmio ## CONSUMES
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# [Hob]
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# RESOURCE_DESCRIPTOR ## CONSUMES
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@ -8,6 +8,7 @@
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#include "DxeMain.h"
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#include <Register/Intel/ArchitecturalMsr.h>
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#include <Register/Intel/Cpuid.h>
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#include <IndustryStandard/PageTable.h>
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VOID
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@ -17,30 +18,144 @@ MakeUserPageTableTemplate (
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OUT UINTN *UserPageTableTemplateSize
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)
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{
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EFI_HOB_GUID_TYPE *GuidHob;
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EFI_PAGE_TABLE_INFO *PageTableInfo;
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UINTN BigPageAddress;
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EFI_PHYSICAL_ADDRESS PageAddress;
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UINTN IndexOfPml5Entries;
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UINTN IndexOfPml4Entries;
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UINTN IndexOfPdpEntries;
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UINTN IndexOfPageDirectoryEntries;
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PAGE_MAP_AND_DIRECTORY_POINTER *PageMapLevel5Entry;
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PAGE_MAP_AND_DIRECTORY_POINTER *PageMapLevel4Entry;
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PAGE_MAP_AND_DIRECTORY_POINTER *PageMap;
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PAGE_MAP_AND_DIRECTORY_POINTER *PageDirectoryPointerEntry;
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PAGE_TABLE_ENTRY *PageDirectoryEntry;
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PAGE_TABLE_1G_ENTRY *PageDirectory1GEntry;
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UINT32 RegEax;
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CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_ECX EcxFlags;
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UINT32 RegEdx;
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UINT8 PhysicalAddressBits;
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UINT32 NumberOfPml5EntriesNeeded;
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UINT32 NumberOfPml4EntriesNeeded;
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UINT32 NumberOfPdpEntriesNeeded;
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VOID *Hob;
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BOOLEAN Page5LevelEnabled;
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BOOLEAN Page1GSupport;
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UINT64 AddressEncMask;
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IA32_CR4 Cr4;
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UINTN TotalPagesNum;
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UINTN BigPageAddress;
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EFI_PHYSICAL_ADDRESS PageAddress;
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UINTN IndexOfPml5Entries;
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UINTN IndexOfPml4Entries;
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UINTN IndexOfPdpEntries;
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UINTN IndexOfPageDirectoryEntries;
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PAGE_MAP_AND_DIRECTORY_POINTER *PageMapLevel5Entry;
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PAGE_MAP_AND_DIRECTORY_POINTER *PageMapLevel4Entry;
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PAGE_MAP_AND_DIRECTORY_POINTER *PageMap;
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PAGE_MAP_AND_DIRECTORY_POINTER *PageDirectoryPointerEntry;
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PAGE_TABLE_ENTRY *PageDirectoryEntry;
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PAGE_TABLE_1G_ENTRY *PageDirectory1GEntry;
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GuidHob = GetFirstGuidHob (&gEfiHobPageTableInfoGuid);
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if (GuidHob == NULL) {
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DEBUG ((DEBUG_ERROR, "Core: Could not retrieve PageTableInfo HOB.\n"));
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CpuDeadLoop ();
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//
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// Set PageMapLevel5Entry to suppress incorrect compiler/analyzer warnings
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//
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PageMapLevel5Entry = NULL;
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//
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// Make sure AddressEncMask is contained to smallest supported address field
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//
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AddressEncMask = PcdGet64 (PcdPteMemoryEncryptionAddressOrMask) & PAGING_1G_ADDRESS_MASK_64;
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Page1GSupport = FALSE;
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if (PcdGetBool (PcdUse1GPageTable)) {
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AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
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if (RegEax >= 0x80000001) {
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AsmCpuid (0x80000001, NULL, NULL, NULL, &RegEdx);
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if ((RegEdx & BIT26) != 0) {
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Page1GSupport = TRUE;
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}
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}
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}
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PageTableInfo = (EFI_PAGE_TABLE_INFO *)(GET_GUID_HOB_DATA (GuidHob));
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//
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// Get physical address bits supported.
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//
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Hob = GetFirstHob (EFI_HOB_TYPE_CPU);
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if (Hob != NULL) {
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PhysicalAddressBits = ((EFI_HOB_CPU *)Hob)->SizeOfMemorySpace;
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} else {
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AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
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if (RegEax >= 0x80000008) {
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AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);
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PhysicalAddressBits = (UINT8)RegEax;
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} else {
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PhysicalAddressBits = 36;
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}
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}
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BigPageAddress = (UINTN)AllocateAlignedPages (PageTableInfo->TotalPagesNum, PAGE_TABLE_POOL_ALIGNMENT);
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if (sizeof (UINTN) == sizeof (UINT64)) {
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//
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// If cpu has already run in 64bit long mode PEI, Page table Level in DXE must align with previous level.
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//
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Cr4.UintN = AsmReadCr4 ();
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Page5LevelEnabled = (Cr4.Bits.LA57 != 0);
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if (Page5LevelEnabled) {
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ASSERT (PcdGetBool (PcdUse5LevelPageTable));
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}
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} else {
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//
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// If cpu runs in 32bit protected mode PEI, Page table Level in DXE is decided by PCD and feature capability.
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//
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Page5LevelEnabled = FALSE;
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if (PcdGetBool (PcdUse5LevelPageTable)) {
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AsmCpuidEx (
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CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS,
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CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_SUB_LEAF_INFO,
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NULL,
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NULL,
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&EcxFlags.Uint32,
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NULL
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);
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if (EcxFlags.Bits.FiveLevelPage != 0) {
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Page5LevelEnabled = TRUE;
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}
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}
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}
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//
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// IA-32e paging translates 48-bit linear addresses to 52-bit physical addresses
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// when 5-Level Paging is disabled,
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// due to either unsupported by HW, or disabled by PCD.
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//
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ASSERT (PhysicalAddressBits <= 52);
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if (!Page5LevelEnabled && (PhysicalAddressBits > 48)) {
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PhysicalAddressBits = 48;
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}
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//
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// Calculate the table entries needed.
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//
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NumberOfPml5EntriesNeeded = 1;
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if (PhysicalAddressBits > 48) {
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NumberOfPml5EntriesNeeded = (UINT32)LShiftU64 (1, PhysicalAddressBits - 48);
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PhysicalAddressBits = 48;
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}
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NumberOfPml4EntriesNeeded = 1;
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if (PhysicalAddressBits > 39) {
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NumberOfPml4EntriesNeeded = (UINT32)LShiftU64 (1, PhysicalAddressBits - 39);
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PhysicalAddressBits = 39;
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}
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NumberOfPdpEntriesNeeded = 1;
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ASSERT (PhysicalAddressBits > 30);
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NumberOfPdpEntriesNeeded = (UINT32)LShiftU64 (1, PhysicalAddressBits - 30);
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//
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// Pre-allocate big pages to avoid later allocations.
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//
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if (!Page1GSupport) {
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TotalPagesNum = ((NumberOfPdpEntriesNeeded + 1) * NumberOfPml4EntriesNeeded + 1) * NumberOfPml5EntriesNeeded + 1;
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} else {
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TotalPagesNum = (NumberOfPml4EntriesNeeded + 1) * NumberOfPml5EntriesNeeded + 1;
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}
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//
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// Substract the one page occupied by PML5 entries if 5-Level Paging is disabled.
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//
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if (!Page5LevelEnabled) {
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TotalPagesNum--;
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}
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BigPageAddress = (UINTN)AllocateAlignedPages (TotalPagesNum, PAGE_TABLE_POOL_ALIGNMENT);
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if (BigPageAddress == 0) {
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DEBUG ((DEBUG_ERROR, "Core: Could not allocate buffer for User page table.\n"));
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CpuDeadLoop ();
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@ -50,7 +165,7 @@ MakeUserPageTableTemplate (
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// By architecture only one PageMapLevel4 exists - so lets allocate storage for it.
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//
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PageMap = (VOID *)BigPageAddress;
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if (PageTableInfo->Page5LevelEnabled) {
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if (Page5LevelEnabled) {
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//
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// By architecture only one PageMapLevel5 exists - so lets allocate storage for it.
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//
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@ -61,7 +176,7 @@ MakeUserPageTableTemplate (
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PageAddress = 0;
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for ( IndexOfPml5Entries = 0
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; IndexOfPml5Entries < PageTableInfo->NumberOfPml5EntriesNeeded
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; IndexOfPml5Entries < NumberOfPml5EntriesNeeded
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; IndexOfPml5Entries++)
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{
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//
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@ -72,11 +187,11 @@ MakeUserPageTableTemplate (
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PageMapLevel4Entry = (VOID *)BigPageAddress;
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BigPageAddress += SIZE_4KB;
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if (PageTableInfo->Page5LevelEnabled) {
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if (Page5LevelEnabled) {
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//
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// Make a PML5 Entry
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//
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PageMapLevel5Entry->Uint64 = (UINT64)(UINTN)PageMapLevel4Entry | PageTableInfo->AddressEncMask;
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PageMapLevel5Entry->Uint64 = (UINT64)(UINTN)PageMapLevel4Entry | AddressEncMask;
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PageMapLevel5Entry->Bits.ReadWrite = 1;
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PageMapLevel5Entry->Bits.UserSupervisor = 1;
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PageMapLevel5Entry->Bits.Present = 1;
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@ -84,7 +199,7 @@ MakeUserPageTableTemplate (
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}
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for ( IndexOfPml4Entries = 0
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; IndexOfPml4Entries < (PageTableInfo->NumberOfPml5EntriesNeeded == 1 ? PageTableInfo->NumberOfPml4EntriesNeeded : 512)
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; IndexOfPml4Entries < (NumberOfPml5EntriesNeeded == 1 ? NumberOfPml4EntriesNeeded : 512)
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; IndexOfPml4Entries++, PageMapLevel4Entry++)
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{
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//
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@ -97,26 +212,26 @@ MakeUserPageTableTemplate (
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//
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// Make a PML4 Entry
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//
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PageMapLevel4Entry->Uint64 = (UINT64)(UINTN)PageDirectoryPointerEntry | PageTableInfo->AddressEncMask;
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PageMapLevel4Entry->Uint64 = (UINT64)(UINTN)PageDirectoryPointerEntry | AddressEncMask;
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PageMapLevel4Entry->Bits.ReadWrite = 1;
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PageMapLevel4Entry->Bits.UserSupervisor = 1;
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PageMapLevel4Entry->Bits.Present = 1;
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if (PageTableInfo->Page1GSupport) {
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if (Page1GSupport) {
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PageDirectory1GEntry = (VOID *)PageDirectoryPointerEntry;
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for (IndexOfPageDirectoryEntries = 0; IndexOfPageDirectoryEntries < 512; IndexOfPageDirectoryEntries++, PageDirectory1GEntry++, PageAddress += SIZE_1GB) {
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//
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// Fill in the Page Directory entries
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//
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PageDirectory1GEntry->Uint64 = (UINT64)PageAddress | PageTableInfo->AddressEncMask;
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PageDirectory1GEntry->Uint64 = (UINT64)PageAddress | AddressEncMask;
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PageDirectory1GEntry->Bits.ReadWrite = 1;
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PageDirectory1GEntry->Bits.Present = 0;
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PageDirectory1GEntry->Bits.MustBe1 = 1;
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}
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} else {
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for ( IndexOfPdpEntries = 0
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; IndexOfPdpEntries < (PageTableInfo->NumberOfPml4EntriesNeeded == 1 ? PageTableInfo->NumberOfPdpEntriesNeeded : 512)
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; IndexOfPdpEntries < (NumberOfPml4EntriesNeeded == 1 ? NumberOfPdpEntriesNeeded : 512)
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; IndexOfPdpEntries++, PageDirectoryPointerEntry++)
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{
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//
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@ -129,7 +244,7 @@ MakeUserPageTableTemplate (
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//
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// Fill in a Page Directory Pointer Entries
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//
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PageDirectoryPointerEntry->Uint64 = (UINT64)(UINTN)PageDirectoryEntry | PageTableInfo->AddressEncMask;
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PageDirectoryPointerEntry->Uint64 = (UINT64)(UINTN)PageDirectoryEntry | AddressEncMask;
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PageDirectoryPointerEntry->Bits.ReadWrite = 1;
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PageDirectoryPointerEntry->Bits.UserSupervisor = 1;
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PageDirectoryPointerEntry->Bits.Present = 1;
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@ -138,7 +253,7 @@ MakeUserPageTableTemplate (
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//
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// Fill in the Page Directory entries
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//
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PageDirectoryEntry->Uint64 = (UINT64)PageAddress | PageTableInfo->AddressEncMask;
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PageDirectoryEntry->Uint64 = (UINT64)PageAddress | AddressEncMask;
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PageDirectoryEntry->Bits.ReadWrite = 1;
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PageDirectoryEntry->Bits.Present = 0;
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PageDirectoryEntry->Bits.MustBe1 = 1;
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@ -158,7 +273,7 @@ MakeUserPageTableTemplate (
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ZeroMem (PageMapLevel4Entry, (512 - IndexOfPml4Entries) * sizeof (PAGE_MAP_AND_DIRECTORY_POINTER));
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}
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if (PageTableInfo->Page5LevelEnabled) {
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if (Page5LevelEnabled) {
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//
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// For the PML5 entries we are not using fill in a null entry.
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//
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@ -166,7 +281,7 @@ MakeUserPageTableTemplate (
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}
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*UserPageTableTemplate = (VOID *)PageMap;
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*UserPageTableTemplateSize = ALIGN_VALUE (EFI_PAGES_TO_SIZE (PageTableInfo->TotalPagesNum), PAGE_TABLE_POOL_ALIGNMENT);
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*UserPageTableTemplateSize = ALIGN_VALUE (EFI_PAGES_TO_SIZE (TotalPagesNum), PAGE_TABLE_POOL_ALIGNMENT);
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SetUefiImageMemoryAttributes ((UINT64)PageMap, *UserPageTableTemplateSize, EFI_MEMORY_XP);
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}
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@ -90,7 +90,6 @@
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## SOMETIMES_PRODUCES ## HOB
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gEfiMemoryTypeInformationGuid
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gUefiImageLoaderImageContextGuid
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gEfiHobPageTableInfoGuid
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[FeaturePcd.IA32]
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gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSwitchToLongMode ## CONSUMES
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@ -705,7 +705,6 @@ CreateIdentityMappingPageTables (
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PAGE_TABLE_1G_ENTRY *PageDirectory1GEntry;
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UINT64 AddressEncMask;
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IA32_CR4 Cr4;
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EFI_PAGE_TABLE_INFO PageTableInfo;
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//
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// Set PageMapLevel5Entry to suppress incorrect compiler/analyzer warnings
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@ -829,16 +828,6 @@ CreateIdentityMappingPageTables (
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(UINT64)TotalPagesNum
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));
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PageTableInfo.NumberOfPml5EntriesNeeded = NumberOfPml5EntriesNeeded;
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PageTableInfo.NumberOfPml4EntriesNeeded = NumberOfPml4EntriesNeeded;
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PageTableInfo.NumberOfPdpEntriesNeeded = NumberOfPdpEntriesNeeded;
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PageTableInfo.TotalPagesNum = TotalPagesNum;
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PageTableInfo.Page5LevelEnabled = Page5LevelEnabled;
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PageTableInfo.Page1GSupport = Page1GSupport;
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PageTableInfo.AddressEncMask = AddressEncMask;
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BuildGuidDataHob (&gEfiHobPageTableInfoGuid, &PageTableInfo, sizeof (EFI_PAGE_TABLE_INFO));
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BigPageAddress = (UINTN)AllocatePageTableMemory (TotalPagesNum);
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ASSERT (BigPageAddress != 0);
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@ -21,12 +21,8 @@
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#define EFI_HOB_MEMORY_ALLOC_MODULE_GUID \
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{0xf8e21975, 0x899, 0x4f58, {0xa4, 0xbe, 0x55, 0x25, 0xa9, 0xc6, 0xd7, 0x7a} }
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#define EFI_HOB_PAGE_TABLE_INFO_GUID \
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{0xac992fe9, 0xb0cc, 0x45df, {0xae, 0xcf, 0x51, 0x5a, 0xd2, 0xc4, 0xe8, 0xb3} }
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extern EFI_GUID gEfiHobMemoryAllocBspStoreGuid;
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extern EFI_GUID gEfiHobMemoryAllocStackGuid;
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extern EFI_GUID gEfiHobMemoryAllocModuleGuid;
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extern EFI_GUID gEfiHobPageTableInfoGuid;
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#endif
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@ -14,16 +14,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
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#ifndef __MEMORY_ALLOCATION_LIB_H__
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#define __MEMORY_ALLOCATION_LIB_H__
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typedef struct {
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UINT32 NumberOfPml5EntriesNeeded;
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UINT32 NumberOfPml4EntriesNeeded;
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UINT32 NumberOfPdpEntriesNeeded;
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UINTN TotalPagesNum;
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BOOLEAN Page5LevelEnabled;
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BOOLEAN Page1GSupport;
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UINT64 AddressEncMask;
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} EFI_PAGE_TABLE_INFO;
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/**
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Allocates one or more 4KB pages of type EfiBootServicesData.
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@ -781,9 +781,6 @@
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## Include/Guid/MemoryAllocationHob.h
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gEfiHobMemoryAllocBspStoreGuid = { 0x564B33CD, 0xC92A, 0x4593, { 0x90, 0xBF, 0x24, 0x73, 0xE4, 0x3C, 0x63, 0x22 }}
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## Include/Guid/MemoryAllocationHob.h
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gEfiHobPageTableInfoGuid = { 0xAC992FE9, 0xB0CC, 0x45DF, { 0xAE, 0xCF, 0x51, 0x5A, 0xD2, 0xC4, 0xE8, 0xB3 }}
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## Include/Guid/EventLegacyBios.h
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gEfiEventLegacyBootGuid = { 0x2A571201, 0x4966, 0x47F6, { 0x8B, 0x86, 0xF3, 0x1E, 0x41, 0xF3, 0x2F, 0x10 }}
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