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UefiCpuPkg/PiSmmCpuDxeSmm: Move GetAcpiS3EnableFlag into DxeSmm code

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MM can not use the dynamic PCD, so, Move GetAcpiS3EnableFlag into
DxeSmm code. This can make PiSmmCpuEntryCommon to be a function
for SMM and MM.

Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Dun Tan <dun.tan@intel.com>
Cc: Hongbin1 Zhang <hongbin1.zhang@intel.com>
Cc: Wei6 Xu <wei6.xu@intel.com>
Cc: Yuanhao Xie <yuanhao.xie@intel.com>
This commit is contained in:
Jiaxin Wu 2024-06-25 00:18:14 +08:00 committed by mergify[bot]
parent 5547d1487c
commit 23c5ee6e23
3 changed files with 13 additions and 12 deletions
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12
UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
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@ -248,15 +248,3 @@ InitSmmS3ResumeState (
InitSmmS3Cr3 ((UINTN *)&SmmS3ResumeState->SmmS3Cr3); InitSmmS3Cr3 ((UINTN *)&SmmS3ResumeState->SmmS3Cr3);
} }
} }
/**
Get ACPI S3 enable flag.
**/
VOID
GetAcpiS3EnableFlag (
VOID
)
{
mAcpiS3Enable = PcdGetBool (PcdAcpiS3Enable);
}

1
UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuCommon.h
View File

@ -269,6 +269,7 @@ extern UINT8 mSmmSaveStateRegisterLma;
extern BOOLEAN mBtsSupported; extern BOOLEAN mBtsSupported;
extern UINTN mMsrDsAreaSize; extern UINTN mMsrDsAreaSize;
extern BOOLEAN mAcpiS3Enable;
#define PAGE_TABLE_POOL_ALIGNMENT BASE_128KB #define PAGE_TABLE_POOL_ALIGNMENT BASE_128KB
#define PAGE_TABLE_POOL_UNIT_SIZE BASE_128KB #define PAGE_TABLE_POOL_UNIT_SIZE BASE_128KB

12
UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
View File

@ -11,6 +11,18 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
#include "PiSmmCpuCommon.h" #include "PiSmmCpuCommon.h"
/**
Get ACPI S3 enable flag.
**/
VOID
GetAcpiS3EnableFlag (
VOID
)
{
mAcpiS3Enable = PcdGetBool (PcdAcpiS3Enable);
}
/** /**
Extract NumberOfCpus, MaxNumberOfCpus and EFI_PROCESSOR_INFORMATION for all CPU from gEfiMpServiceProtocolGuid. Extract NumberOfCpus, MaxNumberOfCpus and EFI_PROCESSOR_INFORMATION for all CPU from gEfiMpServiceProtocolGuid.