mirror of https://github.com/acidanthera/audk.git
ShellPkg: fix typo.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Bobzin (jeff.bobzin@insyde.com) Signed-off-by: Jaben Carsey <jaben.carsey@intel.com> Reviewed-by: Erik Bjorge <erik.c.bjorge@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15696 6f19259b-4bc3-4df7-8a09-765794883524
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@ -1662,7 +1662,7 @@ PciExplainPciExpress (
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**/
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EFI_STATUS
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ExplainPcieCapReg (
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IN PCIE_CAP_STURCTURE *PciExpressCap
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IN PCIE_CAP_STRUCTURE *PciExpressCap
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);
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/**
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@ -1674,7 +1674,7 @@ ExplainPcieCapReg (
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**/
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EFI_STATUS
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ExplainPcieDeviceCap (
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IN PCIE_CAP_STURCTURE *PciExpressCap
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IN PCIE_CAP_STRUCTURE *PciExpressCap
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);
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/**
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@ -1686,7 +1686,7 @@ ExplainPcieDeviceCap (
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**/
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EFI_STATUS
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ExplainPcieDeviceControl (
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IN PCIE_CAP_STURCTURE *PciExpressCap
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IN PCIE_CAP_STRUCTURE *PciExpressCap
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);
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/**
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@ -1698,7 +1698,7 @@ ExplainPcieDeviceControl (
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**/
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EFI_STATUS
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ExplainPcieDeviceStatus (
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IN PCIE_CAP_STURCTURE *PciExpressCap
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IN PCIE_CAP_STRUCTURE *PciExpressCap
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);
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/**
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@ -1710,7 +1710,7 @@ ExplainPcieDeviceStatus (
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**/
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EFI_STATUS
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ExplainPcieLinkCap (
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IN PCIE_CAP_STURCTURE *PciExpressCap
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IN PCIE_CAP_STRUCTURE *PciExpressCap
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);
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/**
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@ -1722,7 +1722,7 @@ ExplainPcieLinkCap (
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**/
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EFI_STATUS
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ExplainPcieLinkControl (
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IN PCIE_CAP_STURCTURE *PciExpressCap
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IN PCIE_CAP_STRUCTURE *PciExpressCap
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);
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/**
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@ -1734,7 +1734,7 @@ ExplainPcieLinkControl (
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**/
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EFI_STATUS
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ExplainPcieLinkStatus (
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IN PCIE_CAP_STURCTURE *PciExpressCap
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IN PCIE_CAP_STRUCTURE *PciExpressCap
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);
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/**
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@ -1746,7 +1746,7 @@ ExplainPcieLinkStatus (
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**/
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EFI_STATUS
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ExplainPcieSlotCap (
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IN PCIE_CAP_STURCTURE *PciExpressCap
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IN PCIE_CAP_STRUCTURE *PciExpressCap
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);
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/**
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@ -1758,7 +1758,7 @@ ExplainPcieSlotCap (
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**/
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EFI_STATUS
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ExplainPcieSlotControl (
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IN PCIE_CAP_STURCTURE *PciExpressCap
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IN PCIE_CAP_STRUCTURE *PciExpressCap
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);
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/**
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@ -1770,7 +1770,7 @@ ExplainPcieSlotControl (
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**/
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EFI_STATUS
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ExplainPcieSlotStatus (
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IN PCIE_CAP_STURCTURE *PciExpressCap
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IN PCIE_CAP_STRUCTURE *PciExpressCap
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);
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/**
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@ -1782,7 +1782,7 @@ ExplainPcieSlotStatus (
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**/
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EFI_STATUS
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ExplainPcieRootControl (
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IN PCIE_CAP_STURCTURE *PciExpressCap
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IN PCIE_CAP_STRUCTURE *PciExpressCap
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);
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/**
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@ -1794,7 +1794,7 @@ ExplainPcieRootControl (
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**/
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EFI_STATUS
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ExplainPcieRootCap (
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IN PCIE_CAP_STURCTURE *PciExpressCap
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IN PCIE_CAP_STRUCTURE *PciExpressCap
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);
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/**
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@ -1806,10 +1806,10 @@ ExplainPcieRootCap (
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**/
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EFI_STATUS
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ExplainPcieRootStatus (
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IN PCIE_CAP_STURCTURE *PciExpressCap
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IN PCIE_CAP_STRUCTURE *PciExpressCap
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);
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typedef EFI_STATUS (*PCIE_EXPLAIN_FUNCTION) (IN PCIE_CAP_STURCTURE *PciExpressCap);
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typedef EFI_STATUS (*PCIE_EXPLAIN_FUNCTION) (IN PCIE_CAP_STRUCTURE *PciExpressCap);
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typedef enum {
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FieldWidthUINT8,
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@ -3853,7 +3853,7 @@ PciExplainCapabilityStruct (
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**/
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EFI_STATUS
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ExplainPcieCapReg (
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IN PCIE_CAP_STURCTURE *PciExpressCap
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IN PCIE_CAP_STRUCTURE *PciExpressCap
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)
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{
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UINT16 PcieCapReg;
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@ -3901,7 +3901,7 @@ ExplainPcieCapReg (
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**/
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EFI_STATUS
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ExplainPcieDeviceCap (
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IN PCIE_CAP_STURCTURE *PciExpressCap
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IN PCIE_CAP_STRUCTURE *PciExpressCap
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)
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{
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UINT16 PcieCapReg;
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@ -3990,7 +3990,7 @@ ExplainPcieDeviceCap (
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**/
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EFI_STATUS
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ExplainPcieDeviceControl (
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IN PCIE_CAP_STURCTURE *PciExpressCap
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IN PCIE_CAP_STRUCTURE *PciExpressCap
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)
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{
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UINT16 PcieCapReg;
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@ -4067,7 +4067,7 @@ ExplainPcieDeviceControl (
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**/
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EFI_STATUS
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ExplainPcieDeviceStatus (
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IN PCIE_CAP_STURCTURE *PciExpressCap
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IN PCIE_CAP_STRUCTURE *PciExpressCap
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)
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{
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UINT16 PcieDeviceStatus;
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@ -4109,7 +4109,7 @@ ExplainPcieDeviceStatus (
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**/
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EFI_STATUS
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ExplainPcieLinkCap (
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IN PCIE_CAP_STURCTURE *PciExpressCap
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IN PCIE_CAP_STRUCTURE *PciExpressCap
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)
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{
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UINT32 PcieLinkCap;
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@ -4200,7 +4200,7 @@ ExplainPcieLinkCap (
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**/
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EFI_STATUS
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ExplainPcieLinkControl (
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IN PCIE_CAP_STURCTURE *PciExpressCap
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IN PCIE_CAP_STRUCTURE *PciExpressCap
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)
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{
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UINT16 PcieLinkControl;
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@ -4271,7 +4271,7 @@ ExplainPcieLinkControl (
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**/
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EFI_STATUS
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ExplainPcieLinkStatus (
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IN PCIE_CAP_STURCTURE *PciExpressCap
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IN PCIE_CAP_STRUCTURE *PciExpressCap
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)
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{
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UINT16 PcieLinkStatus;
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@ -4332,7 +4332,7 @@ ExplainPcieLinkStatus (
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**/
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EFI_STATUS
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ExplainPcieSlotCap (
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IN PCIE_CAP_STURCTURE *PciExpressCap
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IN PCIE_CAP_STRUCTURE *PciExpressCap
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)
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{
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UINT32 PcieSlotCap;
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@ -4400,7 +4400,7 @@ ExplainPcieSlotCap (
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**/
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EFI_STATUS
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ExplainPcieSlotControl (
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IN PCIE_CAP_STURCTURE *PciExpressCap
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IN PCIE_CAP_STRUCTURE *PciExpressCap
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)
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{
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UINT16 PcieSlotControl;
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@ -4464,7 +4464,7 @@ ExplainPcieSlotControl (
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**/
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EFI_STATUS
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ExplainPcieSlotStatus (
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IN PCIE_CAP_STURCTURE *PciExpressCap
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IN PCIE_CAP_STRUCTURE *PciExpressCap
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)
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{
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UINT16 PcieSlotStatus;
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@ -4525,7 +4525,7 @@ ExplainPcieSlotStatus (
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**/
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EFI_STATUS
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ExplainPcieRootControl (
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IN PCIE_CAP_STURCTURE *PciExpressCap
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IN PCIE_CAP_STRUCTURE *PciExpressCap
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)
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{
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UINT16 PcieRootControl;
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@ -4565,7 +4565,7 @@ ExplainPcieRootControl (
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**/
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EFI_STATUS
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ExplainPcieRootCap (
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IN PCIE_CAP_STURCTURE *PciExpressCap
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IN PCIE_CAP_STRUCTURE *PciExpressCap
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)
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{
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UINT16 PcieRootCap;
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@ -4589,7 +4589,7 @@ ExplainPcieRootCap (
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**/
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EFI_STATUS
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ExplainPcieRootStatus (
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IN PCIE_CAP_STURCTURE *PciExpressCap
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IN PCIE_CAP_STRUCTURE *PciExpressCap
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)
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{
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UINT32 PcieRootStatus;
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@ -5062,7 +5062,7 @@ EFIAPI
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PrintInterpretedExtendedCompatibilityMulticast (
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IN CONST PCI_EXP_EXT_HDR *HeaderAddress,
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IN CONST PCI_EXP_EXT_HDR *HeadersBaseAddress,
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IN CONST PCIE_CAP_STURCTURE *PciExpressCapPtr
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IN CONST PCIE_CAP_STRUCTURE *PciExpressCapPtr
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)
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{
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CONST PCI_EXPRESS_EXTENDED_CAPABILITIES_MULTICAST *Header;
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@ -5234,7 +5234,7 @@ EFIAPI
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PrintInterpretedExtendedCompatibilitySecondary (
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IN CONST PCI_EXP_EXT_HDR *HeaderAddress,
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IN CONST PCI_EXP_EXT_HDR *HeadersBaseAddress,
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IN CONST PCIE_CAP_STURCTURE *PciExpressCapPtr
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IN CONST PCIE_CAP_STRUCTURE *PciExpressCapPtr
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)
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{
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CONST PCI_EXPRESS_EXTENDED_CAPABILITIES_SECONDARY_PCIE *Header;
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@ -5276,7 +5276,7 @@ EFIAPI
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PrintPciExtendedCapabilityDetails(
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IN CONST PCI_EXP_EXT_HDR *HeadersBaseAddress,
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IN CONST PCI_EXP_EXT_HDR *HeaderAddress,
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IN CONST PCIE_CAP_STURCTURE *PciExpressCapPtr
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IN CONST PCIE_CAP_STRUCTURE *PciExpressCapPtr
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)
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{
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switch (HeaderAddress->CapabilityId){
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@ -5346,7 +5346,7 @@ PciExplainPciExpress (
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)
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{
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PCIE_CAP_STURCTURE PciExpressCap;
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PCIE_CAP_STRUCTURE PciExpressCap;
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EFI_STATUS Status;
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UINT64 CapRegAddress;
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UINT8 Bus;
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@ -453,10 +453,10 @@ typedef struct {
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UINT32 SlotCap;
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UINT16 SlotControl;
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UINT16 SlotStatus;
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UINT16 RsvdP;
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UINT16 RootControl;
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UINT16 RsvdP;
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UINT32 RootStatus;
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} PCIE_CAP_STURCTURE;
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} PCIE_CAP_STRUCTURE;
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#pragma pack()
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