mirror of https://github.com/acidanthera/audk.git
OvmfPkg/XenPlatformPei: Rework memory detection
When running as a Xen PVH guest, there is no CMOS to read the memory size from. Rework GetSystemMemorySize(Below|Above)4gb() so they can work without CMOS by reading the e820 table. Rework XenPublishRamRegions to also care for the reserved and ACPI entry in the e820 table. The region that was added by InitializeXen() isn't needed as that same entry is in the e820 table provided by hvmloader. MTRR settings aren't modified anymore, on HVM it's already done by hvmloader, on PVH it is supposed to have sane default. MTRR will need to be done properly but keeping what's already been done by programs that have run before OVMF will do for now. Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1689 Signed-off-by: Anthony PERARD <anthony.perard@citrix.com> Acked-by: Laszlo Ersek <lersek@redhat.com> Message-Id: <20190813113119.14804-24-anthony.perard@citrix.com>
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@ -96,6 +96,45 @@ Q35TsegMbytesInitialization (
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mQ35TsegMbytes = ExtendedTsegMbytes;
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}
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STATIC
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UINT64
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GetHighestSystemMemoryAddress (
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BOOLEAN Below4gb
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)
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{
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EFI_E820_ENTRY64 *E820Map;
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UINT32 E820EntriesCount;
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EFI_E820_ENTRY64 *Entry;
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EFI_STATUS Status;
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UINT32 Loop;
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UINT64 HighestAddress;
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UINT64 EntryEnd;
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HighestAddress = 0;
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Status = XenGetE820Map (&E820Map, &E820EntriesCount);
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ASSERT_EFI_ERROR (Status);
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for (Loop = 0; Loop < E820EntriesCount; Loop++) {
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Entry = E820Map + Loop;
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EntryEnd = Entry->BaseAddr + Entry->Length;
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if (Entry->Type == EfiAcpiAddressRangeMemory &&
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EntryEnd > HighestAddress) {
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if (Below4gb && (EntryEnd <= BASE_4GB)) {
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HighestAddress = EntryEnd;
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} else if (!Below4gb && (EntryEnd >= BASE_4GB)) {
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HighestAddress = EntryEnd;
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}
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}
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}
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//
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// Round down the end address.
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//
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return HighestAddress & ~(UINT64)EFI_PAGE_MASK;
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}
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UINT32
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GetSystemMemorySizeBelow4gb (
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@ -105,6 +144,19 @@ GetSystemMemorySizeBelow4gb (
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UINT8 Cmos0x34;
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UINT8 Cmos0x35;
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//
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// In PVH case, there is no CMOS, we have to calculate the memory size
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// from parsing the E820
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//
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if (XenPvhDetected ()) {
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UINT64 HighestAddress;
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HighestAddress = GetHighestSystemMemoryAddress (TRUE);
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ASSERT (HighestAddress > 0 && HighestAddress <= BASE_4GB);
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return HighestAddress;
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}
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//
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// CMOS 0x34/0x35 specifies the system memory above 16 MB.
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// * CMOS(0x35) is the high byte
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@ -129,6 +181,23 @@ GetSystemMemorySizeAbove4gb (
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UINT32 Size;
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UINTN CmosIndex;
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//
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// In PVH case, there is no CMOS, we have to calculate the memory size
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// from parsing the E820
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//
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if (XenPvhDetected ()) {
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UINT64 HighestAddress;
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HighestAddress = GetHighestSystemMemoryAddress (FALSE);
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ASSERT (HighestAddress == 0 || HighestAddress >= BASE_4GB);
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if (HighestAddress >= BASE_4GB) {
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HighestAddress -= BASE_4GB;
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}
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return HighestAddress;
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}
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//
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// CMOS 0x5b-0x5d specifies the system memory above 4GB MB.
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// * CMOS(0x5d) is the most significant size byte
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@ -102,6 +102,17 @@ AddReservedMemoryBaseSizeHob (
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);
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}
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VOID
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AddReservedMemoryRangeHob (
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EFI_PHYSICAL_ADDRESS MemoryBase,
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EFI_PHYSICAL_ADDRESS MemoryLimit,
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BOOLEAN Cacheable
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)
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{
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AddReservedMemoryBaseSizeHob (MemoryBase,
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(UINT64)(MemoryLimit - MemoryBase), Cacheable);
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}
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VOID
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AddIoMemoryRangeHob (
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EFI_PHYSICAL_ADDRESS MemoryBase,
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@ -44,6 +44,13 @@ AddReservedMemoryBaseSizeHob (
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BOOLEAN Cacheable
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);
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VOID
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AddReservedMemoryRangeHob (
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EFI_PHYSICAL_ADDRESS MemoryBase,
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EFI_PHYSICAL_ADDRESS MemoryLimit,
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BOOLEAN Cacheable
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);
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VOID
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AddressWidthInitialization (
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VOID
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@ -114,6 +121,12 @@ XenPublishRamRegions (
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VOID
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);
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EFI_STATUS
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XenGetE820Map (
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EFI_E820_ENTRY64 **Entries,
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UINT32 *Count
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);
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extern EFI_BOOT_MODE mBootMode;
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extern UINT8 mPhysMemAddressWidth;
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@ -279,6 +279,11 @@ XenPublishRamRegions (
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EFI_E820_ENTRY64 *E820Map;
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UINT32 E820EntriesCount;
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EFI_STATUS Status;
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EFI_E820_ENTRY64 *Entry;
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UINTN Index;
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UINT64 LapicBase;
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UINT64 LapicEnd;
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DEBUG ((DEBUG_INFO, "Using memory map provided by Xen\n"));
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@ -287,26 +292,60 @@ XenPublishRamRegions (
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//
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E820EntriesCount = 0;
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Status = XenGetE820Map (&E820Map, &E820EntriesCount);
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ASSERT_EFI_ERROR (Status);
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if (E820EntriesCount > 0) {
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EFI_E820_ENTRY64 *Entry;
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UINT32 Loop;
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LapicBase = PcdGet32 (PcdCpuLocalApicBaseAddress);
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LapicEnd = LapicBase + SIZE_1MB;
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AddIoMemoryRangeHob (LapicBase, LapicEnd);
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for (Loop = 0; Loop < E820EntriesCount; Loop++) {
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Entry = E820Map + Loop;
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for (Index = 0; Index < E820EntriesCount; Index++) {
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UINT64 Base;
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UINT64 End;
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UINT64 ReservedBase;
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UINT64 ReservedEnd;
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Entry = &E820Map[Index];
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//
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// Only care about RAM
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// Round up the start address, and round down the end address.
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//
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if (Entry->Type != EfiAcpiAddressRangeMemory) {
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continue;
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Base = ALIGN_VALUE (Entry->BaseAddr, (UINT64)EFI_PAGE_SIZE);
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End = (Entry->BaseAddr + Entry->Length) & ~(UINT64)EFI_PAGE_MASK;
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switch (Entry->Type) {
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case EfiAcpiAddressRangeMemory:
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AddMemoryRangeHob (Base, End);
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break;
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case EfiAcpiAddressRangeACPI:
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AddReservedMemoryRangeHob (Base, End, FALSE);
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break;
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case EfiAcpiAddressRangeReserved:
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//
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// hvmloader marks a range that overlaps with the local APIC memory
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// mapped region as reserved, but CpuDxe wants it as mapped IO. We
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// have already added it as mapped IO, so skip it here.
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//
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//
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// add LAPIC predecessor range, if any
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//
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ReservedBase = Base;
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ReservedEnd = MIN (End, LapicBase);
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if (ReservedBase < ReservedEnd) {
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AddReservedMemoryRangeHob (ReservedBase, ReservedEnd, FALSE);
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}
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AddMemoryBaseSizeHob (Entry->BaseAddr, Entry->Length);
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MtrrSetMemoryAttribute (Entry->BaseAddr, Entry->Length, CacheWriteBack);
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//
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// add LAPIC successor range, if any
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//
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ReservedBase = MAX (Base, LapicEnd);
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ReservedEnd = End;
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if (ReservedBase < ReservedEnd) {
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AddReservedMemoryRangeHob (ReservedBase, ReservedEnd, FALSE);
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}
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break;
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default:
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break;
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}
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}
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}
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@ -326,12 +365,6 @@ InitializeXen (
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{
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RETURN_STATUS PcdStatus;
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//
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// Reserve away HVMLOADER reserved memory [0xFC000000,0xFD000000).
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// This needs to match HVMLOADER RESERVED_MEMBASE/RESERVED_MEMSIZE.
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//
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AddReservedMemoryBaseSizeHob (0xFC000000, 0x1000000, FALSE);
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PcdStatus = PcdSetBoolS (PcdPciDisableBusEnumeration, TRUE);
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ASSERT_RETURN_ERROR (PcdStatus);
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