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Ring3: Fixed buggy timer interrupt handling for AARCH64.

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This commit is contained in:
Mikhail Krichanov 2024-09-27 15:43:46 +03:00
parent e4c26e4957
commit 2497ca5c32
3 changed files with 4 additions and 7 deletions
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2
ArmPkg/Library/ArmExceptionLib/AArch64/ExceptionSupport.S
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@ -311,7 +311,7 @@ ASM_PFX(CommonExceptionEntry):
ldp x24, x25, [sp, #0xc0] ldp x24, x25, [sp, #0xc0]
ldp x26, x27, [sp, #0xd0] ldp x26, x27, [sp, #0xd0]
// Preserve return value for SVC. // Preserve return value for SVC.
mrs x1, esr_el1 ldr x1, [x28, #(FP_CONTEXT_SIZE + 0x18)] // Exception syndrome register
lsr x1, x1, #26 lsr x1, x1, #26
and x1, x1, #0x3F and x1, x1, #0x3F
cmp x1, #0x15 cmp x1, #0x15

3
ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.c
View File

@ -276,6 +276,9 @@ CommonCExceptionHandler (
if (ExceptionType <= gMaxExceptionNumber) { if (ExceptionType <= gMaxExceptionNumber) {
if (gExceptionHandlers[ExceptionType]) { if (gExceptionHandlers[ExceptionType]) {
gExceptionHandlers[ExceptionType](ExceptionType, SystemContext); gExceptionHandlers[ExceptionType](ExceptionType, SystemContext);
#if defined (MDE_CPU_AARCH64)
SystemContext.SystemContextAArch64->ESR = 0;
#endif
return EFI_SUCCESS; return EFI_SUCCESS;
} }
} else { } else {

6
MdeModulePkg/Core/Dxe/SysCall/AARCH64/CoreBootServices.S
View File

@ -107,7 +107,6 @@ ASM_FUNC(ArmCallRing3)
// //
msr spsr_el1, x1 msr spsr_el1, x1
isb isb
dsb sy
eret eret
//------------------------------------------------------------------------------ //------------------------------------------------------------------------------
@ -119,11 +118,6 @@ ASM_FUNC(ArmCallRing3)
// ); // );
//------------------------------------------------------------------------------ //------------------------------------------------------------------------------
ASM_FUNC(ReturnToCore) ASM_FUNC(ReturnToCore)
// Zero Exception Syndrome Register to prevent QEMU from random crashing.
msr esr_el1, xzr
msr spsr_el1, xzr
msr elr_el1, xzr
msr far_el1, xzr
// Switch to Core Stack. // Switch to Core Stack.
mov sp, x1 mov sp, x1
// Restore registers and Stack. // Restore registers and Stack.