From 249ed12ea0c4bb0a9eefee6f48cecc330ff6af6a Mon Sep 17 00:00:00 2001
From: Jeff Fan <jeff.fan@intel.com>
Date: Mon, 11 Jul 2016 14:35:26 +0800
Subject: [PATCH] UefiCpuPkg/CpuMpPei/X64: Remove hard code CPU BIST value

Cc: Feng Tian <feng.tian@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Giri Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
---
 UefiCpuPkg/CpuMpPei/X64/MpFuncs.nasm | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/UefiCpuPkg/CpuMpPei/X64/MpFuncs.nasm b/UefiCpuPkg/CpuMpPei/X64/MpFuncs.nasm
index 00e5f58758..7e7f405b2e 100644
--- a/UefiCpuPkg/CpuMpPei/X64/MpFuncs.nasm
+++ b/UefiCpuPkg/CpuMpPei/X64/MpFuncs.nasm
@@ -1,5 +1,5 @@
 ;------------------------------------------------------------------------------ ;
-; Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
 ; This program and the accompanying materials
 ; are licensed and made available under the terms and conditions of the BSD License
 ; which accompanies this distribution.  The full text of the license may be found at
@@ -37,10 +37,9 @@ ASM_PFX(RendezvousFunnelProc):
 RendezvousFunnelProcStart:
 ; At this point CS = 0x(vv00) and ip= 0x0.
 ; Save BIST information to ebp firstly
-BITS 16
 
-    mov        eax, 1234h
-    mov        ebp, eax                        ; save BIST information
+BITS 16
+    mov        ebp, eax                        ; Save BIST information
 
     mov        ax, cs
     mov        ds, ax