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UefiCpuPkg/PiSmmCpuDxeSmm: Remove assert check for PDE entry not exist
If 2MB-page is selected, PDE entry might exist, it's incorrect to assert it's not exist. Detailed see blow case analysis (it's similar case if address exceeds 4G): Assume the Default Page table has covered below 6M size range: [0000000000001000, 0000000000601000) Then, with PageTableMap API, below Page table entry will be created if 1G-page or 2M-page mode is selected: [0000000000001000, 0000000000002000) --> 4K [0000000000002000, 0000000000003000) --> 4K ... [00000000001FF000, 0000000000200000) --> 4k [0000000000200000, 0000000000400000) --> 2M [0000000000400000, 0000000000600000) --> 2M [0000000000600000, 0000000000601000) --> 4K Above will cover 2M aligned address (0000000000600000) in page table. If Page Fault happen by accessing 0000000000602000, need create the page entry: [0000000000602000, 0000000000603000) --> 4K But PDE entry has been created/existed in page table with 0 PS bit. So, this patch removes the assert check. The page table entry created will be the platform-specified PageSize granularity. Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
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@ -823,15 +823,6 @@ SmiDefaultPFHandler (
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}
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PTIndex = BitFieldRead64 (PFAddress, StartBit, StartBit + 8);
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if ((PageTable[PTIndex] & IA32_PG_P) != 0) {
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//
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// Check if the entry has already existed, this issue may occur when the different
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// size page entries created under the same entry
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//
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DEBUG ((DEBUG_ERROR, "PageTable = %lx, PTIndex = %x, PageTable[PTIndex] = %lx\n", PageTable, PTIndex, PageTable[PTIndex]));
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DEBUG ((DEBUG_ERROR, "New page table overlapped with old page table!\n"));
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ASSERT (FALSE);
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}
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//
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// Fill the new entry
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