mirror of https://github.com/acidanthera/audk.git
MdeModulePkg: Enable SATA Controller PCI mem space
The SATA controller driver crashes while accessing the PCI memory [AHCI Base Registers (ABAR)], as the PCI memory space is not enabled. Enable the PCI memory space access to prevent the SATA Controller driver from crashing. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
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@ -2,6 +2,7 @@
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This driver module produces IDE_CONTROLLER_INIT protocol for Sata Controllers.
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Copyright (c) 2011 - 2016, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2018, ARM Ltd. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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@ -364,6 +365,7 @@ SataControllerStart (
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EFI_SATA_CONTROLLER_PRIVATE_DATA *Private;
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UINT32 Data32;
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UINTN TotalCount;
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UINT64 Supports;
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DEBUG ((EFI_D_INFO, "SataControllerStart start\n"));
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@ -406,6 +408,52 @@ SataControllerStart (
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Private->IdeInit.CalculateMode = IdeInitCalculateMode;
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Private->IdeInit.SetTiming = IdeInitSetTiming;
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Private->IdeInit.EnumAll = SATA_ENUMER_ALL;
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Private->PciAttributesChanged = FALSE;
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//
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// Save original PCI attributes
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//
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Status = PciIo->Attributes (
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PciIo,
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EfiPciIoAttributeOperationGet,
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0,
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&Private->OriginalPciAttributes
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);
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if (EFI_ERROR (Status)) {
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goto Done;
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}
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DEBUG ((
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EFI_D_INFO,
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"Original PCI Attributes = 0x%llx\n",
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Private->OriginalPciAttributes
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));
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Status = PciIo->Attributes (
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PciIo,
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EfiPciIoAttributeOperationSupported,
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0,
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&Supports
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);
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if (EFI_ERROR (Status)) {
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goto Done;
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}
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DEBUG ((EFI_D_INFO, "Supported PCI Attributes = 0x%llx\n", Supports));
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Supports &= (UINT64)EFI_PCI_DEVICE_ENABLE;
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Status = PciIo->Attributes (
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PciIo,
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EfiPciIoAttributeOperationEnable,
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Supports,
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NULL
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);
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if (EFI_ERROR (Status)) {
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goto Done;
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}
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DEBUG ((EFI_D_INFO, "Enabled PCI Attributes = 0x%llx\n", Supports));
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Private->PciAttributesChanged = TRUE;
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Status = PciIo->Pci.Read (
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PciIo,
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@ -414,7 +462,10 @@ SataControllerStart (
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sizeof (PciData.Hdr.ClassCode),
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PciData.Hdr.ClassCode
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);
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ASSERT_EFI_ERROR (Status);
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if (EFI_ERROR (Status)) {
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ASSERT (FALSE);
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goto Done;
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}
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if (IS_PCI_IDE (&PciData)) {
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Private->IdeInit.ChannelCount = IDE_MAX_CHANNEL;
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@ -481,6 +532,17 @@ Done:
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if (Private->IdentifyValid != NULL) {
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FreePool (Private->IdentifyValid);
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}
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if (Private->PciAttributesChanged) {
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//
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// Restore original PCI attributes
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//
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PciIo->Attributes (
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PciIo,
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EfiPciIoAttributeOperationSet,
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Private->OriginalPciAttributes,
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NULL
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);
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}
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FreePool (Private);
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}
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}
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@ -556,6 +618,17 @@ SataControllerStop (
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if (Private->IdentifyValid != NULL) {
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FreePool (Private->IdentifyValid);
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}
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if (Private->PciAttributesChanged) {
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//
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// Restore original PCI attributes
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//
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Private->PciIo->Attributes (
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Private->PciIo,
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EfiPciIoAttributeOperationSet,
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Private->OriginalPciAttributes,
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NULL
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);
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}
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FreePool (Private);
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}
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@ -2,6 +2,7 @@
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Header file for Sata Controller driver.
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Copyright (c) 2011 - 2016, Intel Corporation. All rights reserved.<BR>
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Copyright (c) 2018, ARM Ltd. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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@ -104,6 +105,17 @@ typedef struct _EFI_SATA_CONTROLLER_PRIVATE_DATA {
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//
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EFI_IDENTIFY_DATA *IdentifyData;
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BOOLEAN *IdentifyValid;
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//
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// Track the state so that the PCI attributes that were modified
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// can be restored to the original value later.
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//
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BOOLEAN PciAttributesChanged;
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//
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// Copy of the original PCI Attributes
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//
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UINT64 OriginalPciAttributes;
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} EFI_SATA_CONTROLLER_PRIVATE_DATA;
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#define SATA_CONTROLLER_PRIVATE_DATA_FROM_THIS(a) CR(a, EFI_SATA_CONTROLLER_PRIVATE_DATA, IdeInit, SATA_CONTROLLER_SIGNATURE)
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