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ArmPlatformPkg: Rename gEmbeddedTokenSpaceGuid.PcdEmbeddedFd* into gArmTokenSpaceGuid.PcdNormalFd* 

This renaming is for matching the namespace with the secure firmware
gArmTokenSpaceGuid.PcdSecureFdBaseAddress/Size.



git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11475 6f19259b-4bc3-4df7-8a09-765794883524
This commit is contained in:
oliviermartin 2011-03-31 12:11:12 +00:00
parent 2637d1ef35
commit 262a9b0444
20 changed files with 52 additions and 50 deletions
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8
ArmPkg/ArmPkg.dec
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@ -83,11 +83,17 @@
gArmTokenSpaceGuid.PcdGicNumInterrupts|96|UINT32|0x00000023
#
# ARM Secure SEC PCDs
# ARM Secure Firmware PCDs
#
gArmTokenSpaceGuid.PcdSecureFdBaseAddress|0|UINT32|0x00000015
gArmTokenSpaceGuid.PcdSecureFdSize|0|UINT32|0x00000016
#
# ARM Normal (or Non Secure) Firmware PCDs
#
gArmTokenSpaceGuid.PcdNormalFdBaseAddress|0|UINT32|0x0000002B
gArmTokenSpaceGuid.PcdNormalFdSize|0|UINT32|0x0000002C
#
# ARM MPCore MailBox PCDs
#

4
ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-A8.dsc
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@ -323,8 +323,8 @@
gArmPlatformTokenSpaceGuid.PcdPeiServicePtrAddr|0x48020004 # Pei Services Ptr just above stack
# Non Sec UEFI Firmware: These two PCDs must match PcdFlashFvMainBase/PcdFlashFvMainSize
gEmbeddedTokenSpaceGuid.PcdEmbeddedFdBaseAddress|0x40050000 # Must be equal to gEmbeddedTokenSpaceGuid.PcdFlashFvMainBase
gEmbeddedTokenSpaceGuid.PcdEmbeddedFdSize|0x00100000 # Must be equal to gEmbeddedTokenSpaceGuid.PcdFlashFvMainSize
gArmTokenSpaceGuid.PcdNormalFdBaseAddress|0x40050000 # Must be equal to gEmbeddedTokenSpaceGuid.PcdFlashFvMainBase
gArmTokenSpaceGuid.PcdNormalFdSize|0x00100000 # Must be equal to gEmbeddedTokenSpaceGuid.PcdFlashFvMainSize
gEmbeddedTokenSpaceGuid.PcdTimerPeriod|100000 # expressed in 100ns units, 100,000 x 100 ns = 10,000,000 ns = 10 ms

4
ArmPlatformPkg/ArmRealViewEbPkg/ArmRealViewEb-RTSM-A9x2.dsc
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@ -327,8 +327,8 @@
gArmPlatformTokenSpaceGuid.PcdPeiServicePtrAddr|0x48020004 # Pei Services Ptr just above stack
# Non Sec UEFI Firmware: These two PCDs must match PcdFlashFvMainBase/PcdFlashFvMainSize
gEmbeddedTokenSpaceGuid.PcdEmbeddedFdBaseAddress|0x40050000 # Must be equal to gEmbeddedTokenSpaceGuid.PcdFlashFvMainBase
gEmbeddedTokenSpaceGuid.PcdEmbeddedFdSize|0x00100000 # Must be equal to gEmbeddedTokenSpaceGuid.PcdFlashFvMainSize
gArmTokenSpaceGuid.PcdNormalFdBaseAddress|0x40050000 # Must be equal to gEmbeddedTokenSpaceGuid.PcdFlashFvMainBase
gArmTokenSpaceGuid.PcdNormalFdSize|0x00100000 # Must be equal to gEmbeddedTokenSpaceGuid.PcdFlashFvMainSize
gEmbeddedTokenSpaceGuid.PcdTimerPeriod|100000 # expressed in 100ns units, 100,000 x 100 ns = 10,000,000 ns = 10 ms

4
ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbLib.inf
View File

@ -42,5 +42,5 @@
gArmPlatformTokenSpaceGuid.PcdStandalone
[FixedPcd]
gEmbeddedTokenSpaceGuid.PcdEmbeddedFdBaseAddress
gEmbeddedTokenSpaceGuid.PcdEmbeddedFdSize
gArmTokenSpaceGuid.PcdNormalFdBaseAddress
gArmTokenSpaceGuid.PcdNormalFdSize

8
ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbMem.c
View File

@ -179,14 +179,14 @@ VOID ArmPlatformGetEfiMemoryMap (
// Chunk between the EFI Memory region and the firmware
EfiMemoryTable[++Index].ResourceAttribute = Attributes;
EfiMemoryTable[Index].PhysicalStart = MemoryBase;
EfiMemoryTable[Index].NumberOfBytes = PcdGet32(PcdEmbeddedFdBaseAddress) - MemoryBase;
EfiMemoryTable[Index].NumberOfBytes = PcdGet32(PcdNormalFdBaseAddress) - MemoryBase;
// Chunk reserved by the firmware in DRAM
EfiMemoryTable[++Index].ResourceAttribute = Attributes & (~EFI_RESOURCE_ATTRIBUTE_PRESENT);
EfiMemoryTable[Index].PhysicalStart = PcdGet32(PcdEmbeddedFdBaseAddress);
EfiMemoryTable[Index].NumberOfBytes = PcdGet32(PcdEmbeddedFdSize);
EfiMemoryTable[Index].PhysicalStart = PcdGet32(PcdNormalFdBaseAddress);
EfiMemoryTable[Index].NumberOfBytes = PcdGet32(PcdNormalFdSize);
MemoryBase = PcdGet32(PcdEmbeddedFdBaseAddress) + PcdGet32(PcdEmbeddedFdSize);
MemoryBase = PcdGet32(PcdNormalFdBaseAddress) + PcdGet32(PcdNormalFdSize);
}
// We allocate all the remain memory as untested system memory

4
ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbSecLib.inf
View File

@ -42,5 +42,5 @@
gArmPlatformTokenSpaceGuid.PcdStandalone
[FixedPcd]
gEmbeddedTokenSpaceGuid.PcdEmbeddedFdBaseAddress
gEmbeddedTokenSpaceGuid.PcdEmbeddedFdSize
gArmTokenSpaceGuid.PcdNormalFdBaseAddress
gArmTokenSpaceGuid.PcdNormalFdSize

6
ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-CTA9x4.fdf
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@ -55,11 +55,11 @@ FV = FVMAIN_SEC
[FD.ArmVExpress_EFI]
!if $(EDK2_ARMVE_STANDALONE) == 1
BaseAddress = 0x45000000|gEmbeddedTokenSpaceGuid.PcdEmbeddedFdBaseAddress # The base address of the Firmware in NOR Flash.
BaseAddress = 0x45000000|gArmTokenSpaceGuid.PcdNormalFdBaseAddress # The base address of the Firmware in NOR Flash.
!else
BaseAddress = 0x80000000|gEmbeddedTokenSpaceGuid.PcdEmbeddedFdBaseAddress # The base address of the Firmware in remapped DRAM.
BaseAddress = 0x80000000|gArmTokenSpaceGuid.PcdNormalFdBaseAddress # The base address of the Firmware in remapped DRAM.
!endif
Size = 0x00200000|gEmbeddedTokenSpaceGuid.PcdEmbeddedFdSize # The size in bytes of the FLASH Device
Size = 0x00200000|gArmTokenSpaceGuid.PcdNormalFdSize # The size in bytes of the FLASH Device
ErasePolarity = 1
# This one is tricky, it must be: BlockSize * NumBlocks = Size

4
ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressLib.inf
View File

@ -45,5 +45,5 @@
gArmPlatformTokenSpaceGuid.PcdStandalone
[FixedPcd]
gEmbeddedTokenSpaceGuid.PcdEmbeddedFdBaseAddress
gEmbeddedTokenSpaceGuid.PcdEmbeddedFdSize
gArmTokenSpaceGuid.PcdNormalFdBaseAddress
gArmTokenSpaceGuid.PcdNormalFdSize

4
ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/ArmVExpressSecLib.inf
View File

@ -46,5 +46,5 @@
gArmPlatformTokenSpaceGuid.PcdStandalone
[FixedPcd]
gEmbeddedTokenSpaceGuid.PcdEmbeddedFdBaseAddress
gEmbeddedTokenSpaceGuid.PcdEmbeddedFdSize
gArmTokenSpaceGuid.PcdNormalFdBaseAddress
gArmTokenSpaceGuid.PcdNormalFdSize

8
ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Mem.c
View File

@ -189,14 +189,14 @@ VOID ArmPlatformGetEfiMemoryMap (
// Chunk between the EFI Memory region and the firmware
EfiMemoryTable[++Index].ResourceAttribute = Attributes;
EfiMemoryTable[Index].PhysicalStart = MemoryBase;
EfiMemoryTable[Index].NumberOfBytes = PcdGet32(PcdEmbeddedFdBaseAddress) - MemoryBase;
EfiMemoryTable[Index].NumberOfBytes = PcdGet32(PcdNormalFdBaseAddress) - MemoryBase;
// Chunk reserved by the firmware in DRAM
EfiMemoryTable[++Index].ResourceAttribute = Attributes & (~EFI_RESOURCE_ATTRIBUTE_PRESENT);
EfiMemoryTable[Index].PhysicalStart = PcdGet32(PcdEmbeddedFdBaseAddress);
EfiMemoryTable[Index].NumberOfBytes = PcdGet32(PcdEmbeddedFdSize);
EfiMemoryTable[Index].PhysicalStart = PcdGet32(PcdNormalFdBaseAddress);
EfiMemoryTable[Index].NumberOfBytes = PcdGet32(PcdNormalFdSize);
MemoryBase = PcdGet32(PcdEmbeddedFdBaseAddress) + PcdGet32(PcdEmbeddedFdSize);
MemoryBase = PcdGet32(PcdNormalFdBaseAddress) + PcdGet32(PcdNormalFdSize);
}
// We allocate all the remain memory as untested system memory

4
ArmPlatformPkg/Documentation/ArmPlatformPkg.txt
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@ -9,8 +9,8 @@ Porting UEFI to a ARM platform
PCD Description
gArmTokenSpaceGuid.PcdSecureFdBaseAddress : Base address of your Secure Firmware
gArmTokenSpaceGuid.PcdSecureFdSize : Size in byte of your Secure Firmware gEmbeddedTokenSpaceGuid.
PcdEmbeddedFdBaseAddress : Base Address of your Non-Secure Firmware gEmbeddedTokenSpaceGuid.
PcdEmbeddedFdSize : Size in bytes of your Non-Secure Firmware
gArmTokenSpaceGuid.PcdNormalFdBaseAddress : Base Address of your Non-Secure Firmware gEmbeddedTokenSpaceGuid.
gArmTokenSpaceGuid.PcdNormalFdSize : Size in bytes of your Non-Secure Firmware
gArmTokenSpaceGuid.PcdL2x0ControllerBase : Base Address of your L2x0 controller
gArmTokenSpaceGuid.PcdGicDistributorBase : Base address of the Distributor of your General Interrupt Controller gArmTokenSpaceGuid.
PcdGicInterruptInterfaceBase : Base address of the Interface of your General Interrupt Controller gArmVExpressTokenSpaceGuid.

5
ArmPlatformPkg/PlatformPei/PlatformPei.inf
View File

@ -33,6 +33,7 @@
[Packages]
MdePkg/MdePkg.dec
EmbeddedPkg/EmbeddedPkg.dec
ArmPkg/ArmPkg.dec
[LibraryClasses]
PeimEntryPoint
@ -44,8 +45,8 @@
gEfiPeiBootInRecoveryModePpiGuid # PPI SOMETIMES_PRODUCED
[FixedPcd]
gEmbeddedTokenSpaceGuid.PcdEmbeddedFdBaseAddress #The base address of the FLASH Device.
gEmbeddedTokenSpaceGuid.PcdEmbeddedFdSize #The size in bytes of the FLASH Device
gArmTokenSpaceGuid.PcdNormalFdBaseAddress # The base address of the FLASH Device.
gArmTokenSpaceGuid.PcdNormalFdSize # The size in bytes of the FLASH Device
gEmbeddedTokenSpaceGuid.PcdFlashFvMainBase
gEmbeddedTokenSpaceGuid.PcdFlashFvMainSize
gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize

4
ArmPlatformPkg/PrePeiCore/MainMPCore.c
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@ -77,8 +77,8 @@ VOID primary_main (
// Note also: HOBs (pei temp ram) MUST be above stack
//
SecCoreData.DataSize = sizeof(EFI_SEC_PEI_HAND_OFF);
SecCoreData.BootFirmwareVolumeBase = (VOID *)(UINTN)PcdGet32 (PcdEmbeddedFdBaseAddress);
SecCoreData.BootFirmwareVolumeSize = PcdGet32 (PcdEmbeddedFdSize);
SecCoreData.BootFirmwareVolumeBase = (VOID *)(UINTN)PcdGet32 (PcdNormalFdBaseAddress);
SecCoreData.BootFirmwareVolumeSize = PcdGet32 (PcdNormalFdSize);
SecCoreData.TemporaryRamBase = (VOID *)(UINTN)PcdGet32 (PcdCPUCoresNonSecStackBase); // We consider we run on the primary core (and so we use the first stack)
SecCoreData.TemporaryRamSize = (UINTN)(UINTN)PcdGet32 (PcdCPUCoresNonSecStackSize);
SecCoreData.PeiTemporaryRamBase = (VOID *)((UINTN)(SecCoreData.TemporaryRamBase) + (SecCoreData.TemporaryRamSize / 2));

4
ArmPlatformPkg/PrePeiCore/MainUniCore.c
View File

@ -39,8 +39,8 @@ VOID primary_main (
// Note also: HOBs (pei temp ram) MUST be above stack
//
SecCoreData.DataSize = sizeof(EFI_SEC_PEI_HAND_OFF);
SecCoreData.BootFirmwareVolumeBase = (VOID *)(UINTN)PcdGet32 (PcdEmbeddedFdBaseAddress);
SecCoreData.BootFirmwareVolumeSize = PcdGet32 (PcdEmbeddedFdSize);
SecCoreData.BootFirmwareVolumeBase = (VOID *)(UINTN)PcdGet32 (PcdNormalFdBaseAddress);
SecCoreData.BootFirmwareVolumeSize = PcdGet32 (PcdNormalFdSize);
SecCoreData.TemporaryRamBase = (VOID *)(UINTN)PcdGet32 (PcdCPUCoresNonSecStackBase); // We consider we run on the primary core (and so we use the first stack)
SecCoreData.TemporaryRamSize = (UINTN)(UINTN)PcdGet32 (PcdCPUCoresNonSecStackSize);
SecCoreData.PeiTemporaryRamBase = (VOID *)((UINTN)(SecCoreData.TemporaryRamBase) + (SecCoreData.TemporaryRamSize / 2));

5
ArmPlatformPkg/PrePeiCore/PrePeiCoreEntryPoint.S
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@ -48,7 +48,7 @@ _SetupStack:
# lr points to area in reset vector block containing PEI core address. lr needs to
# be saved from the beginning as the _ModuleEntryPoint could call helper functions
# that will overwrite 'lr'
LoadConstantToReg (FixedPcdGet32(PcdEmbeddedFdBaseAddress), r2)
LoadConstantToReg (FixedPcdGet32(PcdNormalFdBaseAddress), r2)
add r2, r2, #4
ldr r1, [r2]
@ -56,10 +56,9 @@ _SetupStack:
# ensure we're jumping to FV version of the code (not boot remapped alias)
ldr r2, StartupAddr
# jump to SEC C code
# jump to PrePeiCore C code
# r0 = core_id
# r1 = pei_core_address
blx r2
#end of the file
.end

6
ArmPlatformPkg/PrePeiCore/PrePeiCoreEntryPoint.asm
View File

@ -26,8 +26,6 @@
StartupAddr DCD CEntryPoint
SCC_SYS_SW EQU 0x0004
_ModuleEntryPoint
// Identify CPU ID
mrc p15, 0, r0, c0, c0, 5
@ -45,7 +43,7 @@ _SetupStack
mov sp, r3
// The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector
LoadConstantToReg (FixedPcdGet32(PcdEmbeddedFdBaseAddress), r2)
LoadConstantToReg (FixedPcdGet32(PcdNormalFdBaseAddress), r2)
add r2, r2, #4
ldr r1, [r2]
@ -53,7 +51,7 @@ _SetupStack
// ensure we're jumping to FV version of the code (not boot remapped alias)
ldr r2, StartupAddr
// jump to SEC C code
// jump to PrePeiCore C code
// r0 = core_id
// r1 = pei_core_address
blx r2

5
ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf
View File

@ -33,7 +33,6 @@
[Packages]
MdePkg/MdePkg.dec
MdeModulePkg/MdeModulePkg.dec
EmbeddedPkg/EmbeddedPkg.dec
ArmPkg/ArmPkg.dec
ArmPlatformPkg/ArmPlatformPkg.dec
@ -54,8 +53,8 @@
gArmPlatformTokenSpaceGuid.PcdStandalone
[FixedPcd]
gEmbeddedTokenSpaceGuid.PcdEmbeddedFdBaseAddress
gEmbeddedTokenSpaceGuid.PcdEmbeddedFdSize
gArmTokenSpaceGuid.PcdNormalFdBaseAddress
gArmTokenSpaceGuid.PcdNormalFdSize
gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackBase
gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackSize

5
ArmPlatformPkg/PrePeiCore/PrePeiCoreUniCore.inf
View File

@ -33,7 +33,6 @@
[Packages]
MdePkg/MdePkg.dec
MdeModulePkg/MdeModulePkg.dec
EmbeddedPkg/EmbeddedPkg.dec
ArmPkg/ArmPkg.dec
ArmPlatformPkg/ArmPlatformPkg.dec
@ -52,8 +51,8 @@
gArmPlatformTokenSpaceGuid.PcdStandalone
[FixedPcd]
gEmbeddedTokenSpaceGuid.PcdEmbeddedFdBaseAddress
gEmbeddedTokenSpaceGuid.PcdEmbeddedFdSize
gArmTokenSpaceGuid.PcdNormalFdBaseAddress
gArmTokenSpaceGuid.PcdNormalFdSize
gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackBase
gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackSize

8
ArmPlatformPkg/Sec/Sec.c
View File

@ -195,7 +195,7 @@ CEntryPoint (
// If ArmVe has not been built as Standalone then we need to patch the DRAM to add an infinite loop at the start address
if (FeaturePcdGet(PcdStandalone) == FALSE) {
if (CoreId == 0) {
UINTN* StartAddress = (UINTN*)PcdGet32(PcdEmbeddedFdBaseAddress);
UINTN* StartAddress = (UINTN*)PcdGet32(PcdNormalFdBaseAddress);
// Patch the DRAM to make an infinite loop at the start address
*StartAddress = 0xEAFFFFFE; // opcode for while(1)
@ -204,7 +204,7 @@ CEntryPoint (
SerialPortWrite ((UINT8 *) Buffer, CharCount);
// To enter into Non Secure state, we need to make a return from exception
return_from_exception(PcdGet32(PcdEmbeddedFdBaseAddress));
return_from_exception(PcdGet32(PcdNormalFdBaseAddress));
} else {
// When the primary core is stopped by the hardware debugger to copy the firmware
// into DRAM. The secondary cores are still running. As soon as the first bytes of
@ -218,7 +218,7 @@ CEntryPoint (
}
} else {
// To enter into Non Secure state, we need to make a return from exception
return_from_exception(PcdGet32(PcdEmbeddedFdBaseAddress));
return_from_exception(PcdGet32(PcdNormalFdBaseAddress));
}
//-------------------- Non Secure Mode ---------------------
@ -232,7 +232,7 @@ VOID NonSecureWaitForFirmware() {
VOID (*secondary_start)(VOID);
// The secondary cores will execute the fimrware once wake from WFI.
secondary_start = (VOID (*)())PcdGet32(PcdEmbeddedFdBaseAddress);
secondary_start = (VOID (*)())PcdGet32(PcdNormalFdBaseAddress);
ArmCallWFI();

2
ArmPlatformPkg/Sec/Sec.inf
View File

@ -54,7 +54,7 @@
gArmTokenSpaceGuid.PcdVFPEnabled
gArmPlatformTokenSpaceGuid.PcdMPCoreSupport
gEmbeddedTokenSpaceGuid.PcdEmbeddedFdBaseAddress
gArmTokenSpaceGuid.PcdNormalFdBaseAddress
gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecStackSize