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ArmPlatformPkg: Rename gEmbeddedTokenSpaceGuid.PcdEmbeddedFd* into gArmTokenSpaceGuid.PcdNormalFd*
This renaming is for matching the namespace with the secure firmware gArmTokenSpaceGuid.PcdSecureFdBaseAddress/Size. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11475 6f19259b-4bc3-4df7-8a09-765794883524
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@ -83,11 +83,17 @@
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gArmTokenSpaceGuid.PcdGicNumInterrupts|96|UINT32|0x00000023
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gArmTokenSpaceGuid.PcdGicNumInterrupts|96|UINT32|0x00000023
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#
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#
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# ARM Secure SEC PCDs
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# ARM Secure Firmware PCDs
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#
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#
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gArmTokenSpaceGuid.PcdSecureFdBaseAddress|0|UINT32|0x00000015
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gArmTokenSpaceGuid.PcdSecureFdBaseAddress|0|UINT32|0x00000015
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gArmTokenSpaceGuid.PcdSecureFdSize|0|UINT32|0x00000016
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gArmTokenSpaceGuid.PcdSecureFdSize|0|UINT32|0x00000016
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#
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# ARM Normal (or Non Secure) Firmware PCDs
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#
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gArmTokenSpaceGuid.PcdNormalFdBaseAddress|0|UINT32|0x0000002B
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gArmTokenSpaceGuid.PcdNormalFdSize|0|UINT32|0x0000002C
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#
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#
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# ARM MPCore MailBox PCDs
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# ARM MPCore MailBox PCDs
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#
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#
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@ -323,8 +323,8 @@
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gArmPlatformTokenSpaceGuid.PcdPeiServicePtrAddr|0x48020004 # Pei Services Ptr just above stack
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gArmPlatformTokenSpaceGuid.PcdPeiServicePtrAddr|0x48020004 # Pei Services Ptr just above stack
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# Non Sec UEFI Firmware: These two PCDs must match PcdFlashFvMainBase/PcdFlashFvMainSize
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# Non Sec UEFI Firmware: These two PCDs must match PcdFlashFvMainBase/PcdFlashFvMainSize
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gEmbeddedTokenSpaceGuid.PcdEmbeddedFdBaseAddress|0x40050000 # Must be equal to gEmbeddedTokenSpaceGuid.PcdFlashFvMainBase
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gArmTokenSpaceGuid.PcdNormalFdBaseAddress|0x40050000 # Must be equal to gEmbeddedTokenSpaceGuid.PcdFlashFvMainBase
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gEmbeddedTokenSpaceGuid.PcdEmbeddedFdSize|0x00100000 # Must be equal to gEmbeddedTokenSpaceGuid.PcdFlashFvMainSize
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gArmTokenSpaceGuid.PcdNormalFdSize|0x00100000 # Must be equal to gEmbeddedTokenSpaceGuid.PcdFlashFvMainSize
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gEmbeddedTokenSpaceGuid.PcdTimerPeriod|100000 # expressed in 100ns units, 100,000 x 100 ns = 10,000,000 ns = 10 ms
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gEmbeddedTokenSpaceGuid.PcdTimerPeriod|100000 # expressed in 100ns units, 100,000 x 100 ns = 10,000,000 ns = 10 ms
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@ -327,8 +327,8 @@
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gArmPlatformTokenSpaceGuid.PcdPeiServicePtrAddr|0x48020004 # Pei Services Ptr just above stack
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gArmPlatformTokenSpaceGuid.PcdPeiServicePtrAddr|0x48020004 # Pei Services Ptr just above stack
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# Non Sec UEFI Firmware: These two PCDs must match PcdFlashFvMainBase/PcdFlashFvMainSize
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# Non Sec UEFI Firmware: These two PCDs must match PcdFlashFvMainBase/PcdFlashFvMainSize
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gEmbeddedTokenSpaceGuid.PcdEmbeddedFdBaseAddress|0x40050000 # Must be equal to gEmbeddedTokenSpaceGuid.PcdFlashFvMainBase
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gArmTokenSpaceGuid.PcdNormalFdBaseAddress|0x40050000 # Must be equal to gEmbeddedTokenSpaceGuid.PcdFlashFvMainBase
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gEmbeddedTokenSpaceGuid.PcdEmbeddedFdSize|0x00100000 # Must be equal to gEmbeddedTokenSpaceGuid.PcdFlashFvMainSize
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gArmTokenSpaceGuid.PcdNormalFdSize|0x00100000 # Must be equal to gEmbeddedTokenSpaceGuid.PcdFlashFvMainSize
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gEmbeddedTokenSpaceGuid.PcdTimerPeriod|100000 # expressed in 100ns units, 100,000 x 100 ns = 10,000,000 ns = 10 ms
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gEmbeddedTokenSpaceGuid.PcdTimerPeriod|100000 # expressed in 100ns units, 100,000 x 100 ns = 10,000,000 ns = 10 ms
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@ -42,5 +42,5 @@
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gArmPlatformTokenSpaceGuid.PcdStandalone
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gArmPlatformTokenSpaceGuid.PcdStandalone
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[FixedPcd]
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[FixedPcd]
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gEmbeddedTokenSpaceGuid.PcdEmbeddedFdBaseAddress
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gArmTokenSpaceGuid.PcdNormalFdBaseAddress
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gEmbeddedTokenSpaceGuid.PcdEmbeddedFdSize
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gArmTokenSpaceGuid.PcdNormalFdSize
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@ -179,14 +179,14 @@ VOID ArmPlatformGetEfiMemoryMap (
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// Chunk between the EFI Memory region and the firmware
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// Chunk between the EFI Memory region and the firmware
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EfiMemoryTable[++Index].ResourceAttribute = Attributes;
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EfiMemoryTable[++Index].ResourceAttribute = Attributes;
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EfiMemoryTable[Index].PhysicalStart = MemoryBase;
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EfiMemoryTable[Index].PhysicalStart = MemoryBase;
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EfiMemoryTable[Index].NumberOfBytes = PcdGet32(PcdEmbeddedFdBaseAddress) - MemoryBase;
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EfiMemoryTable[Index].NumberOfBytes = PcdGet32(PcdNormalFdBaseAddress) - MemoryBase;
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// Chunk reserved by the firmware in DRAM
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// Chunk reserved by the firmware in DRAM
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EfiMemoryTable[++Index].ResourceAttribute = Attributes & (~EFI_RESOURCE_ATTRIBUTE_PRESENT);
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EfiMemoryTable[++Index].ResourceAttribute = Attributes & (~EFI_RESOURCE_ATTRIBUTE_PRESENT);
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EfiMemoryTable[Index].PhysicalStart = PcdGet32(PcdEmbeddedFdBaseAddress);
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EfiMemoryTable[Index].PhysicalStart = PcdGet32(PcdNormalFdBaseAddress);
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EfiMemoryTable[Index].NumberOfBytes = PcdGet32(PcdEmbeddedFdSize);
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EfiMemoryTable[Index].NumberOfBytes = PcdGet32(PcdNormalFdSize);
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MemoryBase = PcdGet32(PcdEmbeddedFdBaseAddress) + PcdGet32(PcdEmbeddedFdSize);
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MemoryBase = PcdGet32(PcdNormalFdBaseAddress) + PcdGet32(PcdNormalFdSize);
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}
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}
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// We allocate all the remain memory as untested system memory
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// We allocate all the remain memory as untested system memory
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@ -42,5 +42,5 @@
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gArmPlatformTokenSpaceGuid.PcdStandalone
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gArmPlatformTokenSpaceGuid.PcdStandalone
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[FixedPcd]
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[FixedPcd]
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gEmbeddedTokenSpaceGuid.PcdEmbeddedFdBaseAddress
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gArmTokenSpaceGuid.PcdNormalFdBaseAddress
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gEmbeddedTokenSpaceGuid.PcdEmbeddedFdSize
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gArmTokenSpaceGuid.PcdNormalFdSize
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@ -55,11 +55,11 @@ FV = FVMAIN_SEC
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[FD.ArmVExpress_EFI]
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[FD.ArmVExpress_EFI]
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!if $(EDK2_ARMVE_STANDALONE) == 1
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!if $(EDK2_ARMVE_STANDALONE) == 1
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BaseAddress = 0x45000000|gEmbeddedTokenSpaceGuid.PcdEmbeddedFdBaseAddress # The base address of the Firmware in NOR Flash.
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BaseAddress = 0x45000000|gArmTokenSpaceGuid.PcdNormalFdBaseAddress # The base address of the Firmware in NOR Flash.
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!else
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!else
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BaseAddress = 0x80000000|gEmbeddedTokenSpaceGuid.PcdEmbeddedFdBaseAddress # The base address of the Firmware in remapped DRAM.
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BaseAddress = 0x80000000|gArmTokenSpaceGuid.PcdNormalFdBaseAddress # The base address of the Firmware in remapped DRAM.
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!endif
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!endif
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Size = 0x00200000|gEmbeddedTokenSpaceGuid.PcdEmbeddedFdSize # The size in bytes of the FLASH Device
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Size = 0x00200000|gArmTokenSpaceGuid.PcdNormalFdSize # The size in bytes of the FLASH Device
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ErasePolarity = 1
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ErasePolarity = 1
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# This one is tricky, it must be: BlockSize * NumBlocks = Size
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# This one is tricky, it must be: BlockSize * NumBlocks = Size
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@ -45,5 +45,5 @@
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gArmPlatformTokenSpaceGuid.PcdStandalone
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gArmPlatformTokenSpaceGuid.PcdStandalone
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[FixedPcd]
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[FixedPcd]
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gEmbeddedTokenSpaceGuid.PcdEmbeddedFdBaseAddress
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gArmTokenSpaceGuid.PcdNormalFdBaseAddress
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gEmbeddedTokenSpaceGuid.PcdEmbeddedFdSize
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gArmTokenSpaceGuid.PcdNormalFdSize
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@ -46,5 +46,5 @@
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gArmPlatformTokenSpaceGuid.PcdStandalone
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gArmPlatformTokenSpaceGuid.PcdStandalone
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[FixedPcd]
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[FixedPcd]
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gEmbeddedTokenSpaceGuid.PcdEmbeddedFdBaseAddress
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gArmTokenSpaceGuid.PcdNormalFdBaseAddress
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gEmbeddedTokenSpaceGuid.PcdEmbeddedFdSize
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gArmTokenSpaceGuid.PcdNormalFdSize
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@ -189,14 +189,14 @@ VOID ArmPlatformGetEfiMemoryMap (
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// Chunk between the EFI Memory region and the firmware
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// Chunk between the EFI Memory region and the firmware
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EfiMemoryTable[++Index].ResourceAttribute = Attributes;
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EfiMemoryTable[++Index].ResourceAttribute = Attributes;
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EfiMemoryTable[Index].PhysicalStart = MemoryBase;
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EfiMemoryTable[Index].PhysicalStart = MemoryBase;
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EfiMemoryTable[Index].NumberOfBytes = PcdGet32(PcdEmbeddedFdBaseAddress) - MemoryBase;
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EfiMemoryTable[Index].NumberOfBytes = PcdGet32(PcdNormalFdBaseAddress) - MemoryBase;
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// Chunk reserved by the firmware in DRAM
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// Chunk reserved by the firmware in DRAM
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EfiMemoryTable[++Index].ResourceAttribute = Attributes & (~EFI_RESOURCE_ATTRIBUTE_PRESENT);
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EfiMemoryTable[++Index].ResourceAttribute = Attributes & (~EFI_RESOURCE_ATTRIBUTE_PRESENT);
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EfiMemoryTable[Index].PhysicalStart = PcdGet32(PcdEmbeddedFdBaseAddress);
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EfiMemoryTable[Index].PhysicalStart = PcdGet32(PcdNormalFdBaseAddress);
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EfiMemoryTable[Index].NumberOfBytes = PcdGet32(PcdEmbeddedFdSize);
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EfiMemoryTable[Index].NumberOfBytes = PcdGet32(PcdNormalFdSize);
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MemoryBase = PcdGet32(PcdEmbeddedFdBaseAddress) + PcdGet32(PcdEmbeddedFdSize);
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MemoryBase = PcdGet32(PcdNormalFdBaseAddress) + PcdGet32(PcdNormalFdSize);
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}
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}
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// We allocate all the remain memory as untested system memory
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// We allocate all the remain memory as untested system memory
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@ -9,8 +9,8 @@ Porting UEFI to a ARM platform
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PCD Description
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PCD Description
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gArmTokenSpaceGuid.PcdSecureFdBaseAddress : Base address of your Secure Firmware
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gArmTokenSpaceGuid.PcdSecureFdBaseAddress : Base address of your Secure Firmware
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gArmTokenSpaceGuid.PcdSecureFdSize : Size in byte of your Secure Firmware gEmbeddedTokenSpaceGuid.
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gArmTokenSpaceGuid.PcdSecureFdSize : Size in byte of your Secure Firmware gEmbeddedTokenSpaceGuid.
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PcdEmbeddedFdBaseAddress : Base Address of your Non-Secure Firmware gEmbeddedTokenSpaceGuid.
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gArmTokenSpaceGuid.PcdNormalFdBaseAddress : Base Address of your Non-Secure Firmware gEmbeddedTokenSpaceGuid.
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PcdEmbeddedFdSize : Size in bytes of your Non-Secure Firmware
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gArmTokenSpaceGuid.PcdNormalFdSize : Size in bytes of your Non-Secure Firmware
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gArmTokenSpaceGuid.PcdL2x0ControllerBase : Base Address of your L2x0 controller
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gArmTokenSpaceGuid.PcdL2x0ControllerBase : Base Address of your L2x0 controller
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gArmTokenSpaceGuid.PcdGicDistributorBase : Base address of the Distributor of your General Interrupt Controller gArmTokenSpaceGuid.
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gArmTokenSpaceGuid.PcdGicDistributorBase : Base address of the Distributor of your General Interrupt Controller gArmTokenSpaceGuid.
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PcdGicInterruptInterfaceBase : Base address of the Interface of your General Interrupt Controller gArmVExpressTokenSpaceGuid.
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PcdGicInterruptInterfaceBase : Base address of the Interface of your General Interrupt Controller gArmVExpressTokenSpaceGuid.
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@ -33,6 +33,7 @@
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[Packages]
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[Packages]
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MdePkg/MdePkg.dec
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MdePkg/MdePkg.dec
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EmbeddedPkg/EmbeddedPkg.dec
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EmbeddedPkg/EmbeddedPkg.dec
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ArmPkg/ArmPkg.dec
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[LibraryClasses]
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[LibraryClasses]
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PeimEntryPoint
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PeimEntryPoint
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@ -44,8 +45,8 @@
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gEfiPeiBootInRecoveryModePpiGuid # PPI SOMETIMES_PRODUCED
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gEfiPeiBootInRecoveryModePpiGuid # PPI SOMETIMES_PRODUCED
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[FixedPcd]
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[FixedPcd]
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gEmbeddedTokenSpaceGuid.PcdEmbeddedFdBaseAddress #The base address of the FLASH Device.
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gArmTokenSpaceGuid.PcdNormalFdBaseAddress # The base address of the FLASH Device.
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gEmbeddedTokenSpaceGuid.PcdEmbeddedFdSize #The size in bytes of the FLASH Device
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gArmTokenSpaceGuid.PcdNormalFdSize # The size in bytes of the FLASH Device
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gEmbeddedTokenSpaceGuid.PcdFlashFvMainBase
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gEmbeddedTokenSpaceGuid.PcdFlashFvMainBase
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gEmbeddedTokenSpaceGuid.PcdFlashFvMainSize
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gEmbeddedTokenSpaceGuid.PcdFlashFvMainSize
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gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize
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gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize
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@ -77,8 +77,8 @@ VOID primary_main (
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// Note also: HOBs (pei temp ram) MUST be above stack
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// Note also: HOBs (pei temp ram) MUST be above stack
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//
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//
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SecCoreData.DataSize = sizeof(EFI_SEC_PEI_HAND_OFF);
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SecCoreData.DataSize = sizeof(EFI_SEC_PEI_HAND_OFF);
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SecCoreData.BootFirmwareVolumeBase = (VOID *)(UINTN)PcdGet32 (PcdEmbeddedFdBaseAddress);
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SecCoreData.BootFirmwareVolumeBase = (VOID *)(UINTN)PcdGet32 (PcdNormalFdBaseAddress);
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SecCoreData.BootFirmwareVolumeSize = PcdGet32 (PcdEmbeddedFdSize);
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SecCoreData.BootFirmwareVolumeSize = PcdGet32 (PcdNormalFdSize);
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SecCoreData.TemporaryRamBase = (VOID *)(UINTN)PcdGet32 (PcdCPUCoresNonSecStackBase); // We consider we run on the primary core (and so we use the first stack)
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SecCoreData.TemporaryRamBase = (VOID *)(UINTN)PcdGet32 (PcdCPUCoresNonSecStackBase); // We consider we run on the primary core (and so we use the first stack)
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SecCoreData.TemporaryRamSize = (UINTN)(UINTN)PcdGet32 (PcdCPUCoresNonSecStackSize);
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SecCoreData.TemporaryRamSize = (UINTN)(UINTN)PcdGet32 (PcdCPUCoresNonSecStackSize);
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SecCoreData.PeiTemporaryRamBase = (VOID *)((UINTN)(SecCoreData.TemporaryRamBase) + (SecCoreData.TemporaryRamSize / 2));
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SecCoreData.PeiTemporaryRamBase = (VOID *)((UINTN)(SecCoreData.TemporaryRamBase) + (SecCoreData.TemporaryRamSize / 2));
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@ -39,8 +39,8 @@ VOID primary_main (
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// Note also: HOBs (pei temp ram) MUST be above stack
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// Note also: HOBs (pei temp ram) MUST be above stack
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//
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//
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SecCoreData.DataSize = sizeof(EFI_SEC_PEI_HAND_OFF);
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SecCoreData.DataSize = sizeof(EFI_SEC_PEI_HAND_OFF);
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SecCoreData.BootFirmwareVolumeBase = (VOID *)(UINTN)PcdGet32 (PcdEmbeddedFdBaseAddress);
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SecCoreData.BootFirmwareVolumeBase = (VOID *)(UINTN)PcdGet32 (PcdNormalFdBaseAddress);
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SecCoreData.BootFirmwareVolumeSize = PcdGet32 (PcdEmbeddedFdSize);
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SecCoreData.BootFirmwareVolumeSize = PcdGet32 (PcdNormalFdSize);
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SecCoreData.TemporaryRamBase = (VOID *)(UINTN)PcdGet32 (PcdCPUCoresNonSecStackBase); // We consider we run on the primary core (and so we use the first stack)
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SecCoreData.TemporaryRamBase = (VOID *)(UINTN)PcdGet32 (PcdCPUCoresNonSecStackBase); // We consider we run on the primary core (and so we use the first stack)
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SecCoreData.TemporaryRamSize = (UINTN)(UINTN)PcdGet32 (PcdCPUCoresNonSecStackSize);
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SecCoreData.TemporaryRamSize = (UINTN)(UINTN)PcdGet32 (PcdCPUCoresNonSecStackSize);
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SecCoreData.PeiTemporaryRamBase = (VOID *)((UINTN)(SecCoreData.TemporaryRamBase) + (SecCoreData.TemporaryRamSize / 2));
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SecCoreData.PeiTemporaryRamBase = (VOID *)((UINTN)(SecCoreData.TemporaryRamBase) + (SecCoreData.TemporaryRamSize / 2));
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@ -48,7 +48,7 @@ _SetupStack:
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# lr points to area in reset vector block containing PEI core address. lr needs to
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# lr points to area in reset vector block containing PEI core address. lr needs to
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# be saved from the beginning as the _ModuleEntryPoint could call helper functions
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# be saved from the beginning as the _ModuleEntryPoint could call helper functions
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# that will overwrite 'lr'
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# that will overwrite 'lr'
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LoadConstantToReg (FixedPcdGet32(PcdEmbeddedFdBaseAddress), r2)
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LoadConstantToReg (FixedPcdGet32(PcdNormalFdBaseAddress), r2)
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add r2, r2, #4
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add r2, r2, #4
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ldr r1, [r2]
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ldr r1, [r2]
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@ -56,10 +56,9 @@ _SetupStack:
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# ensure we're jumping to FV version of the code (not boot remapped alias)
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# ensure we're jumping to FV version of the code (not boot remapped alias)
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ldr r2, StartupAddr
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ldr r2, StartupAddr
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# jump to SEC C code
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# jump to PrePeiCore C code
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# r0 = core_id
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# r0 = core_id
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# r1 = pei_core_address
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# r1 = pei_core_address
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blx r2
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blx r2
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#end of the file
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.end
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.end
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StartupAddr DCD CEntryPoint
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StartupAddr DCD CEntryPoint
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SCC_SYS_SW EQU 0x0004
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_ModuleEntryPoint
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_ModuleEntryPoint
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// Identify CPU ID
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// Identify CPU ID
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mrc p15, 0, r0, c0, c0, 5
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mrc p15, 0, r0, c0, c0, 5
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@ -45,7 +43,7 @@ _SetupStack
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mov sp, r3
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mov sp, r3
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// The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector
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// The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector
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LoadConstantToReg (FixedPcdGet32(PcdEmbeddedFdBaseAddress), r2)
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LoadConstantToReg (FixedPcdGet32(PcdNormalFdBaseAddress), r2)
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add r2, r2, #4
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add r2, r2, #4
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ldr r1, [r2]
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ldr r1, [r2]
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@ -53,7 +51,7 @@ _SetupStack
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// ensure we're jumping to FV version of the code (not boot remapped alias)
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// ensure we're jumping to FV version of the code (not boot remapped alias)
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ldr r2, StartupAddr
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ldr r2, StartupAddr
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// jump to SEC C code
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// jump to PrePeiCore C code
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// r0 = core_id
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// r0 = core_id
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// r1 = pei_core_address
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// r1 = pei_core_address
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blx r2
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blx r2
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[Packages]
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[Packages]
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MdePkg/MdePkg.dec
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MdePkg/MdePkg.dec
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MdeModulePkg/MdeModulePkg.dec
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MdeModulePkg/MdeModulePkg.dec
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EmbeddedPkg/EmbeddedPkg.dec
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ArmPkg/ArmPkg.dec
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ArmPkg/ArmPkg.dec
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ArmPlatformPkg/ArmPlatformPkg.dec
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ArmPlatformPkg/ArmPlatformPkg.dec
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@ -54,8 +53,8 @@
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gArmPlatformTokenSpaceGuid.PcdStandalone
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gArmPlatformTokenSpaceGuid.PcdStandalone
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[FixedPcd]
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[FixedPcd]
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gEmbeddedTokenSpaceGuid.PcdEmbeddedFdBaseAddress
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gArmTokenSpaceGuid.PcdNormalFdBaseAddress
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gEmbeddedTokenSpaceGuid.PcdEmbeddedFdSize
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gArmTokenSpaceGuid.PcdNormalFdSize
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gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackBase
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gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackBase
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gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackSize
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gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackSize
|
||||||
|
@ -33,7 +33,6 @@
|
|||||||
[Packages]
|
[Packages]
|
||||||
MdePkg/MdePkg.dec
|
MdePkg/MdePkg.dec
|
||||||
MdeModulePkg/MdeModulePkg.dec
|
MdeModulePkg/MdeModulePkg.dec
|
||||||
EmbeddedPkg/EmbeddedPkg.dec
|
|
||||||
ArmPkg/ArmPkg.dec
|
ArmPkg/ArmPkg.dec
|
||||||
ArmPlatformPkg/ArmPlatformPkg.dec
|
ArmPlatformPkg/ArmPlatformPkg.dec
|
||||||
|
|
||||||
@ -52,8 +51,8 @@
|
|||||||
gArmPlatformTokenSpaceGuid.PcdStandalone
|
gArmPlatformTokenSpaceGuid.PcdStandalone
|
||||||
|
|
||||||
[FixedPcd]
|
[FixedPcd]
|
||||||
gEmbeddedTokenSpaceGuid.PcdEmbeddedFdBaseAddress
|
gArmTokenSpaceGuid.PcdNormalFdBaseAddress
|
||||||
gEmbeddedTokenSpaceGuid.PcdEmbeddedFdSize
|
gArmTokenSpaceGuid.PcdNormalFdSize
|
||||||
|
|
||||||
gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackBase
|
gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackBase
|
||||||
gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackSize
|
gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackSize
|
||||||
|
@ -195,7 +195,7 @@ CEntryPoint (
|
|||||||
// If ArmVe has not been built as Standalone then we need to patch the DRAM to add an infinite loop at the start address
|
// If ArmVe has not been built as Standalone then we need to patch the DRAM to add an infinite loop at the start address
|
||||||
if (FeaturePcdGet(PcdStandalone) == FALSE) {
|
if (FeaturePcdGet(PcdStandalone) == FALSE) {
|
||||||
if (CoreId == 0) {
|
if (CoreId == 0) {
|
||||||
UINTN* StartAddress = (UINTN*)PcdGet32(PcdEmbeddedFdBaseAddress);
|
UINTN* StartAddress = (UINTN*)PcdGet32(PcdNormalFdBaseAddress);
|
||||||
|
|
||||||
// Patch the DRAM to make an infinite loop at the start address
|
// Patch the DRAM to make an infinite loop at the start address
|
||||||
*StartAddress = 0xEAFFFFFE; // opcode for while(1)
|
*StartAddress = 0xEAFFFFFE; // opcode for while(1)
|
||||||
@ -204,7 +204,7 @@ CEntryPoint (
|
|||||||
SerialPortWrite ((UINT8 *) Buffer, CharCount);
|
SerialPortWrite ((UINT8 *) Buffer, CharCount);
|
||||||
|
|
||||||
// To enter into Non Secure state, we need to make a return from exception
|
// To enter into Non Secure state, we need to make a return from exception
|
||||||
return_from_exception(PcdGet32(PcdEmbeddedFdBaseAddress));
|
return_from_exception(PcdGet32(PcdNormalFdBaseAddress));
|
||||||
} else {
|
} else {
|
||||||
// When the primary core is stopped by the hardware debugger to copy the firmware
|
// When the primary core is stopped by the hardware debugger to copy the firmware
|
||||||
// into DRAM. The secondary cores are still running. As soon as the first bytes of
|
// into DRAM. The secondary cores are still running. As soon as the first bytes of
|
||||||
@ -218,7 +218,7 @@ CEntryPoint (
|
|||||||
}
|
}
|
||||||
} else {
|
} else {
|
||||||
// To enter into Non Secure state, we need to make a return from exception
|
// To enter into Non Secure state, we need to make a return from exception
|
||||||
return_from_exception(PcdGet32(PcdEmbeddedFdBaseAddress));
|
return_from_exception(PcdGet32(PcdNormalFdBaseAddress));
|
||||||
}
|
}
|
||||||
//-------------------- Non Secure Mode ---------------------
|
//-------------------- Non Secure Mode ---------------------
|
||||||
|
|
||||||
@ -232,7 +232,7 @@ VOID NonSecureWaitForFirmware() {
|
|||||||
VOID (*secondary_start)(VOID);
|
VOID (*secondary_start)(VOID);
|
||||||
|
|
||||||
// The secondary cores will execute the fimrware once wake from WFI.
|
// The secondary cores will execute the fimrware once wake from WFI.
|
||||||
secondary_start = (VOID (*)())PcdGet32(PcdEmbeddedFdBaseAddress);
|
secondary_start = (VOID (*)())PcdGet32(PcdNormalFdBaseAddress);
|
||||||
|
|
||||||
ArmCallWFI();
|
ArmCallWFI();
|
||||||
|
|
||||||
|
@ -54,7 +54,7 @@
|
|||||||
gArmTokenSpaceGuid.PcdVFPEnabled
|
gArmTokenSpaceGuid.PcdVFPEnabled
|
||||||
gArmPlatformTokenSpaceGuid.PcdMPCoreSupport
|
gArmPlatformTokenSpaceGuid.PcdMPCoreSupport
|
||||||
|
|
||||||
gEmbeddedTokenSpaceGuid.PcdEmbeddedFdBaseAddress
|
gArmTokenSpaceGuid.PcdNormalFdBaseAddress
|
||||||
|
|
||||||
gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase
|
gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase
|
||||||
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecStackSize
|
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecStackSize
|
||||||
|
Loading…
x
Reference in New Issue
Block a user